| /drivers/gpu/drm/rcar-du/ |
| D | rcar_du_drv.c | 47 .possible_crtcs = BIT(0),
51 .possible_crtcs = BIT(1) | BIT(0),
70 .possible_crtcs = BIT(2) | BIT(1) | BIT(0),
74 .possible_crtcs = BIT(0),
78 .possible_crtcs = BIT(2) | BIT(1),
97 .possible_crtcs = BIT(1) | BIT(0),
101 .possible_crtcs = BIT(0),
116 .possible_crtcs = BIT(0),
120 .possible_crtcs = BIT(1),
138 .possible_crtcs = BIT(0),
[all …]
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| D | rcar_du_group.c | 60 unsigned int possible_crtcs = in rcar_du_group_setup_defr8() local
61 rcdu->info->routes[RCAR_DU_OUTPUT_DPAD0].possible_crtcs; in rcar_du_group_setup_defr8()
73 if (possible_crtcs > 1) in rcar_du_group_setup_defr8()
83 u32 crtc = ffs(possible_crtcs) - 1; in rcar_du_group_setup_defr8()
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| D | rcar_du_kms.c | 386 if (rcdu->info->routes[i].possible_crtcs && in rcar_du_encoders_init()
622 encoder->possible_crtcs = route->possible_crtcs; in rcar_du_modeset_init()
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| D | rcar_du_drv.h | 48 unsigned int possible_crtcs; member
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| /drivers/gpu/drm/ |
| D | drm_of.c | 56 uint32_t possible_crtcs = 0; in drm_of_find_possible_crtcs() local
65 possible_crtcs |= drm_crtc_port_mask(dev, remote_port); in drm_of_find_possible_crtcs()
70 return possible_crtcs; in drm_of_find_possible_crtcs()
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| D | drm_plane.c | 165 uint32_t possible_crtcs, in drm_universal_plane_init() argument
242 plane->possible_crtcs = possible_crtcs; in drm_universal_plane_init()
318 uint32_t possible_crtcs, in drm_plane_init() argument
326 return drm_universal_plane_init(dev, plane, possible_crtcs, funcs, in drm_plane_init()
540 plane_resp->possible_crtcs = plane->possible_crtcs; in drm_mode_getplane()
608 if (!(plane->possible_crtcs & drm_crtc_mask(crtc))) { in __setplane_internal()
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| D | drm_encoder.c | 237 enc_resp->possible_crtcs = encoder->possible_crtcs; in drm_mode_getencoder()
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| D | drm_crtc.c | 323 if (primary && !primary->possible_crtcs) in drm_crtc_init_with_planes()
324 primary->possible_crtcs = 1 << drm_crtc_index(crtc); in drm_crtc_init_with_planes()
325 if (cursor && !cursor->possible_crtcs) in drm_crtc_init_with_planes()
326 cursor->possible_crtcs = 1 << drm_crtc_index(crtc); in drm_crtc_init_with_planes()
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| /drivers/gpu/drm/sun4i/ |
| D | sun4i_crtc.c | 194 uint32_t possible_crtcs = BIT(drm_crtc_index(&scrtc->crtc)); in sun4i_crtc_init() local
198 plane->possible_crtcs = possible_crtcs; in sun4i_crtc_init()
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| /drivers/gpu/drm/imx/ |
| D | dw_hdmi-imx.c | 224 encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node); in dw_hdmi_imx_bind()
231 if (encoder->possible_crtcs == 0) in dw_hdmi_imx_bind()
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| D | ipuv3-plane.h | 33 int dma, int dp, unsigned int possible_crtcs,
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| /drivers/gpu/drm/mediatek/ |
| D | mtk_drm_plane.c | 172 unsigned long possible_crtcs, enum drm_plane_type type) in mtk_plane_init() argument
176 err = drm_universal_plane_init(dev, plane, possible_crtcs, in mtk_plane_init()
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| D | mtk_drm_plane.h | 46 unsigned long possible_crtcs, enum drm_plane_type type);
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| /drivers/gpu/drm/sti/ |
| D | sti_cursor.h | 13 unsigned int possible_crtcs);
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| D | sti_gdp.h | 17 unsigned int possible_crtcs,
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| /drivers/gpu/drm/tilcdc/ |
| D | tilcdc_external.c | 126 if (encoder->possible_crtcs & (1 << priv->crtc->index)) in tilcdc_add_component_encoder()
169 priv->external_encoder->possible_crtcs = BIT(0); in tilcdc_attach_bridge()
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| /drivers/gpu/drm/arc/ |
| D | arcpgu_hdmi.c | 42 encoder->possible_crtcs = 1; in arcpgu_drm_hdmi_init()
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| D | arcpgu_sim.c | 79 encoder->base.possible_crtcs = 1; in arcpgu_drm_sim_init()
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| /drivers/gpu/drm/udl/ |
| D | udl_encoder.c | 71 encoder->possible_crtcs = 1; in udl_encoder_init()
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| /drivers/gpu/drm/omapdrm/ |
| D | omap_plane.c | 261 u32 possible_crtcs) in omap_plane_init() argument
291 ret = drm_universal_plane_init(dev, plane, possible_crtcs, in omap_plane_init()
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| /drivers/gpu/drm/rockchip/ |
| D | dw_hdmi-rockchip.c | 359 encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node); in dw_hdmi_rockchip_bind()
366 if (encoder->possible_crtcs == 0) in dw_hdmi_rockchip_bind()
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| D | analogix_dp-rockchip.c | 329 encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev, in rockchip_dp_drm_create_encoder()
331 DRM_DEBUG_KMS("possible_crtcs = 0x%x\n", encoder->possible_crtcs); in rockchip_dp_drm_create_encoder()
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| /drivers/gpu/drm/atmel-hlcdc/ |
| D | atmel_hlcdc_output.c | 56 encoder->possible_crtcs = 0x1; in atmel_hlcdc_attach_endpoint()
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| /drivers/gpu/drm/msm/mdp/mdp4/ |
| D | mdp4_kms.c | 257 encoder->possible_crtcs = 1 << DMA_P; in mdp4_modeset_init_intf()
277 encoder->possible_crtcs = 1 << 1; in mdp4_modeset_init_intf()
307 encoder->possible_crtcs = 1 << DMA_P; in mdp4_modeset_init_intf()
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| /drivers/gpu/drm/radeon/ |
| D | radeon_dp_mst.c | 632 encoder->possible_crtcs = 0x1; in radeon_dp_create_fake_mst_encoder()
636 encoder->possible_crtcs = 0x3; in radeon_dp_create_fake_mst_encoder()
639 encoder->possible_crtcs = 0xf; in radeon_dp_create_fake_mst_encoder()
642 encoder->possible_crtcs = 0x3f; in radeon_dp_create_fake_mst_encoder()
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