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Searched refs:regs (Results 1 – 25 of 1254) sorted by relevance

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/drivers/media/tuners/
Dtda18271-common.c69 unsigned char *regs = priv->tda18271_regs; in tda18271_dump_regs() local
72 tda_reg("ID_BYTE = 0x%02x\n", 0xff & regs[R_ID]); in tda18271_dump_regs()
73 tda_reg("THERMO_BYTE = 0x%02x\n", 0xff & regs[R_TM]); in tda18271_dump_regs()
74 tda_reg("POWER_LEVEL_BYTE = 0x%02x\n", 0xff & regs[R_PL]); in tda18271_dump_regs()
75 tda_reg("EASY_PROG_BYTE_1 = 0x%02x\n", 0xff & regs[R_EP1]); in tda18271_dump_regs()
76 tda_reg("EASY_PROG_BYTE_2 = 0x%02x\n", 0xff & regs[R_EP2]); in tda18271_dump_regs()
77 tda_reg("EASY_PROG_BYTE_3 = 0x%02x\n", 0xff & regs[R_EP3]); in tda18271_dump_regs()
78 tda_reg("EASY_PROG_BYTE_4 = 0x%02x\n", 0xff & regs[R_EP4]); in tda18271_dump_regs()
79 tda_reg("EASY_PROG_BYTE_5 = 0x%02x\n", 0xff & regs[R_EP5]); in tda18271_dump_regs()
80 tda_reg("CAL_POST_DIV_BYTE = 0x%02x\n", 0xff & regs[R_CPD]); in tda18271_dump_regs()
[all …]
Dfc0011.c182 u8 regs[FC11_NR_REGS] = { }; in fc0011_set_params() local
184 regs[FC11_REG_7] = 0x0F; in fc0011_set_params()
185 regs[FC11_REG_8] = 0x3E; in fc0011_set_params()
186 regs[FC11_REG_10] = 0xB8; in fc0011_set_params()
187 regs[FC11_REG_11] = 0x80; in fc0011_set_params()
188 regs[FC11_REG_RCCAL] = 0x04; in fc0011_set_params()
189 err = fc0011_writereg(priv, FC11_REG_7, regs[FC11_REG_7]); in fc0011_set_params()
190 err |= fc0011_writereg(priv, FC11_REG_8, regs[FC11_REG_8]); in fc0011_set_params()
191 err |= fc0011_writereg(priv, FC11_REG_10, regs[FC11_REG_10]); in fc0011_set_params()
192 err |= fc0011_writereg(priv, FC11_REG_11, regs[FC11_REG_11]); in fc0011_set_params()
[all …]
/drivers/media/platform/s5p-jpeg/
Djpeg-hw-s5p.c20 void s5p_jpeg_reset(void __iomem *regs) in s5p_jpeg_reset() argument
24 writel(1, regs + S5P_JPG_SW_RESET); in s5p_jpeg_reset()
25 reg = readl(regs + S5P_JPG_SW_RESET); in s5p_jpeg_reset()
29 reg = readl(regs + S5P_JPG_SW_RESET); in s5p_jpeg_reset()
33 void s5p_jpeg_poweron(void __iomem *regs) in s5p_jpeg_poweron() argument
35 writel(S5P_POWER_ON, regs + S5P_JPGCLKCON); in s5p_jpeg_poweron()
38 void s5p_jpeg_input_raw_mode(void __iomem *regs, unsigned long mode) in s5p_jpeg_input_raw_mode() argument
48 reg = readl(regs + S5P_JPGCMOD); in s5p_jpeg_input_raw_mode()
51 writel(reg, regs + S5P_JPGCMOD); in s5p_jpeg_input_raw_mode()
54 void s5p_jpeg_proc_mode(void __iomem *regs, unsigned long mode) in s5p_jpeg_proc_mode() argument
[all …]
Djpeg-hw-exynos3250.c21 void exynos3250_jpeg_reset(void __iomem *regs) in exynos3250_jpeg_reset() argument
26 writel(1, regs + EXYNOS3250_SW_RESET); in exynos3250_jpeg_reset()
31 reg = readl(regs + EXYNOS3250_SW_RESET); in exynos3250_jpeg_reset()
38 writel(1, regs + EXYNOS3250_JPGDRI); in exynos3250_jpeg_reset()
41 reg = readl(regs + EXYNOS3250_JPGDRI); in exynos3250_jpeg_reset()
44 writel(0, regs + EXYNOS3250_JPGDRI); in exynos3250_jpeg_reset()
47 void exynos3250_jpeg_poweron(void __iomem *regs) in exynos3250_jpeg_poweron() argument
49 writel(EXYNOS3250_POWER_ON, regs + EXYNOS3250_JPGCLKCON); in exynos3250_jpeg_poweron()
52 void exynos3250_jpeg_set_dma_num(void __iomem *regs) in exynos3250_jpeg_set_dma_num() argument
60 regs + EXYNOS3250_DMA_ISSUE_NUM); in exynos3250_jpeg_set_dma_num()
[all …]
Djpeg-hw-exynos3250.h20 void exynos3250_jpeg_reset(void __iomem *regs);
21 void exynos3250_jpeg_poweron(void __iomem *regs);
22 void exynos3250_jpeg_set_dma_num(void __iomem *regs);
24 void exynos3250_jpeg_input_raw_fmt(void __iomem *regs, unsigned int fmt);
25 void exynos3250_jpeg_output_raw_fmt(void __iomem *regs, unsigned int fmt);
26 void exynos3250_jpeg_set_y16(void __iomem *regs, bool y16);
27 void exynos3250_jpeg_proc_mode(void __iomem *regs, unsigned int mode);
28 void exynos3250_jpeg_subsampling_mode(void __iomem *regs, unsigned int mode);
29 unsigned int exynos3250_jpeg_get_subsampling_mode(void __iomem *regs);
30 void exynos3250_jpeg_dri(void __iomem *regs, unsigned int dri);
[all …]
Djpeg-hw-s5p.h29 void s5p_jpeg_reset(void __iomem *regs);
30 void s5p_jpeg_poweron(void __iomem *regs);
31 void s5p_jpeg_input_raw_mode(void __iomem *regs, unsigned long mode);
32 void s5p_jpeg_proc_mode(void __iomem *regs, unsigned long mode);
33 void s5p_jpeg_subsampling_mode(void __iomem *regs, unsigned int mode);
34 unsigned int s5p_jpeg_get_subsampling_mode(void __iomem *regs);
35 void s5p_jpeg_dri(void __iomem *regs, unsigned int dri);
36 void s5p_jpeg_qtbl(void __iomem *regs, unsigned int t, unsigned int n);
37 void s5p_jpeg_htbl_ac(void __iomem *regs, unsigned int t);
38 void s5p_jpeg_htbl_dc(void __iomem *regs, unsigned int t);
[all …]
/drivers/video/fbdev/
Dbt431.h76 static inline void bt431_select_reg(struct bt431_regs *regs, int ir) in bt431_select_reg() argument
82 volatile u16 *lo = &(regs->addr_lo); in bt431_select_reg()
83 volatile u16 *hi = &(regs->addr_hi); in bt431_select_reg()
92 static inline u8 bt431_read_reg_inc(struct bt431_regs *regs) in bt431_read_reg_inc() argument
98 volatile u16 *r = &(regs->addr_reg); in bt431_read_reg_inc()
104 static inline void bt431_write_reg_inc(struct bt431_regs *regs, u8 value) in bt431_write_reg_inc() argument
110 volatile u16 *r = &(regs->addr_reg); in bt431_write_reg_inc()
116 static inline u8 bt431_read_reg(struct bt431_regs *regs, int ir) in bt431_read_reg() argument
118 bt431_select_reg(regs, ir); in bt431_read_reg()
119 return bt431_read_reg_inc(regs); in bt431_read_reg()
[all …]
Dbt455.h27 static inline void bt455_select_reg(struct bt455_regs *regs, int ir) in bt455_select_reg() argument
30 regs->addr_cmap = ir & 0x0f; in bt455_select_reg()
33 static inline void bt455_reset_reg(struct bt455_regs *regs) in bt455_reset_reg() argument
36 regs->addr_clr = 0; in bt455_reset_reg()
42 static inline void bt455_read_cmap_next(struct bt455_regs *regs, u8 *grey) in bt455_read_cmap_next() argument
45 regs->addr_cmap_data; in bt455_read_cmap_next()
47 *grey = regs->addr_cmap_data & 0xf; in bt455_read_cmap_next()
49 regs->addr_cmap_data; in bt455_read_cmap_next()
52 static inline void bt455_write_cmap_next(struct bt455_regs *regs, u8 grey) in bt455_write_cmap_next() argument
55 regs->addr_cmap_data = 0x0; in bt455_write_cmap_next()
[all …]
/drivers/rtc/
Drtc-mpc5121.c82 struct mpc5121_rtc_regs __iomem *regs; member
92 static void mpc5121_rtc_update_smh(struct mpc5121_rtc_regs __iomem *regs, in mpc5121_rtc_update_smh() argument
95 out_8(&regs->second_set, tm->tm_sec); in mpc5121_rtc_update_smh()
96 out_8(&regs->minute_set, tm->tm_min); in mpc5121_rtc_update_smh()
97 out_8(&regs->hour_set, tm->tm_hour); in mpc5121_rtc_update_smh()
100 out_8(&regs->set_time, 0x1); in mpc5121_rtc_update_smh()
101 out_8(&regs->set_time, 0x3); in mpc5121_rtc_update_smh()
102 out_8(&regs->set_time, 0x1); in mpc5121_rtc_update_smh()
103 out_8(&regs->set_time, 0x0); in mpc5121_rtc_update_smh()
109 struct mpc5121_rtc_regs __iomem *regs = rtc->regs; in mpc5121_rtc_read_time() local
[all …]
Drtc-fm3130.c51 u8 regs[15]; member
72 fm3130->regs[FM3130_RTC_CONTROL] = in fm3130_rtc_mode()
76 fm3130->regs[FM3130_RTC_CONTROL] &= in fm3130_rtc_mode()
81 fm3130->regs[FM3130_RTC_CONTROL] |= FM3130_RTC_CONTROL_BIT_WRITE; in fm3130_rtc_mode()
84 fm3130->regs[FM3130_RTC_CONTROL] |= FM3130_RTC_CONTROL_BIT_READ; in fm3130_rtc_mode()
92 FM3130_RTC_CONTROL, fm3130->regs[FM3130_RTC_CONTROL]); in fm3130_rtc_mode()
119 dev_dbg(dev, "%s: %15ph\n", "read", fm3130->regs); in fm3130_get_time()
121 t->tm_sec = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f); in fm3130_get_time()
122 t->tm_min = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f); in fm3130_get_time()
123 tmp = fm3130->regs[FM3130_RTC_HOURS] & 0x3f; in fm3130_get_time()
[all …]
Drtc-max8907.c61 static void regs_to_tm(u8 *regs, struct rtc_time *tm) in regs_to_tm() argument
63 tm->tm_year = bcd2bin(regs[RTC_YEAR2]) * 100 + in regs_to_tm()
64 bcd2bin(regs[RTC_YEAR1]) - 1900; in regs_to_tm()
65 tm->tm_mon = bcd2bin(regs[RTC_MONTH] & 0x1f) - 1; in regs_to_tm()
66 tm->tm_mday = bcd2bin(regs[RTC_DATE] & 0x3f); in regs_to_tm()
67 tm->tm_wday = (regs[RTC_WEEKDAY] & 0x07); in regs_to_tm()
68 if (regs[RTC_HOUR] & HOUR_12) { in regs_to_tm()
69 tm->tm_hour = bcd2bin(regs[RTC_HOUR] & 0x01f); in regs_to_tm()
72 if (regs[RTC_HOUR] & HOUR_AM_PM) in regs_to_tm()
75 tm->tm_hour = bcd2bin(regs[RTC_HOUR] & 0x03f); in regs_to_tm()
[all …]
/drivers/net/hippi/
Drrunner.c150 rrpriv->regs = pci_iomap(pdev, 0, 0x1000); in rr_init_one()
151 if (!rrpriv->regs) { in rr_init_one()
189 writel(readl(&rrpriv->regs->HostCtrl) | NO_SWAP, in rr_init_one()
190 &rrpriv->regs->HostCtrl); in rr_init_one()
213 if (rrpriv->regs) in rr_init_one()
214 pci_iounmap(pdev, rrpriv->regs); in rr_init_one()
228 if (!(readl(&rr->regs->HostCtrl) & NIC_HALTED)) { in rr_remove_one()
231 writel(HALT_NIC, &rr->regs->HostCtrl); in rr_remove_one()
241 pci_iounmap(pdev, rr->regs); in rr_remove_one()
254 struct rr_regs __iomem *regs; in rr_issue_cmd() local
[all …]
/drivers/net/ethernet/hisilicon/hns/
Dhns_dsaf_xgmac.c504 u32 *regs = data; in hns_xgmac_get_regs() local
508 regs[0] = dsaf_read_dev(drv, XGMAC_INT_STATUS_REG); in hns_xgmac_get_regs()
509 regs[1] = dsaf_read_dev(drv, XGMAC_INT_ENABLE_REG); in hns_xgmac_get_regs()
510 regs[2] = dsaf_read_dev(drv, XGMAC_INT_SET_REG); in hns_xgmac_get_regs()
511 regs[3] = dsaf_read_dev(drv, XGMAC_IERR_U_INFO_REG); in hns_xgmac_get_regs()
512 regs[4] = dsaf_read_dev(drv, XGMAC_OVF_INFO_REG); in hns_xgmac_get_regs()
513 regs[5] = dsaf_read_dev(drv, XGMAC_OVF_CNT_REG); in hns_xgmac_get_regs()
514 regs[6] = dsaf_read_dev(drv, XGMAC_PORT_MODE_REG); in hns_xgmac_get_regs()
515 regs[7] = dsaf_read_dev(drv, XGMAC_CLK_ENABLE_REG); in hns_xgmac_get_regs()
516 regs[8] = dsaf_read_dev(drv, XGMAC_RESET_REG); in hns_xgmac_get_regs()
[all …]
/drivers/net/ethernet/chelsio/cxgb/
Despi.c70 adapter->regs + A_ESPI_CMD_ADDR); in tricn_write()
71 writel(0, adapter->regs + A_ESPI_GOSTAT); in tricn_write()
74 busy = readl(adapter->regs + A_ESPI_GOSTAT) & F_ESPI_CMD_BUSY; in tricn_write()
87 if (!(readl(adapter->regs + A_ESPI_RX_RESET) & F_RX_CLK_STATUS)) { in tricn_init()
92 writel(F_ESPI_RX_CORE_RST, adapter->regs + A_ESPI_RX_RESET); in tricn_init()
112 adapter->regs + A_ESPI_RX_RESET); in tricn_init()
119 u32 enable, pl_intr = readl(espi->adapter->regs + A_PL_ENABLE); in t1_espi_intr_enable()
129 writel(enable, espi->adapter->regs + A_ESPI_INTR_ENABLE); in t1_espi_intr_enable()
130 writel(pl_intr | F_PL_INTR_ESPI, espi->adapter->regs + A_PL_ENABLE); in t1_espi_intr_enable()
135 readl(espi->adapter->regs + A_ESPI_DIP2_ERR_COUNT); in t1_espi_intr_clear()
[all …]
/drivers/usb/dwc2/
Dcore.c74 gr->gotgctl = dwc2_readl(hsotg->regs + GOTGCTL); in dwc2_backup_global_registers()
75 gr->gintmsk = dwc2_readl(hsotg->regs + GINTMSK); in dwc2_backup_global_registers()
76 gr->gahbcfg = dwc2_readl(hsotg->regs + GAHBCFG); in dwc2_backup_global_registers()
77 gr->gusbcfg = dwc2_readl(hsotg->regs + GUSBCFG); in dwc2_backup_global_registers()
78 gr->grxfsiz = dwc2_readl(hsotg->regs + GRXFSIZ); in dwc2_backup_global_registers()
79 gr->gnptxfsiz = dwc2_readl(hsotg->regs + GNPTXFSIZ); in dwc2_backup_global_registers()
80 gr->hptxfsiz = dwc2_readl(hsotg->regs + HPTXFSIZ); in dwc2_backup_global_registers()
81 gr->gdfifocfg = dwc2_readl(hsotg->regs + GDFIFOCFG); in dwc2_backup_global_registers()
83 gr->dtxfsiz[i] = dwc2_readl(hsotg->regs + DPTXFSIZN(i)); in dwc2_backup_global_registers()
112 dwc2_writel(0xffffffff, hsotg->regs + GINTSTS); in dwc2_restore_global_registers()
[all …]
/drivers/media/dvb-frontends/
Dstv6110x.c110 ret = stv6110x_write_regs(stv6110x, 0, stv6110x->regs, in stv6110x_init()
111 ARRAY_SIZE(stv6110x->regs)); in stv6110x_init()
127 STV6110x_SETFIELD(stv6110x->regs[STV6110x_CTRL1], CTRL1_K, (REFCLOCK_MHz - 16)); in stv6110x_set_frequency()
130 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_DIV4SEL, 1); in stv6110x_set_frequency()
131 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_PRESC32_ON, 0); in stv6110x_set_frequency()
134 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_DIV4SEL, 1); in stv6110x_set_frequency()
135 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_PRESC32_ON, 1); in stv6110x_set_frequency()
138 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_DIV4SEL, 0); in stv6110x_set_frequency()
139 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_PRESC32_ON, 0); in stv6110x_set_frequency()
142 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_DIV4SEL, 0); in stv6110x_set_frequency()
[all …]
/drivers/gpu/drm/gma500/
Doaktrail_device.c192 struct psb_save_area *regs = &dev_priv->regs; in oaktrail_save_display_registers() local
193 struct psb_pipe *p = &regs->pipe[0]; in oaktrail_save_display_registers()
198 regs->psb.saveDSPARB = PSB_RVDC32(DSPARB); in oaktrail_save_display_registers()
199 regs->psb.saveDSPFW1 = PSB_RVDC32(DSPFW1); in oaktrail_save_display_registers()
200 regs->psb.saveDSPFW2 = PSB_RVDC32(DSPFW2); in oaktrail_save_display_registers()
201 regs->psb.saveDSPFW3 = PSB_RVDC32(DSPFW3); in oaktrail_save_display_registers()
202 regs->psb.saveDSPFW4 = PSB_RVDC32(DSPFW4); in oaktrail_save_display_registers()
203 regs->psb.saveDSPFW5 = PSB_RVDC32(DSPFW5); in oaktrail_save_display_registers()
204 regs->psb.saveDSPFW6 = PSB_RVDC32(DSPFW6); in oaktrail_save_display_registers()
205 regs->psb.saveCHICKENBIT = PSB_RVDC32(DSPCHICKENBIT); in oaktrail_save_display_registers()
[all …]
/drivers/net/ethernet/freescale/fman/
Dfman_dtsec.c322 struct dtsec_regs __iomem *regs; member
367 static int init(struct dtsec_regs __iomem *regs, struct dtsec_cfg *cfg, in init() argument
376 iowrite32be(MACCFG1_SOFT_RESET, &regs->maccfg1); in init()
377 iowrite32be(0, &regs->maccfg1); in init()
380 tmp = ioread32be(&regs->tsec_id2); in init()
416 iowrite32be(tmp, &regs->ecntrl); in init()
424 iowrite32be(tmp, &regs->ptv); in init()
431 iowrite32be(tmp, &regs->rctrl); in init()
437 iowrite32be(tbi_addr, &regs->tbipa); in init()
439 iowrite32be(0, &regs->tmr_ctrl); in init()
[all …]
/drivers/net/can/mscan/
Dmscan.c64 struct mscan_regs __iomem *regs = priv->reg_base; in mscan_set_mode() local
72 out_8(&regs->cantarq, priv->tx_active); in mscan_set_mode()
74 out_8(&regs->cantier, 0); in mscan_set_mode()
77 canctl1 = in_8(&regs->canctl1); in mscan_set_mode()
79 setbits8(&regs->canctl0, MSCAN_SLPRQ); in mscan_set_mode()
81 if (in_8(&regs->canctl1) & MSCAN_SLPAK) in mscan_set_mode()
105 setbits8(&regs->canctl0, MSCAN_INITRQ); in mscan_set_mode()
107 if (in_8(&regs->canctl1) & MSCAN_INITAK) in mscan_set_mode()
117 setbits8(&regs->canctl0, MSCAN_CSWAI); in mscan_set_mode()
120 canctl1 = in_8(&regs->canctl1); in mscan_set_mode()
[all …]
/drivers/char/
Dtoshiba.c134 static int tosh_emulate_fan(SMMRegisters *regs) in tosh_emulate_fan() argument
139 eax = regs->eax & 0xff00; in tosh_emulate_fan()
140 ecx = regs->ecx & 0xffff; in tosh_emulate_fan()
151 regs->eax = 0x00; in tosh_emulate_fan()
152 regs->ecx = (unsigned int) (al & 0x01); in tosh_emulate_fan()
162 regs->eax = 0x00; in tosh_emulate_fan()
163 regs->ecx = 0x00; in tosh_emulate_fan()
173 regs->eax = 0x00; in tosh_emulate_fan()
174 regs->ecx = 0x01; in tosh_emulate_fan()
187 regs->eax = 0x00; in tosh_emulate_fan()
[all …]
/drivers/net/dsa/b53/
Db53_srab.c64 void __iomem *regs; member
70 u8 __iomem *regs = priv->regs; in b53_srab_request_grant() local
74 ctrls = readl(regs + B53_SRAB_CTRLS); in b53_srab_request_grant()
76 writel(ctrls, regs + B53_SRAB_CTRLS); in b53_srab_request_grant()
79 ctrls = readl(regs + B53_SRAB_CTRLS); in b53_srab_request_grant()
93 u8 __iomem *regs = priv->regs; in b53_srab_release_grant() local
96 ctrls = readl(regs + B53_SRAB_CTRLS); in b53_srab_release_grant()
98 writel(ctrls, regs + B53_SRAB_CTRLS); in b53_srab_release_grant()
104 u8 __iomem *regs = priv->regs; in b53_srab_op() local
113 writel(cmdstat, regs + B53_SRAB_CMDSTAT); in b53_srab_op()
[all …]
/drivers/media/platform/exynos4-is/
Dfimc-lite-reg.c28 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
30 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
33 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
40 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
45 u32 cfg = readl(dev->regs + FLITE_REG_CISTATUS); in flite_hw_clear_pending_irq()
47 writel(cfg, dev->regs + FLITE_REG_CISTATUS); in flite_hw_clear_pending_irq()
52 u32 intsrc = readl(dev->regs + FLITE_REG_CISTATUS); in flite_hw_get_interrupt_source()
59 u32 cfg = readl(dev->regs + FLITE_REG_CISTATUS2); in flite_hw_clear_last_capture_end()
61 writel(cfg, dev->regs + FLITE_REG_CISTATUS2); in flite_hw_clear_last_capture_end()
80 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_set_interrupt_mask()
[all …]
/drivers/sbus/char/
Ddisplay7seg.c56 void __iomem *regs; member
92 regval = readb(p->regs); in d7s_release()
97 writeb(regval, p->regs); in d7s_release()
106 u8 regs = readb(p->regs); in d7s_ioctl() local
124 if (regs & D7S_FLIP) in d7s_ioctl()
129 writeb(ireg, p->regs); in d7s_ioctl()
139 if (put_user(regs, (int __user *) arg)) { in d7s_ioctl()
147 regs ^= D7S_FLIP; in d7s_ioctl()
148 writeb(regs, p->regs); in d7s_ioctl()
176 u8 regs; in d7s_probe() local
[all …]
/drivers/net/ethernet/alteon/
Dacenic.c524 ap->regs = ioremap(dev->base_addr, 0x4000); in acenic_probe_one()
525 if (!ap->regs) { in acenic_probe_one()
566 if ((readl(&ap->regs->HostCtrl) >> 28) == 4) { in acenic_probe_one()
613 struct ace_regs __iomem *regs = ap->regs; in acenic_remove_one() local
618 writel(readl(&regs->CpuCtrl) | CPU_HALT, &regs->CpuCtrl); in acenic_remove_one()
620 writel(readl(&regs->CpuBCtrl) | CPU_HALT, &regs->CpuBCtrl); in acenic_remove_one()
625 writel(1, &regs->Mb0Lo); in acenic_remove_one()
626 readl(&regs->CpuCtrl); /* flush */ in acenic_remove_one()
844 iounmap(ap->regs); in ace_init_cleanup()
851 static inline void ace_issue_cmd(struct ace_regs __iomem *regs, struct cmd *cmd) in ace_issue_cmd() argument
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/drivers/gpio/
Dgpio-mpc5200.c59 struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs; in mpc52xx_wkup_gpio_get() local
62 ret = (in_8(&regs->wkup_ival) >> (7 - gpio)) & 1; in mpc52xx_wkup_gpio_get()
74 struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs; in __mpc52xx_wkup_gpio_set() local
81 out_8(&regs->wkup_dvo, chip->shadow_dvo); in __mpc52xx_wkup_gpio_set()
102 struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs; in mpc52xx_wkup_gpio_dir_in() local
109 out_8(&regs->wkup_ddr, chip->shadow_ddr); in mpc52xx_wkup_gpio_dir_in()
113 out_8(&regs->wkup_gpioe, chip->shadow_gpioe); in mpc52xx_wkup_gpio_dir_in()
124 struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs; in mpc52xx_wkup_gpio_dir_out() local
134 out_8(&regs->wkup_ddr, chip->shadow_ddr); in mpc52xx_wkup_gpio_dir_out()
138 out_8(&regs->wkup_gpioe, chip->shadow_gpioe); in mpc52xx_wkup_gpio_dir_out()
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