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Searched refs:shadow (Results 1 – 25 of 45) sorted by relevance

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/drivers/scsi/
Dxen-scsifront.c118 struct vscsifrnt_shadow *shadow[VSCSIIF_MAX_REQS]; member
160 info->shadow[id] = NULL; in _scsifront_put_rqid()
179 struct vscsifrnt_shadow *shadow) in scsifront_do_request() argument
183 struct scsi_cmnd *sc = shadow->sc; in scsifront_do_request()
194 info->shadow[id] = shadow; in scsifront_do_request()
195 shadow->rqid = id; in scsifront_do_request()
201 ring_req->act = shadow->act; in scsifront_do_request()
202 ring_req->ref_rqid = shadow->ref_rqid; in scsifront_do_request()
203 ring_req->nr_segments = shadow->nr_segments; in scsifront_do_request()
217 for (i = 0; i < (shadow->nr_segments & ~VSCSIIF_SG_GRANT); i++) in scsifront_do_request()
[all …]
/drivers/gpio/
Dgpio-janz-ttl.c63 u8 *shadow; in ttl_get_value() local
67 shadow = &mod->porta_shadow; in ttl_get_value()
69 shadow = &mod->portb_shadow; in ttl_get_value()
72 shadow = &mod->portc_shadow; in ttl_get_value()
77 ret = *shadow & (1 << offset); in ttl_get_value()
86 u8 *shadow; in ttl_set_value() local
90 shadow = &mod->porta_shadow; in ttl_set_value()
93 shadow = &mod->portb_shadow; in ttl_set_value()
97 shadow = &mod->portc_shadow; in ttl_set_value()
103 *shadow |= (1 << offset); in ttl_set_value()
[all …]
Dgpio-mm-lantiq.c33 u16 shadow; /* shadow the latches state */ member
49 __raw_writew(chip->shadow, chip->mmchip.regs); in ltq_mm_apply()
67 chip->shadow |= (1 << offset); in ltq_mm_set()
69 chip->shadow &= ~(1 << offset); in ltq_mm_set()
106 u32 shadow; in ltq_mm_probe() local
120 if (!of_property_read_u32(pdev->dev.of_node, "lantiq,shadow", &shadow)) in ltq_mm_probe()
121 chip->shadow = shadow; in ltq_mm_probe()
Dgpio-stp-xway.c85 u32 shadow; /* shadow the shift registers state */ member
106 chip->shadow |= BIT(gpio); in xway_stp_set()
108 chip->shadow &= ~BIT(gpio); in xway_stp_set()
109 xway_stp_w32(chip->virt, chip->shadow, XWAY_STP_CPU0); in xway_stp_set()
201 u32 shadow, groups, dsl, phy; in xway_stp_probe() local
224 if (!of_property_read_u32(pdev->dev.of_node, "lantiq,shadow", &shadow)) in xway_stp_probe()
225 chip->shadow = shadow; in xway_stp_probe()
/drivers/block/
Dxen-blkfront.c178 struct blk_shadow shadow[BLK_MAX_RING_SIZE]; member
272 rinfo->shadow_free = rinfo->shadow[free].req.u.rw.id; in get_id_from_freelist()
273 rinfo->shadow[free].req.u.rw.id = 0x0fffffee; /* debug */ in get_id_from_freelist()
280 if (rinfo->shadow[id].req.u.rw.id != id) in add_id_to_freelist()
282 if (rinfo->shadow[id].request == NULL) in add_id_to_freelist()
284 rinfo->shadow[id].req.u.rw.id = rinfo->shadow_free; in add_id_to_freelist()
285 rinfo->shadow[id].request = NULL; in add_id_to_freelist()
536 rinfo->shadow[id].request = req; in blkif_ring_get_request()
537 rinfo->shadow[id].status = REQ_WAITING; in blkif_ring_get_request()
538 rinfo->shadow[id].associated_id = NO_ASSOCIATED_ID; in blkif_ring_get_request()
[all …]
/drivers/net/phy/
Dbcm-phy-lib.c149 int bcm_phy_read_shadow(struct phy_device *phydev, u16 shadow) in bcm_phy_read_shadow() argument
151 phy_write(phydev, MII_BCM54XX_SHD, MII_BCM54XX_SHD_VAL(shadow)); in bcm_phy_read_shadow()
156 int bcm_phy_write_shadow(struct phy_device *phydev, u16 shadow, in bcm_phy_write_shadow() argument
161 MII_BCM54XX_SHD_VAL(shadow) | in bcm_phy_write_shadow()
356 static u64 bcm_phy_get_stat(struct phy_device *phydev, u64 *shadow, in bcm_phy_get_stat() argument
369 shadow[i] += val; in bcm_phy_get_stat()
370 ret = shadow[i]; in bcm_phy_get_stat()
376 void bcm_phy_get_stats(struct phy_device *phydev, u64 *shadow, in bcm_phy_get_stats() argument
382 data[i] = bcm_phy_get_stat(phydev, shadow, i); in bcm_phy_get_stats()
Dbcm-phy-lib.h37 int bcm_phy_write_shadow(struct phy_device *phydev, u16 shadow,
39 int bcm_phy_read_shadow(struct phy_device *phydev, u16 shadow);
54 void bcm_phy_get_stats(struct phy_device *phydev, u64 *shadow,
/drivers/ps3/
Dps3-lpm.c140 struct ps3_lpm_shadow_regs shadow; member
406 return lpm_priv->shadow.pm_control; in ps3_read_pm()
410 return lpm_priv->shadow.pm_start_stop; in ps3_read_pm()
421 return lpm_priv->shadow.group_control; in ps3_read_pm()
423 return lpm_priv->shadow.debug_bus_control; in ps3_read_pm()
458 if (val != lpm_priv->shadow.group_control) in ps3_write_pm()
463 lpm_priv->shadow.group_control = val; in ps3_write_pm()
466 if (val != lpm_priv->shadow.debug_bus_control) in ps3_write_pm()
471 lpm_priv->shadow.debug_bus_control = val; in ps3_write_pm()
477 if (val != lpm_priv->shadow.pm_control) in ps3_write_pm()
[all …]
/drivers/gpu/drm/qxl/
Dqxl_fb.c47 void *shadow; member
204 image->data = qfbdev->shadow + (clips->x1 * 4) + (stride * clips->y1); in qxlfb_framebuffer_dirty()
230 void *shadow; in qxlfb_create() local
246 shadow = vmalloc(mode_cmd.pitches[0] * mode_cmd.height); in qxlfb_create()
248 BUG_ON(!shadow); in qxlfb_create()
254 shadow); in qxlfb_create()
273 qfbdev->shadow = shadow; in qxlfb_create()
286 info->screen_base = qfbdev->shadow; in qxlfb_create()
359 vfree(qfbdev->shadow); in qxl_fbdev_destroy()
Dqxl_display.c311 WARN_ON(bo->shadow); in qxl_user_framebuffer_destroy()
574 if (bo_old && bo_old->shadow && bo->shadow && in qxl_primary_atomic_update()
575 bo_old->shadow == bo->shadow) { in qxl_primary_atomic_update()
769 user_bo->is_dumb && !user_bo->shadow) { in qxl_plane_prepare_fb()
774 if (old_bo && old_bo->shadow && in qxl_plane_prepare_fb()
785 drm_gem_object_get(&old_bo->shadow->gem_base); in qxl_plane_prepare_fb()
786 user_bo->shadow = old_bo->shadow; in qxl_plane_prepare_fb()
790 &user_bo->shadow); in qxl_plane_prepare_fb()
819 if (user_bo->shadow && !user_bo->is_primary) { in qxl_plane_cleanup_fb()
820 drm_gem_object_put_unlocked(&user_bo->shadow->gem_base); in qxl_plane_cleanup_fb()
[all …]
/drivers/tty/serial/
Dioc3_serial.c439 writel(0, &port->ip_serial_regs->shadow); in port_init()
829 uint32_t shadow; in set_mcr() local
847 shadow = readl(&port->ip_serial_regs->shadow); in set_mcr()
848 mcr = (shadow & 0xff000000) >> 24; in set_mcr()
852 shadow |= mask2; in set_mcr()
854 writel(shadow, &port->ip_serial_regs->shadow); in set_mcr()
1473 uint32_t shadow; in ioc3uart_intr_one() local
1485 shadow = readl(&port->ip_serial_regs->shadow); in ioc3uart_intr_one()
1488 && (shadow & SHADOW_DCD) in ioc3uart_intr_one()
1492 shadow & SHADOW_DCD); in ioc3uart_intr_one()
[all …]
Dioc4_serial.c254 uint32_t shadow; member
1565 uint32_t shadow; in set_mcr() local
1583 shadow = readl(&port->ip_serial_regs->shadow); in set_mcr()
1584 mcr = (shadow & 0xff000000) >> 24; in set_mcr()
1588 shadow |= mask2; in set_mcr()
1591 writel(shadow, &port->ip_serial_regs->shadow); in set_mcr()
1870 uint32_t shadow; in handle_intr() local
1885 shadow = readl(&port->ip_serial_regs->shadow); in handle_intr()
1888 && (shadow & IOC4_SHADOW_DCD) in handle_intr()
1895 && !(shadow & IOC4_SHADOW_DCD)) { in handle_intr()
[all …]
/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
Dshadow.c30 struct shadow { struct
39 shadow_fetch(struct nvkm_bios *bios, struct shadow *mthd, u32 upto) in shadow_fetch() argument
52 shadow_image(struct nvkm_bios *bios, int idx, u32 offset, struct shadow *mthd) in shadow_image()
110 shadow_method(struct nvkm_bios *bios, struct shadow *mthd, const char *name) in shadow_method()
171 struct shadow mthds[] = { in nvbios_shadow()
/drivers/media/i2c/
Dtvaudio.c128 audiocmd shadow; member
164 chip->shadow.bytes[1] = val; in chip_write()
171 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) { in chip_write()
180 chip->shadow.bytes[subaddr+1] = val; in chip_write()
199 val = (chip->shadow.bytes[1] & ~mask) | (val & mask); in chip_write_masked()
201 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) { in chip_write_masked()
208 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask); in chip_write_masked()
268 if (cmd->count + cmd->bytes[0] - 1 >= ARRAY_SIZE(chip->shadow.bytes)) { in chip_cmd()
283 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i]; in chip_cmd()
421 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e; in tda9840_setaudmode()
[all …]
/drivers/media/pci/cx88/
Dcx88.h355 u32 shadow[SHADOW_MAX]; member
606 #define cx_sread(sreg) (core->shadow[sreg])
608 (core->shadow[sreg] = value, \
609 writel(core->shadow[sreg], core->lmmio + ((reg) >> 2)))
611 (core->shadow[sreg] = (core->shadow[sreg] & ~(mask)) | \
613 writel(core->shadow[sreg], \
/drivers/media/dvb-frontends/
Ditd1000.c87 itd1000_write_regs(state, (reg - 1) & 0xff, &state->shadow[(reg - 1) & 0xff], 1); in itd1000_read_reg()
100 state->shadow[r] = tmp; in itd1000_write_reg()
392 memset(state->shadow, 0xff, sizeof(state->shadow)); in itd1000_attach()
394 state->shadow[i] = itd1000_read_reg(state, i); in itd1000_attach()
Ds5h1420.c58 u8 shadow[256]; member
86 b[1] = state->shadow[(reg - 1) & 0xff]; in s5h1420_readreg()
118 state->shadow[reg] = data; in s5h1420_writereg()
905 memset(state->shadow, 0xff, sizeof(state->shadow)); in s5h1420_attach()
908 state->shadow[i] = s5h1420_readreg(state, i); in s5h1420_attach()
Ditd1000_priv.h30 u8 shadow[256]; member
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_object.c451 if (bo->shadow) in amdgpu_bo_create_shadow()
467 &bo->shadow); in amdgpu_bo_create_shadow()
469 bo->shadow->parent = amdgpu_bo_ref(bo); in amdgpu_bo_create_shadow()
529 struct amdgpu_bo *shadow = bo->shadow; in amdgpu_bo_backup_to_shadow() local
533 if (!shadow) in amdgpu_bo_backup_to_shadow()
537 shadow_addr = amdgpu_bo_gpu_offset(bo->shadow); in amdgpu_bo_backup_to_shadow()
582 struct amdgpu_bo *shadow = bo->shadow; in amdgpu_bo_restore_from_shadow() local
586 if (!shadow) in amdgpu_bo_restore_from_shadow()
590 shadow_addr = amdgpu_bo_gpu_offset(bo->shadow); in amdgpu_bo_restore_from_shadow()
Damdgpu_vm.c189 if (entry->bo->shadow) in amdgpu_vm_validate_level()
190 ttm_bo_move_to_lru_tail(&entry->bo->shadow->tbo); in amdgpu_vm_validate_level()
1013 struct amdgpu_bo *shadow; in amdgpu_vm_update_level() local
1030 shadow = parent->bo->shadow; in amdgpu_vm_update_level()
1051 if (shadow) { in amdgpu_vm_update_level()
1052 shadow_addr = amdgpu_bo_gpu_offset(shadow); in amdgpu_vm_update_level()
1090 if (shadow) in amdgpu_vm_update_level()
1112 if (vm->root.bo->shadow) in amdgpu_vm_update_level()
1127 if (shadow) in amdgpu_vm_update_level()
1129 shadow->tbo.resv, in amdgpu_vm_update_level()
[all …]
/drivers/gpu/drm/nouveau/nvkm/subdev/mxm/
Dbase.c215 struct mxm_shadow_h *shadow = _mxm_shadow; in mxm_shadow() local
217 nvkm_debug(&mxm->subdev, "checking %s\n", shadow->name); in mxm_shadow()
218 if (shadow->exec(mxm, version)) { in mxm_shadow()
224 } while ((++shadow)->name); in mxm_shadow()
/drivers/pinctrl/sh-pfc/
Dgpio.c24 u32 shadow; member
117 chip->regs[i].shadow = gpio_read_data_reg(chip, dreg); in gpio_setup_data_regs()
162 reg->shadow |= BIT(pos); in gpio_pin_set_value()
164 reg->shadow &= ~BIT(pos); in gpio_pin_set_value()
166 gpio_write_data_reg(chip, reg->info, reg->shadow); in gpio_pin_set_value()
/drivers/infiniband/hw/i40iw/
Di40iw_verbs.h63 dma_addr_t shadow; member
69 dma_addr_t shadow; member
/drivers/gpu/drm/nouveau/nvkm/subdev/pci/
Dbase.c58 nvkm_pci_rom_shadow(struct nvkm_pci *pci, bool shadow) in nvkm_pci_rom_shadow() argument
61 if (shadow) in nvkm_pci_rom_shadow()
/drivers/infiniband/hw/qib/
Dqib_tx.c291 unsigned long *shadow = dd->pioavailshadow; in qib_getsendbuf_range() local
323 if (__test_and_set_bit((2 * i) + 1, shadow)) in qib_getsendbuf_range()
326 __change_bit(2 * i, shadow); in qib_getsendbuf_range()

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