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Searched refs:surface (Results 1 – 12 of 12) sorted by relevance

/drivers/gpu/drm/vmwgfx/
Dvmwgfx_kms.c363 vps->surf = vmw_framebuffer_to_vfbs(fb)->surface; in vmw_du_cursor_plane_prepare_fb()
516 struct vmw_surface *surface = NULL; in vmw_du_cursor_plane_atomic_check() local
532 surface = vmw_framebuffer_to_vfbs(fb)->surface; in vmw_du_cursor_plane_atomic_check()
534 if (surface && !surface->snooper.image) { in vmw_du_cursor_plane_atomic_check()
865 vmw_surface_unreference(&vfbs->surface); in vmw_framebuffer_surface_destroy()
970 struct vmw_surface *surface, in vmw_kms_new_framebuffer_surface() argument
992 if (unlikely(!surface->scanout)) in vmw_kms_new_framebuffer_surface()
995 if (unlikely(surface->mip_levels[0] != 1 || in vmw_kms_new_framebuffer_surface()
996 surface->num_sizes != 1 || in vmw_kms_new_framebuffer_surface()
997 surface->base_size.width < mode_cmd->width || in vmw_kms_new_framebuffer_surface()
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Dvmwgfx_ioctl.c252 struct vmw_surface *surface; in vmw_present_ioctl() local
307 surface = vmw_res_to_srf(res); in vmw_present_ioctl()
309 vfb, surface, arg->sid, in vmw_present_ioctl()
314 vmw_surface_unreference(&surface); in vmw_present_ioctl()
Dvmwgfx_kms.h117 struct vmw_surface *surface; member
318 struct vmw_surface *surface,
Dvmwgfx_stdu.c987 srf = &vfbs->surface->res; in vmw_kms_stdu_surface_dirty()
1175 if (new_vfbs && new_vfbs->surface->base_size.width == hdisplay && in vmw_stdu_primary_plane_prepare_fb()
1176 new_vfbs->surface->base_size.height == vdisplay) in vmw_stdu_primary_plane_prepare_fb()
1219 content_srf = *new_vfbs->surface; in vmw_stdu_primary_plane_prepare_fb()
1264 vps->surf = vmw_surface_reference(new_vfbs->surface); in vmw_stdu_primary_plane_prepare_fb()
Dvmwgfx_scrn.c931 srf = &vfbs->surface->res; in vmw_kms_sou_do_surface_dirty()
Dvmwgfx_drv.h934 struct vmw_surface *surface,
/drivers/gpu/drm/radeon/
Dradeon_asic.c234 .surface = {
302 .surface = {
398 .surface = {
466 .surface = {
534 .surface = {
602 .surface = {
670 .surface = {
738 .surface = {
806 .surface = {
874 .surface = {
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Dradeon.h1942 } surface; member
2762 #define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->surface.set_reg((rdev), (r), (f)…
2763 #define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->surface.clear_reg((rdev), (r)))
/drivers/gpu/drm/qxl/
Dqxl_draw.c72 make_drawable(struct qxl_device *qdev, int surface, uint8_t type, in make_drawable() argument
85 drawable->surface_id = surface; /* Only primary for now */ in make_drawable()
/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/
Dcom.fuc416 // Calculates the hw swizzle mask and adjusts the surface's xcnt to match
515 // Setup to handle a tiled surface
536 // $p2: set if dst surface
666 // Setup to handle a linear surface
/drivers/video/fbdev/
DKconfig2449 pre-allocated frame buffer surface.
2451 Configuration re: surface address, size, and format must be provided
/drivers/gpu/drm/i915/
Dintel_display.c15416 u32 surface; member
15478 error->plane[i].surface = I915_READ(DSPSURF(i)); in intel_display_capture_error_state()
15549 err_printf(m, " SURF: %08x\n", error->plane[i].surface); in intel_display_print_error_state()