| /drivers/staging/rtl8723bs/hal/ |
| D | HalHWImg8723B_BB.c | 283 u32 v2 = Array[i+1]; in ODM_ReadAndConfig_MP_8723B_AGC_TAB() local
287 odm_ConfigBB_AGC_8723B(pDM_Odm, v1, bMaskDWord, v2); in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
296 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
297 } else if (!CheckPositive(pDM_Odm, v1, v2)) { in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
299 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
300 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
302 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
303 if (!CheckNegative(pDM_Odm, v1, v2)) in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
307 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
315 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
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| D | HalHWImg8723B_MAC.c | 254 u32 v2 = Array[i+1]; in ODM_ReadAndConfig_MP_8723B_MAC_REG() local
258 odm_ConfigMAC_8723B(pDM_Odm, v1, (u8)v2); in ODM_ReadAndConfig_MP_8723B_MAC_REG()
267 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_MAC_REG()
268 } else if (!CheckPositive(pDM_Odm, v1, v2)) { in ODM_ReadAndConfig_MP_8723B_MAC_REG()
270 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_MAC_REG()
271 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_MAC_REG()
273 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_MAC_REG()
274 if (!CheckNegative(pDM_Odm, v1, v2)) in ODM_ReadAndConfig_MP_8723B_MAC_REG()
278 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_MAC_REG()
284 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_MAC_REG()
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| D | HalHWImg8723B_RF.c | 285 u32 v2 = Array[i+1]; in ODM_ReadAndConfig_MP_8723B_RadioA() local
289 odm_ConfigRF_RadioA_8723B(pDM_Odm, v1, v2); in ODM_ReadAndConfig_MP_8723B_RadioA()
298 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_RadioA()
299 } else if (!CheckPositive(pDM_Odm, v1, v2)) { in ODM_ReadAndConfig_MP_8723B_RadioA()
301 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_RadioA()
302 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_RadioA()
304 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_RadioA()
305 if (!CheckNegative(pDM_Odm, v1, v2)) in ODM_ReadAndConfig_MP_8723B_RadioA()
309 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_RadioA()
317 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_RadioA()
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| /drivers/char/mwave/ |
| D | mwavedd.h | 84 #define PRINTK_3(f,s,v1,v2) \ argument
86 printk(s,v1,v2); \
89 #define PRINTK_4(f,s,v1,v2,v3) \ argument
91 printk(s,v1,v2,v3); \
94 #define PRINTK_5(f,s,v1,v2,v3,v4) \ argument
96 printk(s,v1,v2,v3,v4); \
99 #define PRINTK_6(f,s,v1,v2,v3,v4,v5) \ argument
101 printk(s,v1,v2,v3,v4,v5); \
104 #define PRINTK_7(f,s,v1,v2,v3,v4,v5,v6) \ argument
106 printk(s,v1,v2,v3,v4,v5,v6); \
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| /drivers/staging/rtl8188eu/hal/ |
| D | rf_cfg.c | 151 #define READ_NEXT_PAIR(v1, v2, i) \ argument
154 v2 = array[i+1]; \
201 u32 v2 = array[i+1]; in rtl88e_phy_config_rf_with_headerfile() local
204 rtl8188e_config_rf_reg(adapt, v1, v2); in rtl88e_phy_config_rf_with_headerfile()
208 READ_NEXT_PAIR(v1, v2, i); in rtl88e_phy_config_rf_with_headerfile()
209 while (v2 != 0xDEAD && v2 != 0xCDEF && in rtl88e_phy_config_rf_with_headerfile()
210 v2 != 0xCDCD && i < array_len - 2) in rtl88e_phy_config_rf_with_headerfile()
211 READ_NEXT_PAIR(v1, v2, i); in rtl88e_phy_config_rf_with_headerfile()
214 READ_NEXT_PAIR(v1, v2, i); in rtl88e_phy_config_rf_with_headerfile()
215 while (v2 != 0xDEAD && v2 != 0xCDEF && in rtl88e_phy_config_rf_with_headerfile()
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| D | bb_cfg.c | 161 u32 v2 = array[i + 1]; in set_baseband_agc_config() local
164 phy_set_bb_reg(adapt, v1, bMaskDWord, v2); in set_baseband_agc_config()
396 u32 v2 = array[i + 1]; in set_baseband_phy_config() local
399 rtl_bb_delay(adapt, v1, v2); in set_baseband_phy_config()
576 u32 v2 = array[i + 1]; in config_bb_with_pgheader() local
580 rtl_addr_delay(adapt, v1, v2, v3); in config_bb_with_pgheader()
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| /drivers/firmware/google/ |
| D | memconsole-x86-legacy.c | 47 } __packed v2; member
78 hdr->v2.buffer_addr, hdr->v2.start, in found_v2_header()
79 hdr->v2.end, hdr->v2.num_bytes); in found_v2_header()
81 memconsole_baseaddr = phys_to_virt(hdr->v2.buffer_addr + hdr->v2.start); in found_v2_header()
82 memconsole_length = hdr->v2.end - hdr->v2.start; in found_v2_header()
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| /drivers/staging/lustre/include/linux/libcfs/ |
| D | libcfs_private.h | 199 #define LASSERT_ATOMIC_GT_LT(a, v1, v2) \ argument
202 LASSERTF(__v > v1 && __v < v2, "value: %d\n", __v); \
206 #define LASSERT_ATOMIC_GT_LE(a, v1, v2) \ argument
209 LASSERTF(__v > v1 && __v <= v2, "value: %d\n", __v); \
213 #define LASSERT_ATOMIC_GE_LT(a, v1, v2) \ argument
216 LASSERTF(__v >= v1 && __v < v2, "value: %d\n", __v); \
220 #define LASSERT_ATOMIC_GE_LE(a, v1, v2) \ argument
223 LASSERTF(__v >= v1 && __v <= v2, "value: %d\n", __v); \
234 #define LASSERT_ATOMIC_GT_LT(a, v1, v2) do {} while (0) argument
235 #define LASSERT_ATOMIC_GT_LE(a, v1, v2) do {} while (0) argument
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| /drivers/staging/rtlwifi/phydm/rtl8822b/ |
| D | halhwimg8822b_bb.c | 1356 u32 v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; in odm_read_and_config_mp_8822b_agc_tab() local
1363 v2 = array[i + 1]; in odm_read_and_config_mp_8822b_agc_tab()
1376 pre_v2 = v2; in odm_read_and_config_mp_8822b_agc_tab()
1386 if (check_positive(dm, pre_v1, pre_v2, v1, v2)) { in odm_read_and_config_mp_8822b_agc_tab()
1394 odm_config_bb_agc_8822b(dm, v1, MASKDWORD, v2); in odm_read_and_config_mp_8822b_agc_tab()
1849 u32 v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; in odm_read_and_config_mp_8822b_phy_reg() local
1856 v2 = array[i + 1]; in odm_read_and_config_mp_8822b_phy_reg()
1869 pre_v2 = v2; in odm_read_and_config_mp_8822b_phy_reg()
1879 if (check_positive(dm, pre_v1, pre_v2, v1, v2)) { in odm_read_and_config_mp_8822b_phy_reg()
1887 odm_config_bb_phy_8822b(dm, v1, MASKDWORD, v2); in odm_read_and_config_mp_8822b_phy_reg()
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| D | halhwimg8822b_mac.c | 179 u32 v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; in odm_read_and_config_mp_8822b_mac_reg() local
186 v2 = array[i + 1]; in odm_read_and_config_mp_8822b_mac_reg()
199 pre_v2 = v2; in odm_read_and_config_mp_8822b_mac_reg()
209 if (check_positive(dm, pre_v1, pre_v2, v1, v2)) { in odm_read_and_config_mp_8822b_mac_reg()
217 odm_config_mac_8822b(dm, v1, (u8)v2); in odm_read_and_config_mp_8822b_mac_reg()
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| /drivers/net/wireless/ath/ath9k/ |
| D | rng.c | 32 u32 v1, v2, rng_last = sc->rng_last; in ath9k_rng_data_read() local
43 v2 = REG_READ(ah, AR_PHY_TST_ADC) & 0xffff; in ath9k_rng_data_read()
46 if (v1 && v2 && rng_last != v1 && v1 != v2 && v1 != 0xffff && in ath9k_rng_data_read()
47 v2 != 0xffff) in ath9k_rng_data_read()
48 buf[j++] = (v1 << 16) | v2; in ath9k_rng_data_read()
50 rng_last = v2; in ath9k_rng_data_read()
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| /drivers/clocksource/ |
| D | acpi_pm.c | 43 u32 v1 = 0, v2 = 0, v3 = 0; in acpi_pm_read_verified() local
53 v2 = read_pmtmr(); in acpi_pm_read_verified()
55 } while (unlikely((v1 > v2 && v1 < v3) || (v2 > v3 && v2 < v1) in acpi_pm_read_verified()
56 || (v3 > v1 && v3 < v2))); in acpi_pm_read_verified()
58 return v2; in acpi_pm_read_verified()
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| D | h8300_timer16.c | 39 unsigned short v1, v2, v3; in timer16_get_counter() local
48 v2 = ioread16be(p->mapbase + TCNT); in timer16_get_counter()
51 } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) in timer16_get_counter()
52 || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); in timer16_get_counter()
55 return v2; in timer16_get_counter()
57 return v2 + 0x10000; in timer16_get_counter()
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| D | h8300_tpu.c | 44 unsigned long v1, v2, v3; in tpu_get_counter() local
53 v2 = read_tcnt32(p); in tpu_get_counter()
56 } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) in tpu_get_counter()
57 || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); in tpu_get_counter()
59 *val = v2; in tpu_get_counter()
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| /drivers/gpu/drm/radeon/ |
| D | atombios_encoders.c | 557 LVDS_ENCODER_CONTROL_PS_ALLOCATION_V2 v2; member
625 args.v2.ucMisc = 0; in atombios_digital_setup()
626 args.v2.ucAction = action; in atombios_digital_setup()
629 args.v2.ucMisc |= PANEL_ENCODER_MISC_COHERENT; in atombios_digital_setup()
632 args.v2.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE; in atombios_digital_setup()
633 args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_digital_setup()
634 args.v2.ucTruncate = 0; in atombios_digital_setup()
635 args.v2.ucSpatial = 0; in atombios_digital_setup()
636 args.v2.ucTemporal = 0; in atombios_digital_setup()
637 args.v2.ucFRC = 0; in atombios_digital_setup()
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| /drivers/net/wireless/realtek/rtlwifi/rtl8188ee/ |
| D | phy.c | 418 #define READ_NEXT_PAIR(v1, v2, i) \ argument
421 v2 = array_table[i+1]; \
428 u32 v2; in handle_branch1() local
433 v2 = array_table[i+1]; in handle_branch1()
435 _rtl8188e_config_bb_reg(hw, v1, v2); in handle_branch1()
443 READ_NEXT_PAIR(v1, v2, i); in handle_branch1()
444 while (v2 != 0xDEAD && in handle_branch1()
445 v2 != 0xCDEF && in handle_branch1()
446 v2 != 0xCDCD && i < arraylen - 2) in handle_branch1()
447 READ_NEXT_PAIR(v1, v2, i); in handle_branch1()
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| /drivers/net/wireless/realtek/rtlwifi/rtl8192ee/ |
| D | phy.c | 697 #define READ_NEXT_PAIR(v1, v2, i) \ argument
701 v2 = array[i+1]; \
711 u32 v1 = 0, v2 = 0; in phy_config_bb_with_hdr_file() local
719 v2 = array[i+1]; in phy_config_bb_with_hdr_file()
721 _rtl92ee_config_bb_reg(hw, v1, v2); in phy_config_bb_with_hdr_file()
729 READ_NEXT_PAIR(v1, v2, i); in phy_config_bb_with_hdr_file()
730 while (v2 != 0xDEAD && in phy_config_bb_with_hdr_file()
731 v2 != 0xCDEF && in phy_config_bb_with_hdr_file()
732 v2 != 0xCDCD && i < len - 2) { in phy_config_bb_with_hdr_file()
733 READ_NEXT_PAIR(v1, v2, i); in phy_config_bb_with_hdr_file()
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| /drivers/net/wireless/intel/iwlwifi/mvm/ |
| D | offloading.c | 97 struct iwl_proto_offload_cmd_v2 v2; in iwl_mvm_send_proto_offload() member
184 BUILD_BUG_ON(sizeof(cmd.v2.target_ipv6_addr[0]) != in iwl_mvm_send_proto_offload()
193 memcpy(cmd.v2.target_ipv6_addr[i], in iwl_mvm_send_proto_offload()
195 sizeof(cmd.v2.target_ipv6_addr[i])); in iwl_mvm_send_proto_offload()
201 memcpy(cmd.v2.ndp_mac_addr, vif->addr, ETH_ALEN); in iwl_mvm_send_proto_offload()
237 common = &cmd.v2.common; in iwl_mvm_send_proto_offload()
238 size = sizeof(cmd.v2); in iwl_mvm_send_proto_offload()
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | atombios_encoders.c | 562 DIG_ENCODER_CONTROL_PARAMETERS_V2 v2; member
750 DIG_TRANSMITTER_CONTROL_PARAMETERS_V2 v2; member
892 args.v2.ucAction = action; in amdgpu_atombios_encoder_setup_dig_transmitter()
894 args.v2.usInitInfo = cpu_to_le16(connector_object_id); in amdgpu_atombios_encoder_setup_dig_transmitter()
896 args.v2.asMode.ucLaneSel = lane_num; in amdgpu_atombios_encoder_setup_dig_transmitter()
897 args.v2.asMode.ucLaneSet = lane_set; in amdgpu_atombios_encoder_setup_dig_transmitter()
900 args.v2.usPixelClock = cpu_to_le16(dp_clock / 10); in amdgpu_atombios_encoder_setup_dig_transmitter()
902 args.v2.usPixelClock = cpu_to_le16((amdgpu_encoder->pixel_clock / 2) / 10); in amdgpu_atombios_encoder_setup_dig_transmitter()
904 args.v2.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dig_transmitter()
907 args.v2.acConfig.ucEncoderSel = dig_encoder; in amdgpu_atombios_encoder_setup_dig_transmitter()
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| D | atombios_dp.c | 54 PROCESS_AUX_CHANNEL_TRANSACTION_PARAMETERS_V2 v2; member
78 args.v2.lpAuxRequest = cpu_to_le16((u16)(0 + 4)); in amdgpu_atombios_dp_process_aux_ch()
79 args.v2.lpDataOut = cpu_to_le16((u16)(16 + 4)); in amdgpu_atombios_dp_process_aux_ch()
80 args.v2.ucDataOutLen = 0; in amdgpu_atombios_dp_process_aux_ch()
81 args.v2.ucChannelID = chan->rec.i2c_id; in amdgpu_atombios_dp_process_aux_ch()
82 args.v2.ucDelay = delay / 10; in amdgpu_atombios_dp_process_aux_ch()
83 args.v2.ucHPD_ID = chan->rec.hpd; in amdgpu_atombios_dp_process_aux_ch()
87 *ack = args.v2.ucReplyStatus; in amdgpu_atombios_dp_process_aux_ch()
90 if (args.v2.ucReplyStatus == 1) { in amdgpu_atombios_dp_process_aux_ch()
96 if (args.v2.ucReplyStatus == 2) { in amdgpu_atombios_dp_process_aux_ch()
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| /drivers/net/wireless/intersil/p54/ |
| D | fwio.c | 245 eeprom_hdr->v2.offset = cpu_to_le32(offset); in p54_download_eeprom()
246 eeprom_hdr->v2.len = cpu_to_le16(len); in p54_download_eeprom()
247 eeprom_hdr->v2.magic2 = 0xf; in p54_download_eeprom()
248 memcpy(eeprom_hdr->v2.magic, (const char *)"LOCK", 4); in p54_download_eeprom()
375 setup->v2.rx_addr = cpu_to_le32(priv->rx_end); in p54_setup_mac()
376 setup->v2.max_rx = cpu_to_le16(priv->rx_mtu); in p54_setup_mac()
377 setup->v2.rxhw = cpu_to_le16(priv->rxhw); in p54_setup_mac()
378 setup->v2.timer = cpu_to_le16(priv->wakeup_timer); in p54_setup_mac()
379 setup->v2.truncate = cpu_to_le16(48896); in p54_setup_mac()
380 setup->v2.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask); in p54_setup_mac()
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| /drivers/mfd/ |
| D | tps65010.c | 198 u8 value, v2; in dbg_show() local
263 v2 = i2c_smbus_read_byte_data(tps->client, TPS_LED1_PER); in dbg_show()
266 ? ((v2 & 0x80) ? "on" : "off") in dbg_show()
267 : ((v2 & 0x80) ? "blink" : "(nPG)"), in dbg_show()
268 value, v2, in dbg_show()
269 (value & 0x7f) * 10, (v2 & 0x7f) * 100); in dbg_show()
272 v2 = i2c_smbus_read_byte_data(tps->client, TPS_LED2_PER); in dbg_show()
275 ? ((v2 & 0x80) ? "on" : "off") in dbg_show()
276 : ((v2 & 0x80) ? "blink" : "off"), in dbg_show()
277 value, v2, in dbg_show()
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| /drivers/net/ethernet/apm/xgene-v2/ |
| D | Kconfig | 2 tristate "APM X-Gene SoC Ethernet-v2 Driver"
7 which uses a linked list of DMA descriptor architecture (v2) for
11 be called xgene-enet-v2.
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| D | Makefile | 5 xgene-enet-v2-objs := main.o mac.o enet.o ring.o mdio.o ethtool.o
6 obj-$(CONFIG_NET_XGENE_V2) += xgene-enet-v2.o
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| /drivers/net/ethernet/chelsio/cxgb3/ |
| D | aq100x.c | 269 unsigned int v, v2, gpio, wait; in t3_aq100x_phy_prep() local
344 v = v2 = 0; in t3_aq100x_phy_prep()
346 t3_mdio_read(phy, MDIO_MMD_PHYXS, AQ_XAUI_TX_CFG, &v2); in t3_aq100x_phy_prep()
347 if (v != 0x1b || v2 != 0x1b) in t3_aq100x_phy_prep()
350 phy_addr, v, v2); in t3_aq100x_phy_prep()
|