| /drivers/net/wireless/mediatek/mt7601u/ |
| D | init.c | 182 u32 *vals; in mt7601u_init_wcid_mem() local
185 vals = kmalloc(sizeof(*vals) * N_WCIDS * 2, GFP_KERNEL); in mt7601u_init_wcid_mem()
186 if (!vals) in mt7601u_init_wcid_mem()
190 vals[i * 2] = 0xffffffff; in mt7601u_init_wcid_mem()
191 vals[i * 2 + 1] = 0x00ffffff; in mt7601u_init_wcid_mem()
195 vals, N_WCIDS * 2); in mt7601u_init_wcid_mem()
196 kfree(vals); in mt7601u_init_wcid_mem()
203 u32 vals[4] = {}; in mt7601u_init_key_mem() local
206 vals, ARRAY_SIZE(vals)); in mt7601u_init_key_mem()
211 u32 *vals; in mt7601u_init_wcid_attr_mem() local
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| /drivers/iio/orientation/ |
| D | hid-sensor-rotation.c | 69 int size, int *vals, int *val_len, in dev_rot_read_raw() argument
76 vals[0] = 0; in dev_rot_read_raw()
77 vals[1] = 0; in dev_rot_read_raw()
83 vals[i] = rot_state->sampled_vals[i]; in dev_rot_read_raw()
90 vals[0] = rot_state->scale_pre_decml; in dev_rot_read_raw()
91 vals[1] = rot_state->scale_post_decml; in dev_rot_read_raw()
95 *vals = rot_state->value_offset; in dev_rot_read_raw()
100 &rot_state->common_attributes, &vals[0], &vals[1]); in dev_rot_read_raw()
104 &rot_state->common_attributes, &vals[0], &vals[1]); in dev_rot_read_raw()
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| /drivers/iio/ |
| D | industrialio-core.c | 580 int size, const int *vals) in __iio_format_value() argument
588 return snprintf(buf, len, "%d", vals[0]); in __iio_format_value()
592 if (vals[1] < 0) in __iio_format_value()
593 return snprintf(buf, len, "-%d.%06u%s", abs(vals[0]), in __iio_format_value()
594 -vals[1], scale_db ? " dB" : ""); in __iio_format_value()
596 return snprintf(buf, len, "%d.%06u%s", vals[0], vals[1], in __iio_format_value()
599 if (vals[1] < 0) in __iio_format_value()
600 return snprintf(buf, len, "-%d.%09u", abs(vals[0]), in __iio_format_value()
601 -vals[1]); in __iio_format_value()
603 return snprintf(buf, len, "%d.%09u", vals[0], vals[1]); in __iio_format_value()
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| D | inkern.c | 532 int vals[INDIO_MAX_RAW_ELEMENTS]; in iio_channel_read() local
545 vals, &val_len, info); in iio_channel_read()
546 *val = vals[0]; in iio_channel_read()
547 *val2 = vals[1]; in iio_channel_read()
726 const int **vals, int *type, int *length, in iio_channel_read_avail() argument
733 vals, type, length, info); in iio_channel_read_avail()
737 const int **vals, int *length) in iio_read_avail_channel_raw() argument
749 vals, &type, length, IIO_CHAN_INFO_RAW); in iio_read_avail_channel_raw()
766 const int *vals; in iio_channel_read_max() local
773 ret = iio_channel_read_avail(chan, &vals, type, &length, info); in iio_channel_read_max()
[all …]
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| /drivers/clk/uniphier/ |
| D | clk-uniphier-mux.c | 27 const unsigned int *vals; member
37 mux->vals[index]); in uniphier_clk_mux_set_parent()
53 if ((mux->masks[i] & val) == mux->vals[i]) in uniphier_clk_mux_get_parent()
87 mux->vals = data->vals; in uniphier_clk_register_mux()
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| D | clk-uniphier-mio.c | 56 .vals = { \
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| /drivers/pinctrl/ |
| D | pinctrl-single.c | 90 struct pcs_func_vals *vals; member
350 struct pcs_func_vals *vals; in pcs_set_mux() local
354 vals = &func->vals[i]; in pcs_set_mux()
356 val = pcs->read(vals->reg); in pcs_set_mux()
359 mask = vals->mask; in pcs_set_mux()
364 val |= (vals->val & mask); in pcs_set_mux()
365 pcs->write(val, vals->reg); in pcs_set_mux()
738 struct pcs_func_vals *vals, in pcs_add_function() argument
750 function->vals = vals; in pcs_add_function()
959 struct pcs_func_vals *vals; in pcs_parse_one_pinctrl_entry() local
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| /drivers/gpu/drm/i915/ |
| D | intel_dp_aux_backlight.c | 85 uint8_t vals[2] = { 0x0 }; in intel_dp_aux_set_backlight() local
87 vals[0] = level; in intel_dp_aux_set_backlight()
91 vals[0] = (level & 0xFF00) >> 8; in intel_dp_aux_set_backlight()
92 vals[1] = (level & 0xFF); in intel_dp_aux_set_backlight()
95 vals, sizeof(vals)) < 0) { in intel_dp_aux_set_backlight()
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| D | intel_engine_cs.c | 928 u8 vals[3] = { 0, 0, 0 }; in skl_tune_iz_hashing() local
948 vals[i] = 3 - ss; in skl_tune_iz_hashing()
951 if (vals[0] == 0 && vals[1] == 0 && vals[2] == 0) in skl_tune_iz_hashing()
959 GEN9_IZ_HASHING(2, vals[2]) | in skl_tune_iz_hashing()
960 GEN9_IZ_HASHING(1, vals[1]) | in skl_tune_iz_hashing()
961 GEN9_IZ_HASHING(0, vals[0])); in skl_tune_iz_hashing()
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| /drivers/input/ |
| D | input.c | 97 struct input_value *vals, unsigned int count) in input_to_handler() argument
100 struct input_value *end = vals; in input_to_handler()
104 for (v = vals; v != vals + count; v++) { in input_to_handler()
111 count = end - vals; in input_to_handler()
118 handler->events(handle, vals, count); in input_to_handler()
120 for (v = vals; v != vals + count; v++) in input_to_handler()
132 struct input_value *vals, unsigned int count) in input_pass_values() argument
144 count = input_to_handler(handle, vals, count); in input_pass_values()
148 count = input_to_handler(handle, vals, count); in input_pass_values()
158 for (v = vals; v != vals + count; v++) { in input_pass_values()
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| D | evdev.c | 259 const struct input_value *vals, unsigned int count, in evdev_pass_values() argument
275 for (v = vals; v != vals + count; v++) { in evdev_pass_values()
303 const struct input_value *vals, unsigned int count) in evdev_events() argument
319 evdev_pass_values(client, vals, count, ev_time); in evdev_events()
322 evdev_pass_values(client, vals, count, ev_time); in evdev_events()
333 struct input_value vals[] = { { type, code, value } }; in evdev_event() local
335 evdev_events(handle, vals, 1); in evdev_event()
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| /drivers/net/ethernet/chelsio/cxgb4vf/ |
| D | t4vf_hw.c | 576 const u32 *params, u32 *vals) in t4vf_query_params() argument
599 *vals++ = be32_to_cpu(p->val); in t4vf_query_params()
614 const u32 *params, const u32 *vals) in t4vf_set_params() argument
633 p->val = cpu_to_be32(*vals++); in t4vf_set_params()
803 u32 params[7], vals[7]; in t4vf_get_sge_params() local
820 v = t4vf_query_params(adapter, 7, params, vals); in t4vf_get_sge_params()
823 sge_params->sge_control = vals[0]; in t4vf_get_sge_params()
824 sge_params->sge_host_page_size = vals[1]; in t4vf_get_sge_params()
825 sge_params->sge_fl_buffer_size[0] = vals[2]; in t4vf_get_sge_params()
826 sge_params->sge_fl_buffer_size[1] = vals[3]; in t4vf_get_sge_params()
[all …]
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| /drivers/net/ethernet/netronome/nfp/ |
| D | nfp_net_debugfs.c | 73 rxd->vals[0], rxd->vals[1]); in nfp_net_debugfs_rx_q_read()
157 txd->vals[0], txd->vals[1], in nfp_net_debugfs_tx_q_read()
158 txd->vals[2], txd->vals[3]); in nfp_net_debugfs_tx_q_read()
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| /drivers/cpufreq/ |
| D | s3c24xx-cpufreq.c | 642 struct cpufreq_frequency_table *vals; in s3c_plltab_register() local
645 size = sizeof(*vals) * (plls_no + 1); in s3c_plltab_register()
647 vals = kzalloc(size, GFP_KERNEL); in s3c_plltab_register()
648 if (vals) { in s3c_plltab_register()
649 memcpy(vals, plls, size); in s3c_plltab_register()
650 pll_reg = vals; in s3c_plltab_register()
654 vals += plls_no; in s3c_plltab_register()
655 vals->frequency = CPUFREQ_TABLE_END; in s3c_plltab_register()
661 return vals ? 0 : -ENOMEM; in s3c_plltab_register()
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| /drivers/iio/magnetometer/ |
| D | mag3110.c | 103 const int (*vals)[2], int n) in mag3110_show_int_plus_micros()
109 "%d.%06d ", vals[n][0], vals[n][1]); in mag3110_show_int_plus_micros()
117 static int mag3110_get_int_plus_micros_index(const int (*vals)[2], int n, in mag3110_get_int_plus_micros_index()
121 if (val == vals[n][0] && val2 == vals[n][1]) in mag3110_get_int_plus_micros_index()
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| /drivers/media/i2c/ |
| D | saa717x.c | 824 } vals[] = { in set_h_prescale() local
837 static const int count = ARRAY_SIZE(vals); in set_h_prescale()
842 if (vals[i].xpsc == prescale) in set_h_prescale()
848 saa717x_write(sd, 0x60 + task_shift, vals[i].xpsc); in set_h_prescale()
850 saa717x_write(sd, 0x61 + task_shift, vals[i].xacl); in set_h_prescale()
853 (vals[i].xc2_1 << 3) | vals[i].xdcg); in set_h_prescale()
856 (vals[i].vpfy << 2) | vals[i].vpfy); in set_h_prescale()
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| D | ov2640.c | 653 const struct regval_list *vals) in ov2640_write_array() argument
657 while ((vals->reg_num != 0xff) || (vals->value != 0xff)) { in ov2640_write_array()
659 vals->reg_num, vals->value); in ov2640_write_array()
661 vals->reg_num, vals->value); in ov2640_write_array()
665 vals++; in ov2640_write_array()
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| /drivers/media/i2c/soc_camera/ |
| D | ov5642.c | 724 struct regval_list *vals) in ov5642_write_array() argument
726 while (vals->reg_num != 0xffff || vals->value != 0xff) { in ov5642_write_array()
727 int ret = reg_write(client, vals->reg_num, vals->value); in ov5642_write_array()
730 vals++; in ov5642_write_array()
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| /drivers/nvmem/ |
| D | bcm-ocotp.c | 131 static const u32 vals[] = OTPC_PROG_EN_SEQ; in enable_ocotp_program() local
137 for (i = 0; i < ARRAY_SIZE(vals); i++) { in enable_ocotp_program()
138 write_cpu_data(base, vals[i]); in enable_ocotp_program()
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| /drivers/iio/health/ |
| D | afe4403.c | 147 int vals[2]; in afe440x_show_register() local
157 vals[0] = afe440x_attr->val_table[reg_val].integer; in afe440x_show_register()
158 vals[1] = afe440x_attr->val_table[reg_val].fract; in afe440x_show_register()
160 return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals); in afe440x_show_register()
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| D | afe4404.c | 181 int vals[2]; in afe440x_show_register() local
191 vals[0] = afe440x_attr->val_table[reg_val].integer; in afe440x_show_register()
192 vals[1] = afe440x_attr->val_table[reg_val].fract; in afe440x_show_register()
194 return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals); in afe440x_show_register()
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| /drivers/iio/dac/ |
| D | dpot-dac.c | 99 const int **vals, int *type, int *length, in dpot_dac_read_avail() argument
107 return iio_read_avail_channel_raw(dac->dpot, vals, length); in dpot_dac_read_avail()
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| /drivers/extcon/ |
| D | extcon-arizona.c | 1259 u32 *vals; in arizona_extcon_get_micd_configs() local
1265 vals = kcalloc(nconfs, sizeof(u32), GFP_KERNEL); in arizona_extcon_get_micd_configs()
1266 if (!vals) in arizona_extcon_get_micd_configs()
1269 ret = device_property_read_u32_array(arizona->dev, prop, vals, nconfs); in arizona_extcon_get_micd_configs()
1282 micd_configs[i].src = vals[j++] ? ARIZONA_ACCDET_SRC : 0; in arizona_extcon_get_micd_configs()
1283 micd_configs[i].bias = vals[j++]; in arizona_extcon_get_micd_configs()
1284 micd_configs[i].gpio = vals[j++]; in arizona_extcon_get_micd_configs()
1291 kfree(vals); in arizona_extcon_get_micd_configs()
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| /drivers/media/pci/solo6x10/ |
| D | solo6x10-tw28.c | 513 static void saa712x_write_regs(struct solo_dev *dev, const u8 *vals, in saa712x_write_regs() argument
516 for (; start < n; start++, vals++) { in saa712x_write_regs()
525 solo_i2c_writebyte(dev, SOLO_I2C_SAA, 0x46, start, *vals); in saa712x_write_regs()
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| /drivers/pinctrl/uniphier/ |
| D | pinctrl-uniphier-core.c | 42 u32 vals[0]; member
708 ret = regmap_bulk_read(priv->regmap, r->base, r->vals, in uniphier_pinctrl_suspend()
724 ret = regmap_bulk_write(priv->regmap, r->base, r->vals, in uniphier_pinctrl_resume()
755 sizeof(*region) + sizeof(region->vals[0]) * nregs, in uniphier_pinctrl_add_reg_region()
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