| /sound/soc/codecs/ |
| D | nau8825.c | 335 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSVOL_CTRL, in nau8825_hpvol_ramp()
344 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSVOL_CTRL, in nau8825_hpvol_ramp()
459 regmap_read(nau8825->regmap, nau8825_xtalk_baktab[i].reg, in nau8825_xtalk_backup()
479 regmap_write(nau8825->regmap, nau8825_xtalk_baktab[i].reg, in nau8825_xtalk_restore()
487 regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL, in nau8825_xtalk_prepare_dac()
496 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_xtalk_prepare_dac()
500 regmap_update_bits(nau8825->regmap, NAU8825_REG_RDAC, in nau8825_xtalk_prepare_dac()
505 regmap_update_bits(nau8825->regmap, NAU8825_REG_POWER_UP_CONTROL, in nau8825_xtalk_prepare_dac()
510 regmap_update_bits(nau8825->regmap, NAU8825_REG_POWER_UP_CONTROL, in nau8825_xtalk_prepare_dac()
514 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSD_CTRL, in nau8825_xtalk_prepare_dac()
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| D | cs35l35.c | 203 regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, in cs35l35_sdin_event()
206 regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, in cs35l35_sdin_event()
209 regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, in cs35l35_sdin_event()
213 regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, in cs35l35_sdin_event()
216 regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, in cs35l35_sdin_event()
220 regmap_update_bits(cs35l35->regmap, CS35L35_AMP_DIG_VOL_CTL, in cs35l35_sdin_event()
225 regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, in cs35l35_sdin_event()
229 regmap_update_bits(cs35l35->regmap, CS35L35_AMP_DIG_VOL_CTL, in cs35l35_sdin_event()
251 regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, in cs35l35_main_amp_event()
255 regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, in cs35l35_main_amp_event()
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| D | nau8824.c | 423 regmap_update_bits(nau8824->regmap, NAU8824_REG_ENABLE_LO, in nau8824_output_dac_event()
427 regmap_update_bits(nau8824->regmap, NAU8824_REG_ENABLE_LO, in nau8824_output_dac_event()
445 regmap_update_bits(nau8824->regmap, in nau8824_spk_event()
450 regmap_update_bits(nau8824->regmap, in nau8824_spk_event()
471 regmap_update_bits(nau8824->regmap, in nau8824_pump_event()
476 regmap_update_bits(nau8824->regmap, in nau8824_pump_event()
525 regmap_update_bits(nau8824->regmap, NAU8824_REG_CLK_DIVIDER, in dmic_clock_control()
771 static void nau8824_int_status_clear_all(struct regmap *regmap) in nau8824_int_status_clear_all() argument
778 regmap_read(regmap, NAU8824_REG_IRQ, &active_irq); in nau8824_int_status_clear_all()
782 regmap_write(regmap, in nau8824_int_status_clear_all()
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| D | max98927.c | 166 regmap_update_bits(max98927->regmap, in max98927_dai_set_fmt()
182 regmap_update_bits(max98927->regmap, in max98927_dai_set_fmt()
206 regmap_update_bits(max98927->regmap, in max98927_dai_set_fmt()
211 regmap_update_bits(max98927->regmap, in max98927_dai_set_fmt()
216 regmap_update_bits(max98927->regmap, in max98927_dai_set_fmt()
221 regmap_update_bits(max98927->regmap, in max98927_dai_set_fmt()
227 regmap_update_bits(max98927->regmap, in max98927_dai_set_fmt()
231 regmap_update_bits(max98927->regmap, in max98927_dai_set_fmt()
235 regmap_update_bits(max98927->regmap, in max98927_dai_set_fmt()
267 regmap_update_bits(max98927->regmap, in max98927_set_clock()
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| D | cs35l34.c | 48 struct regmap *regmap; member
247 regmap_update_bits(priv->regmap, CS35L34_PWRCTL3, in cs35l34_sdin_event()
250 ret = regmap_update_bits(priv->regmap, CS35L34_PWRCTL1, in cs35l34_sdin_event()
260 regmap_update_bits(priv->regmap, CS35L34_PWRCTL3, in cs35l34_sdin_event()
263 ret = regmap_update_bits(priv->regmap, CS35L34_PWRCTL1, in cs35l34_sdin_event()
350 regmap_update_bits(priv->regmap, CS35L34_BST_CVTR_V_CTL, in cs35l34_main_amp_event()
353 regmap_update_bits(priv->regmap, CS35L34_PROTECT_CTL, in cs35l34_main_amp_event()
357 regmap_update_bits(priv->regmap, CS35L34_BST_CVTR_V_CTL, in cs35l34_main_amp_event()
359 regmap_update_bits(priv->regmap, CS35L34_PROTECT_CTL, in cs35l34_main_amp_event()
392 ret = regmap_read(priv->regmap, CS35L34_AMP_DIG_VOL_CTL, in cs35l34_mclk_event()
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| D | cs35l33.c | 47 struct regmap *regmap; member
212 regmap_update_bits(priv->regmap, CS35L33_CLASSD_CTL, in cs35l33_spkrdrv_event()
238 regmap_update_bits(priv->regmap, CS35L33_PWRCTL1, in cs35l33_sdin_event()
241 regmap_update_bits(priv->regmap, CS35L33_PWRCTL2, in cs35l33_sdin_event()
248 regmap_update_bits(priv->regmap, CS35L33_CLASSD_CTL, in cs35l33_sdin_event()
255 regmap_update_bits(priv->regmap, CS35L33_PWRCTL2, in cs35l33_sdin_event()
258 regmap_update_bits(priv->regmap, CS35L33_PWRCTL1, in cs35l33_sdin_event()
304 regmap_update_bits(priv->regmap, CS35L33_PWRCTL2, in cs35l33_sdout_event()
306 regmap_update_bits(priv->regmap, CS35L33_CLK_CTL, in cs35l33_sdout_event()
373 regmap_update_bits(priv->regmap, CS35L33_PWRCTL1, in cs35l33_set_bias_level()
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| D | nau8540.c | 352 regmap_read(nau8540->regmap, NAU8540_REG_ADC_SAMPLE_RATE, &osr); in nau8540_hw_params()
356 regmap_update_bits(nau8540->regmap, NAU8540_REG_CLOCK_SRC, in nau8540_hw_params()
377 regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL0, in nau8540_hw_params()
430 regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL0, in nau8540_set_fmt()
433 regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL1, in nau8540_set_fmt()
435 regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL2, in nau8540_set_fmt()
470 regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL4, in nau8540_set_tdm_slot()
473 regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL1, in nau8540_set_tdm_slot()
475 regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL2, in nau8540_set_tdm_slot()
571 static void nau8540_fll_apply(struct regmap *regmap, in nau8540_fll_apply() argument
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| D | max98925.c | 107 regmap_update_bits(max98925->regmap, in max98925_dac_event()
115 regmap_update_bits(max98925->regmap, in max98925_dac_event()
280 regmap_update_bits(max98925->regmap, in max98925_set_sense_data()
283 regmap_update_bits(max98925->regmap, in max98925_set_sense_data()
288 regmap_update_bits(max98925->regmap, in max98925_set_sense_data()
291 regmap_update_bits(max98925->regmap, in max98925_set_sense_data()
308 regmap_update_bits(max98925->regmap, in max98925_dai_set_fmt()
318 regmap_update_bits(max98925->regmap, in max98925_dai_set_fmt()
346 regmap_update_bits(max98925->regmap, MAX98925_FORMAT, in max98925_dai_set_fmt()
362 regmap_update_bits(max98925->regmap, in max98925_set_clock()
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| D | cs43130.c | 252 regmap_update_bits(cs43130->regmap, CS43130_PLL_SET_1, in cs43130_pll_config()
261 regmap_update_bits(cs43130->regmap, CS43130_PLL_SET_2, in cs43130_pll_config()
265 regmap_update_bits(cs43130->regmap, CS43130_PLL_SET_3, in cs43130_pll_config()
269 regmap_update_bits(cs43130->regmap, CS43130_PLL_SET_4, in cs43130_pll_config()
273 regmap_write(cs43130->regmap, CS43130_PLL_SET_5, in cs43130_pll_config()
275 regmap_write(cs43130->regmap, CS43130_PLL_SET_6, pll_entry->pll_divout); in cs43130_pll_config()
276 regmap_write(cs43130->regmap, CS43130_PLL_SET_7, in cs43130_pll_config()
278 regmap_update_bits(cs43130->regmap, CS43130_PLL_SET_8, in cs43130_pll_config()
281 regmap_write(cs43130->regmap, CS43130_PLL_SET_9, in cs43130_pll_config()
283 regmap_update_bits(cs43130->regmap, CS43130_PLL_SET_1, in cs43130_pll_config()
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| D | rt5663.c | 44 struct regmap *regmap; member
1554 regmap_read(rt5663->regmap, RT5663_INT_ST_2, &val); in rt5663_jack_detect()
1579 regmap_write(rt5663->regmap, RT5663_MIC_DECRO_2, in rt5663_jack_detect()
1582 regmap_write(rt5663->regmap, RT5663_MIC_DECRO_3, in rt5663_jack_detect()
1588 regmap_write(rt5663->regmap, RT5663_MIC_DECRO_5, in rt5663_jack_detect()
1591 regmap_write(rt5663->regmap, RT5663_MIC_DECRO_6, in rt5663_jack_detect()
1600 regmap_write(rt5663->regmap, RT5663_MIC_DECRO_2, in rt5663_jack_detect()
1602 regmap_write(rt5663->regmap, RT5663_MIC_DECRO_3, in rt5663_jack_detect()
1608 regmap_write(rt5663->regmap, RT5663_MIC_DECRO_5, in rt5663_jack_detect()
1610 regmap_write(rt5663->regmap, RT5663_MIC_DECRO_6, in rt5663_jack_detect()
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| D | sirf-audio-codec.c | 30 struct regmap *regmap; member
107 static void enable_and_reset_codec(struct regmap *regmap, in enable_and_reset_codec() argument
110 regmap_update_bits(regmap, AUDIO_IC_CODEC_CTRL1, in enable_and_reset_codec()
114 regmap_update_bits(regmap, AUDIO_IC_CODEC_CTRL1, in enable_and_reset_codec()
127 enable_and_reset_codec(sirf_audio_codec->regmap, in atlas6_codec_enable_and_reset_event()
131 regmap_update_bits(sirf_audio_codec->regmap, in atlas6_codec_enable_and_reset_event()
150 enable_and_reset_codec(sirf_audio_codec->regmap, in prima2_codec_enable_and_reset_event()
154 regmap_update_bits(sirf_audio_codec->regmap, in prima2_codec_enable_and_reset_event()
284 regmap_update_bits(sirf_audio_codec->regmap, AUDIO_PORT_IC_TXFIFO_OP, in sirf_audio_codec_tx_enable()
286 regmap_update_bits(sirf_audio_codec->regmap, AUDIO_PORT_IC_TXFIFO_OP, in sirf_audio_codec_tx_enable()
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| D | ad193x.c | 25 struct regmap *regmap; member
136 regmap_update_bits(ad193x->regmap, AD193X_DAC_CTRL2, in ad193x_mute()
140 regmap_update_bits(ad193x->regmap, AD193X_DAC_CTRL2, in ad193x_mute()
169 regmap_update_bits(ad193x->regmap, AD193X_DAC_CTRL1, in ad193x_set_tdm_slot()
172 regmap_update_bits(ad193x->regmap, AD193X_ADC_CTRL2, in ad193x_set_tdm_slot()
246 regmap_update_bits(ad193x->regmap, AD193X_ADC_CTRL1, in ad193x_set_dai_fmt()
248 regmap_update_bits(ad193x->regmap, AD193X_ADC_CTRL2, in ad193x_set_dai_fmt()
251 regmap_update_bits(ad193x->regmap, AD193X_DAC_CTRL1, in ad193x_set_dai_fmt()
310 regmap_update_bits(ad193x->regmap, AD193X_PLL_CLK_CTRL0, in ad193x_hw_params()
313 regmap_update_bits(ad193x->regmap, AD193X_DAC_CTRL2, in ad193x_hw_params()
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| D | jz4740.c | 78 struct regmap *regmap; member
197 regmap_update_bits(jz4740_codec->regmap, JZ4740_REG_CODEC_2, in jz4740_codec_hw_params()
227 static void jz4740_codec_wakeup(struct regmap *regmap) in jz4740_codec_wakeup() argument
229 regmap_update_bits(regmap, JZ4740_REG_CODEC_1, in jz4740_codec_wakeup()
233 regmap_update_bits(regmap, JZ4740_REG_CODEC_1, in jz4740_codec_wakeup()
236 regcache_sync(regmap); in jz4740_codec_wakeup()
243 struct regmap *regmap = jz4740_codec->regmap; in jz4740_codec_set_bias_level() local
256 regmap_update_bits(regmap, JZ4740_REG_CODEC_1, mask, value); in jz4740_codec_set_bias_level()
261 jz4740_codec_wakeup(regmap); in jz4740_codec_set_bias_level()
270 regmap_update_bits(regmap, JZ4740_REG_CODEC_1, mask, value); in jz4740_codec_set_bias_level()
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| D | zx_aud96p22.c | 54 struct regmap *regmap; member
62 struct regmap *regmap = priv->regmap; in aud96p22_adc_event() local
68 regmap_update_bits(regmap, AUD96P22_RESET, RST_ADC_DPZ, 0); in aud96p22_adc_event()
69 regmap_update_bits(regmap, AUD96P22_RESET, RST_ADC_DPZ, RST_ADC_DPZ); in aud96p22_adc_event()
79 struct regmap *regmap = priv->regmap; in aud96p22_dac_event() local
85 regmap_update_bits(regmap, AUD96P22_RESET, RST_DAC_DPZ, 0); in aud96p22_dac_event()
86 regmap_update_bits(regmap, AUD96P22_RESET, RST_DAC_DPZ, RST_DAC_DPZ); in aud96p22_dac_event()
278 struct regmap *regmap = priv->regmap; in aud96p22_set_fmt() local
293 regmap_update_bits(regmap, AUD96P22_I2S1_CONFIG_0, I2S1_MS_MODE, val); in aud96p22_set_fmt()
310 regmap_update_bits(regmap, AUD96P22_I2S1_CONFIG_0, I2S1_MODE_MASK, val); in aud96p22_set_fmt()
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| D | rt5659.c | 1557 pd = rl6231_get_pre_div(rt5659->regmap, in set_dmic_clk()
3577 regmap_update_bits(rt5659->regmap, RT5659_DIG_MISC, in rt5659_set_bias_level()
3579 regmap_update_bits(rt5659->regmap, RT5659_PWR_DIG_1, in rt5659_set_bias_level()
3581 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1, in rt5659_set_bias_level()
3585 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1, in rt5659_set_bias_level()
3602 regmap_update_bits(rt5659->regmap, RT5659_PWR_DIG_1, in rt5659_set_bias_level()
3604 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1, in rt5659_set_bias_level()
3608 regmap_update_bits(rt5659->regmap, RT5659_DIG_MISC, in rt5659_set_bias_level()
3633 regmap_write(rt5659->regmap, RT5659_RESET, 0); in rt5659_remove()
3643 regcache_cache_only(rt5659->regmap, true); in rt5659_suspend()
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| D | adau1977.c | 112 struct regmap *regmap; member
235 regcache_cache_bypass(adau1977->regmap, true); in adau1977_reset()
236 ret = regmap_write(adau1977->regmap, ADAU1977_REG_POWER, in adau1977_reset()
238 regcache_cache_bypass(adau1977->regmap, false); in adau1977_reset()
359 ret = regmap_update_bits(adau1977->regmap, in adau1977_hw_params()
368 ret = regmap_update_bits(adau1977->regmap, ADAU1977_REG_SAI_CTRL0, in adau1977_hw_params()
373 return regmap_update_bits(adau1977->regmap, ADAU1977_REG_PLL, in adau1977_hw_params()
384 ret = regmap_update_bits(adau1977->regmap, ADAU1977_REG_POWER, in adau1977_power_disable()
389 regcache_mark_dirty(adau1977->regmap); in adau1977_power_disable()
393 regcache_cache_only(adau1977->regmap, true); in adau1977_power_disable()
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| D | sta350.c | 170 struct regmap *regmap; member
322 regmap_read(sta350->regmap, STA350_CFUD, &cfud); in sta350_coefficient_get()
328 regmap_write(sta350->regmap, STA350_CFUD, cfud); in sta350_coefficient_get()
330 regmap_write(sta350->regmap, STA350_CFADDR2, index); in sta350_coefficient_get()
332 regmap_write(sta350->regmap, STA350_CFUD, cfud | 0x04); in sta350_coefficient_get()
334 regmap_write(sta350->regmap, STA350_CFUD, cfud | 0x08); in sta350_coefficient_get()
341 regmap_read(sta350->regmap, STA350_B1CF1 + i, &val); in sta350_coefficient_get()
362 regmap_read(sta350->regmap, STA350_CFUD, &cfud); in sta350_coefficient_put()
368 regmap_write(sta350->regmap, STA350_CFUD, cfud); in sta350_coefficient_put()
370 regmap_write(sta350->regmap, STA350_CFADDR2, index); in sta350_coefficient_put()
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| D | max98371.c | 216 regmap_update_bits(max98371->regmap, MAX98371_FMT, in max98371_dai_set_fmt()
232 regmap_update_bits(max98371->regmap, MAX98371_FMT, in max98371_dai_hw_params()
237 regmap_update_bits(max98371->regmap, MAX98371_FMT, in max98371_dai_hw_params()
242 regmap_update_bits(max98371->regmap, MAX98371_FMT, in max98371_dai_hw_params()
247 regmap_update_bits(max98371->regmap, MAX98371_FMT, in max98371_dai_hw_params()
259 regmap_update_bits(max98371->regmap, in max98371_dai_hw_params()
264 regmap_update_bits(max98371->regmap, in max98371_dai_hw_params()
269 regmap_update_bits(max98371->regmap, in max98371_dai_hw_params()
279 regmap_update_bits(max98371->regmap, in max98371_dai_hw_params()
284 regmap_update_bits(max98371->regmap, in max98371_dai_hw_params()
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| D | cs42l42.c | 531 regcache_cache_only(cs42l42->regmap, false); in cs42l42_set_bias_level()
532 regcache_sync(cs42l42->regmap); in cs42l42_set_bias_level()
546 regcache_cache_only(cs42l42->regmap, true); in cs42l42_set_bias_level()
946 regmap_update_bits(cs42l42->regmap, in cs42l42_process_hs_type_detect()
954 regmap_update_bits(cs42l42->regmap, in cs42l42_process_hs_type_detect()
966 regmap_read(cs42l42->regmap, CS42L42_HS_DET_STATUS, &hs_det_status); in cs42l42_process_hs_type_detect()
975 regmap_update_bits(cs42l42->regmap, in cs42l42_process_hs_type_detect()
987 regmap_update_bits(cs42l42->regmap, in cs42l42_process_hs_type_detect()
998 regmap_update_bits(cs42l42->regmap, in cs42l42_process_hs_type_detect()
1010 regmap_update_bits(cs42l42->regmap, in cs42l42_process_hs_type_detect()
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| D | sta32x.c | 144 struct regmap *regmap; member
283 regmap_read(sta32x->regmap, STA32X_CFUD, &cfud); in sta32x_coefficient_get()
289 regmap_write(sta32x->regmap, STA32X_CFUD, cfud); in sta32x_coefficient_get()
291 regmap_write(sta32x->regmap, STA32X_CFADDR2, index); in sta32x_coefficient_get()
293 regmap_write(sta32x->regmap, STA32X_CFUD, cfud | 0x04); in sta32x_coefficient_get()
295 regmap_write(sta32x->regmap, STA32X_CFUD, cfud | 0x08); in sta32x_coefficient_get()
302 regmap_read(sta32x->regmap, STA32X_B1CF1 + i, &val); in sta32x_coefficient_get()
323 regmap_read(sta32x->regmap, STA32X_CFUD, &cfud); in sta32x_coefficient_put()
329 regmap_write(sta32x->regmap, STA32X_CFUD, cfud); in sta32x_coefficient_put()
331 regmap_write(sta32x->regmap, STA32X_CFADDR2, index); in sta32x_coefficient_put()
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| /sound/soc/sirf/ |
| D | sirf-usp.c | 20 struct regmap *regmap; member
31 regmap_update_bits(usp->regmap, USP_TX_FIFO_OP, in sirf_usp_tx_enable()
33 regmap_write(usp->regmap, USP_TX_FIFO_OP, 0); in sirf_usp_tx_enable()
35 regmap_update_bits(usp->regmap, USP_TX_FIFO_OP, in sirf_usp_tx_enable()
38 regmap_update_bits(usp->regmap, USP_TX_RX_ENABLE, in sirf_usp_tx_enable()
44 regmap_update_bits(usp->regmap, USP_TX_RX_ENABLE, in sirf_usp_tx_disable()
47 regmap_write(usp->regmap, USP_TX_FIFO_OP, 0); in sirf_usp_tx_disable()
52 regmap_update_bits(usp->regmap, USP_RX_FIFO_OP, in sirf_usp_rx_enable()
54 regmap_write(usp->regmap, USP_RX_FIFO_OP, 0); in sirf_usp_rx_enable()
56 regmap_update_bits(usp->regmap, USP_RX_FIFO_OP, in sirf_usp_rx_enable()
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| /sound/soc/fsl/ |
| D | fsl_spdif.c | 99 struct regmap *regmap; member
120 struct regmap *regmap = spdif_priv->regmap; in spdif_irq_dpll_lock() local
124 regmap_read(regmap, REG_SPDIF_SRPC, &locked); in spdif_irq_dpll_lock()
136 struct regmap *regmap = spdif_priv->regmap; in spdif_irq_sym_error() local
143 regmap_update_bits(regmap, REG_SPDIF_SIE, INT_SYM_ERR, 0); in spdif_irq_sym_error()
150 struct regmap *regmap = spdif_priv->regmap; in spdif_irq_uqrx_full() local
179 regmap_read(regmap, reg, &val); in spdif_irq_uqrx_full()
205 struct regmap *regmap = spdif_priv->regmap; in spdif_irq_uq_err() local
212 regmap_read(regmap, REG_SPDIF_SRU, &val); in spdif_irq_uq_err()
213 regmap_read(regmap, REG_SPDIF_SRQ, &val); in spdif_irq_uq_err()
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| D | fsl_sai.c | 59 regmap_read(sai->regmap, FSL_SAI_TCSR, &xcsr); in fsl_sai_isr()
89 regmap_write(sai->regmap, FSL_SAI_TCSR, flags | xcsr); in fsl_sai_isr()
93 regmap_read(sai->regmap, FSL_SAI_RCSR, &xcsr); in fsl_sai_isr()
123 regmap_write(sai->regmap, FSL_SAI_RCSR, flags | xcsr); in fsl_sai_isr()
167 regmap_update_bits(sai->regmap, FSL_SAI_xCR2(tx), in fsl_sai_set_dai_sysclk_tr()
294 regmap_update_bits(sai->regmap, FSL_SAI_xCR2(tx), in fsl_sai_set_dai_fmt_tr()
296 regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx), in fsl_sai_set_dai_fmt_tr()
385 regmap_update_bits(sai->regmap, FSL_SAI_RCR2, in fsl_sai_set_bclk()
388 regmap_update_bits(sai->regmap, FSL_SAI_RCR2, in fsl_sai_set_bclk()
392 regmap_update_bits(sai->regmap, FSL_SAI_TCR2, in fsl_sai_set_bclk()
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| D | fsl_esai.c | 53 struct regmap *regmap; member
78 regmap_read(esai_priv->regmap, REG_ESAI_ESR, &esr); in esai_isr()
194 regmap_update_bits(esai_priv->regmap, REG_ESAI_xCCR(tx), in fsl_esai_divisor_cal()
203 regmap_update_bits(esai_priv->regmap, REG_ESAI_xCCR(tx), in fsl_esai_divisor_cal()
239 regmap_update_bits(esai_priv->regmap, REG_ESAI_xCCR(tx), in fsl_esai_set_dai_sysclk()
303 regmap_update_bits(esai_priv->regmap, REG_ESAI_ECR, in fsl_esai_set_dai_sysclk()
360 regmap_update_bits(esai_priv->regmap, REG_ESAI_TCCR, in fsl_esai_set_dai_tdm_slot()
363 regmap_update_bits(esai_priv->regmap, REG_ESAI_RCCR, in fsl_esai_set_dai_tdm_slot()
451 regmap_update_bits(esai_priv->regmap, REG_ESAI_TCR, mask, xcr); in fsl_esai_set_dai_fmt()
452 regmap_update_bits(esai_priv->regmap, REG_ESAI_RCR, mask, xcr); in fsl_esai_set_dai_fmt()
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| /sound/soc/rockchip/ |
| D | rockchip_i2s.c | 42 struct regmap *regmap; member
43 struct regmap *grf;
60 regcache_cache_only(i2s->regmap, true); in i2s_runtime_suspend()
77 regcache_cache_only(i2s->regmap, false); in i2s_runtime_resume()
78 regcache_mark_dirty(i2s->regmap); in i2s_runtime_resume()
80 ret = regcache_sync(i2s->regmap); in i2s_runtime_resume()
98 regmap_update_bits(i2s->regmap, I2S_DMACR, in rockchip_snd_txctrl()
101 regmap_update_bits(i2s->regmap, I2S_XFER, in rockchip_snd_txctrl()
109 regmap_update_bits(i2s->regmap, I2S_DMACR, in rockchip_snd_txctrl()
113 regmap_update_bits(i2s->regmap, I2S_XFER, in rockchip_snd_txctrl()
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