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/arch/powerpc/crypto/
Dmd5-asm.S69 #define R_00_15(a, b, c, d, w0, w1, p, q, off, k0h, k0l, k1h, k1l) \ argument
74 LOAD_DATA(w1, off+4) /* W */ \
79 addis w1,w1,k1h; /* 2: wk = w + k */ \
81 addi w1,w1,k1l; /* 2: wk = w + k' */ \
83 add d,d,w1; /* 2: a = a + wk */ \
93 #define R_16_31(a, b, c, d, w0, w1, p, q, k0h, k0l, k1h, k1l) \ argument
100 addi w1,w1,k1l; /* 2: wk = w + k */ \
102 addis w1,w1,k1h; /* 2: wk = w + k' */ \
106 add d,d,w1; /* 2: a = a + wk */ \
113 #define R_32_47(a, b, c, d, w0, w1, p, q, k0h, k0l, k1h, k1l) \ argument
[all …]
Dsha1-spe-asm.S111 #define R_00_15(a, b, c, d, e, w0, w1, k, off) \ argument
121 LOAD_DATA(w1, off+4) /* 2: W */ \
129 add d,d,w1; /* 2: E = E + W */ \
132 evmergelo w1,w1,w0; /* mix W[0]/W[1] */ \
135 #define R_16_19(a, b, c, d, e, w0, w1, w4, w6, w7, k) \ argument
143 evxor w0,w0,w1; /* W = W xor W[-14] */ \
161 #define R_20_39(a, b, c, d, e, w0, w1, w4, w6, w7, k) \ argument
168 evxor w0,w0,w1; /* W = W xor W[-14] */ \
185 #define R_40_59(a, b, c, d, e, w0, w1, w4, w6, w7, k) \ argument
193 evxor w0,w0,w1; /* W = W xor W[-14] */ \
[all …]
Dsha256-spe-asm.S161 #define R_CALC_W(a, b, c, d, e, f, g, h, w0, w1, w4, w5, w7, k, off) \ argument
163 evmergelohi rT0,w0,w1; /* w[-15] */ \
/arch/arm64/lib/
Dstrchr.S33 and w1, w1, #0xff
35 cmp w2, w1
39 cmp w2, w1
Dmemchr.S34 and w1, w1, #0xff
38 cmp w3, w1
Dstrrchr.S34 and w1, w1, #0xff
37 cmp w2, w1
Dclear_page.S30 and w1, w1, #0xf
Dmemset.S41 val .req w1
/arch/arm64/kvm/hyp/
Dhyp-entry.S108 eor w1, w1, #ARM_SMCCC_ARCH_WORKAROUND_1
109 cbz w1, wa_epilogue
112 eor w1, w1, #(ARM_SMCCC_ARCH_WORKAROUND_1 ^ \
114 cbnz w1, el1_trap
125 clz w1, w1 // Murphy's device:
126 lsr w1, w1, #5 // w1 = !!w1 without using
127 eor w1, w1, #1 // the flags...
/arch/arm64/kernel/
Dentry32.S45 cmp w1, #88
46 csel w1, w3, w1, eq
52 cmp w1, #88
53 csel w1, w3, w1, eq
104 mov w6, w1
/arch/x86/include/asm/
Drwsem.h111 " test " __ASM_SEL(%w1,%k1) "," __ASM_SEL(%w1,%k1) "\n\t" \
147 " test " __ASM_SEL(%w1,%k1) "," __ASM_SEL(%w1,%k1) "\n\t" in __down_write_trylock()
/arch/m68k/lib/
Dmuldi3.c28 #define umul_ppmm(w1, w0, u, v) \ argument
48 (w1) = __x3 + __ll_highpart (__x1); \
54 #define umul_ppmm(w1, w0, u, v) \ argument
57 "=d" ((USItype)(w1)) \
/arch/sparc/math-emu/
Dsfp-util_32.h28 #define umul_ppmm(w1, w0, u, v) \ argument
69 : "=r" (w1), \
/arch/microblaze/lib/
Dmuldi3.c14 #define umul_ppmm(w1, w0, u, v) \ argument
34 (w1) = __x3 + __ll_highpart(__x1); \
Duaccess_old.S176 w1: lw r4, r6, r3 /* at least one 4 byte copy */ label
179 bneid r7, w1
186 .word w1, 0f;
/arch/h8300/lib/
Dmuldi3.c8 #define umul_ppmm(w1, w0, u, v) \ argument
24 (w1) = __x3 + __ll_highpart(__x1); \
/arch/sh/math-emu/
Dsfp-util.h22 #define umul_ppmm(w1, w0, u, v) \ argument
24 : "=r" ((u32)(w1)), "=r" ((u32)(w0)) \
/arch/x86/crypto/
Dpoly1305-avx2-x86_64.S42 #define w1 0x18(%r8) macro
111 # combine r1,u1,w1,y1 and s1=r1*5,v1=u1*5,x1=w1*5,z1=y1*5
113 vmovd w1,t1x
242 # t1 = [ hc0[3] * r1, hc0[2] * u1,hc0[1] * w1, hc0[0] * y1 ]
265 # t1 += [ hc1[3] * r1, hc1[2] * u1, hc1[1] * w1, hc1[0] * y1 ]
289 # t1 += [ hc2[3] * r1, hc2[2] * u1, hc2[1] * w1, hc2[0] * y1 ]
313 # t1 += [ hc3[3] * r1, hc3[2] * u1, hc3[1] * w1, hc3[0] * y1 ]
/arch/nios2/lib/
Dmemcpy.c31 #define MERGE(w0, sh_1, w1, sh_2) (((w0) >> (sh_1)) | ((w1) << (sh_2))) argument
/arch/arm64/crypto/
Dsha256-core.S_shipped424 ldp w1,w2,[x1]
448 rev w1,w1 // 14
458 add w21,w21,w1 // h+=X[i]
483 ror w8,w1,#17
495 eor w8,w8,w1,ror#19
500 eor w8,w8,w1,lsr#10 // sigma1(X[i+14])
657 add w8,w8,w1
696 str w1,[sp,#8]
703 ror w1,w22,#2
710 eor w1,w1,w22,ror#13
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/arch/xtensa/kernel/
Dalign.S69 .macro __src_b r, w0, w1; src \r, \w0, \w1; .endm argument
84 .macro __src_b r, w0, w1; src \r, \w1, \w0; .endm argument
/arch/arm/boot/dts/
Dat91sam9x5cm.dtsi115 compatible = "w1-gpio";
Dimx28-cfa10049.dts164 w1_gpio_pins: w1-gpio@0 {
430 compatible = "w1-gpio";
Dat91-ariag25.dts173 compatible = "w1-gpio";
/arch/xtensa/lib/
Dmemcopy.S14 .macro src_b r, w0, w1 argument
16 src \r, \w0, \w1
18 src \r, \w1, \w0

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