1/* 2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9/* 10 * AM335x Starter Kit 11 * http://www.ti.com/tool/tmdssk3358 12 */ 13 14/dts-v1/; 15 16#include "am33xx.dtsi" 17#include <dt-bindings/pwm/pwm.h> 18#include <dt-bindings/interrupt-controller/irq.h> 19 20/ { 21 model = "TI AM335x EVM-SK"; 22 compatible = "ti,am335x-evmsk", "ti,am33xx"; 23 24 cpus { 25 cpu@0 { 26 cpu0-supply = <&vdd1_reg>; 27 }; 28 }; 29 30 memory@80000000 { 31 device_type = "memory"; 32 reg = <0x80000000 0x10000000>; /* 256 MB */ 33 }; 34 35 chosen { 36 stdout-path = &uart0; 37 }; 38 39 vbat: fixedregulator0 { 40 compatible = "regulator-fixed"; 41 regulator-name = "vbat"; 42 regulator-min-microvolt = <5000000>; 43 regulator-max-microvolt = <5000000>; 44 regulator-boot-on; 45 }; 46 47 lis3_reg: fixedregulator1 { 48 compatible = "regulator-fixed"; 49 regulator-name = "lis3_reg"; 50 regulator-boot-on; 51 }; 52 53 wl12xx_vmmc: fixedregulator2 { 54 pinctrl-names = "default"; 55 pinctrl-0 = <&wl12xx_gpio>; 56 compatible = "regulator-fixed"; 57 regulator-name = "vwl1271"; 58 regulator-min-microvolt = <1800000>; 59 regulator-max-microvolt = <1800000>; 60 gpio = <&gpio1 29 0>; 61 startup-delay-us = <70000>; 62 enable-active-high; 63 }; 64 65 vtt_fixed: fixedregulator3 { 66 compatible = "regulator-fixed"; 67 regulator-name = "vtt"; 68 regulator-min-microvolt = <1500000>; 69 regulator-max-microvolt = <1500000>; 70 gpio = <&gpio0 7 GPIO_ACTIVE_HIGH>; 71 regulator-always-on; 72 regulator-boot-on; 73 enable-active-high; 74 }; 75 76 /* TPS79518 */ 77 v1_8d_reg: fixedregulator-v1_8d { 78 compatible = "regulator-fixed"; 79 regulator-name = "v1_8d"; 80 vin-supply = <&vbat>; 81 regulator-min-microvolt = <1800000>; 82 regulator-max-microvolt = <1800000>; 83 }; 84 85 /* TPS78633 */ 86 v3_3d_reg: fixedregulator-v3_3d { 87 compatible = "regulator-fixed"; 88 regulator-name = "v3_3d"; 89 vin-supply = <&vbat>; 90 regulator-min-microvolt = <3300000>; 91 regulator-max-microvolt = <3300000>; 92 }; 93 94 leds { 95 pinctrl-names = "default"; 96 pinctrl-0 = <&user_leds_s0>; 97 98 compatible = "gpio-leds"; 99 100 led1 { 101 label = "evmsk:green:usr0"; 102 gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; 103 default-state = "off"; 104 }; 105 106 led2 { 107 label = "evmsk:green:usr1"; 108 gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; 109 default-state = "off"; 110 }; 111 112 led3 { 113 label = "evmsk:green:mmc0"; 114 gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; 115 linux,default-trigger = "mmc0"; 116 default-state = "off"; 117 }; 118 119 led4 { 120 label = "evmsk:green:heartbeat"; 121 gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; 122 linux,default-trigger = "heartbeat"; 123 default-state = "off"; 124 }; 125 }; 126 127 gpio_buttons: gpio_buttons0 { 128 compatible = "gpio-keys"; 129 #address-cells = <1>; 130 #size-cells = <0>; 131 132 switch1 { 133 label = "button0"; 134 linux,code = <0x100>; 135 gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; 136 }; 137 138 switch2 { 139 label = "button1"; 140 linux,code = <0x101>; 141 gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; 142 }; 143 144 switch3 { 145 label = "button2"; 146 linux,code = <0x102>; 147 gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>; 148 wakeup-source; 149 }; 150 151 switch4 { 152 label = "button3"; 153 linux,code = <0x103>; 154 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; 155 }; 156 }; 157 158 backlight { 159 compatible = "pwm-backlight"; 160 pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>; 161 brightness-levels = <0 58 61 66 75 90 125 170 255>; 162 default-brightness-level = <8>; 163 }; 164 165 sound { 166 compatible = "simple-audio-card"; 167 simple-audio-card,name = "AM335x-EVMSK"; 168 simple-audio-card,widgets = 169 "Headphone", "Headphone Jack"; 170 simple-audio-card,routing = 171 "Headphone Jack", "HPLOUT", 172 "Headphone Jack", "HPROUT"; 173 simple-audio-card,format = "dsp_b"; 174 simple-audio-card,bitclock-master = <&sound_master>; 175 simple-audio-card,frame-master = <&sound_master>; 176 simple-audio-card,bitclock-inversion; 177 178 simple-audio-card,cpu { 179 sound-dai = <&mcasp1>; 180 }; 181 182 sound_master: simple-audio-card,codec { 183 sound-dai = <&tlv320aic3106>; 184 system-clock-frequency = <24000000>; 185 }; 186 }; 187 188 panel { 189 compatible = "ti,tilcdc,panel"; 190 pinctrl-names = "default", "sleep"; 191 pinctrl-0 = <&lcd_pins_default>; 192 pinctrl-1 = <&lcd_pins_sleep>; 193 status = "okay"; 194 panel-info { 195 ac-bias = <255>; 196 ac-bias-intrpt = <0>; 197 dma-burst-sz = <16>; 198 bpp = <32>; 199 fdd = <0x80>; 200 sync-edge = <0>; 201 sync-ctrl = <1>; 202 raster-order = <0>; 203 fifo-th = <0>; 204 }; 205 display-timings { 206 480x272 { 207 hactive = <480>; 208 vactive = <272>; 209 hback-porch = <43>; 210 hfront-porch = <8>; 211 hsync-len = <4>; 212 vback-porch = <12>; 213 vfront-porch = <4>; 214 vsync-len = <10>; 215 clock-frequency = <9000000>; 216 hsync-active = <0>; 217 vsync-active = <0>; 218 }; 219 }; 220 }; 221}; 222 223&am33xx_pinmux { 224 pinctrl-names = "default"; 225 pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>; 226 227 lcd_pins_default: lcd_pins_default { 228 pinctrl-single,pins = < 229 AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad8.lcd_data23 */ 230 AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad9.lcd_data22 */ 231 AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad10.lcd_data21 */ 232 AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad11.lcd_data20 */ 233 AM33XX_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad12.lcd_data19 */ 234 AM33XX_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad13.lcd_data18 */ 235 AM33XX_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad14.lcd_data17 */ 236 AM33XX_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad15.lcd_data16 */ 237 AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */ 238 AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */ 239 AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */ 240 AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */ 241 AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */ 242 AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */ 243 AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */ 244 AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */ 245 AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */ 246 AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */ 247 AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */ 248 AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */ 249 AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */ 250 AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */ 251 AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */ 252 AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */ 253 AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* lcd_vsync.lcd_vsync */ 254 AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* lcd_hsync.lcd_hsync */ 255 AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* lcd_pclk.lcd_pclk */ 256 AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */ 257 >; 258 }; 259 260 lcd_pins_sleep: lcd_pins_sleep { 261 pinctrl-single,pins = < 262 AM33XX_IOPAD(0x820, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad8.lcd_data23 */ 263 AM33XX_IOPAD(0x824, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad9.lcd_data22 */ 264 AM33XX_IOPAD(0x828, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad10.lcd_data21 */ 265 AM33XX_IOPAD(0x82c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad11.lcd_data20 */ 266 AM33XX_IOPAD(0x830, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad12.lcd_data19 */ 267 AM33XX_IOPAD(0x834, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad13.lcd_data18 */ 268 AM33XX_IOPAD(0x838, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad14.lcd_data17 */ 269 AM33XX_IOPAD(0x83c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad15.lcd_data16 */ 270 AM33XX_IOPAD(0x8a0, PULL_DISABLE | MUX_MODE7) /* lcd_data0.lcd_data0 */ 271 AM33XX_IOPAD(0x8a4, PULL_DISABLE | MUX_MODE7) /* lcd_data1.lcd_data1 */ 272 AM33XX_IOPAD(0x8a8, PULL_DISABLE | MUX_MODE7) /* lcd_data2.lcd_data2 */ 273 AM33XX_IOPAD(0x8ac, PULL_DISABLE | MUX_MODE7) /* lcd_data3.lcd_data3 */ 274 AM33XX_IOPAD(0x8b0, PULL_DISABLE | MUX_MODE7) /* lcd_data4.lcd_data4 */ 275 AM33XX_IOPAD(0x8b4, PULL_DISABLE | MUX_MODE7) /* lcd_data5.lcd_data5 */ 276 AM33XX_IOPAD(0x8b8, PULL_DISABLE | MUX_MODE7) /* lcd_data6.lcd_data6 */ 277 AM33XX_IOPAD(0x8bc, PULL_DISABLE | MUX_MODE7) /* lcd_data7.lcd_data7 */ 278 AM33XX_IOPAD(0x8c0, PULL_DISABLE | MUX_MODE7) /* lcd_data8.lcd_data8 */ 279 AM33XX_IOPAD(0x8c4, PULL_DISABLE | MUX_MODE7) /* lcd_data9.lcd_data9 */ 280 AM33XX_IOPAD(0x8c8, PULL_DISABLE | MUX_MODE7) /* lcd_data10.lcd_data10 */ 281 AM33XX_IOPAD(0x8cc, PULL_DISABLE | MUX_MODE7) /* lcd_data11.lcd_data11 */ 282 AM33XX_IOPAD(0x8d0, PULL_DISABLE | MUX_MODE7) /* lcd_data12.lcd_data12 */ 283 AM33XX_IOPAD(0x8d4, PULL_DISABLE | MUX_MODE7) /* lcd_data13.lcd_data13 */ 284 AM33XX_IOPAD(0x8d8, PULL_DISABLE | MUX_MODE7) /* lcd_data14.lcd_data14 */ 285 AM33XX_IOPAD(0x8dc, PULL_DISABLE | MUX_MODE7) /* lcd_data15.lcd_data15 */ 286 AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.lcd_vsync */ 287 AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.lcd_hsync */ 288 AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.lcd_pclk */ 289 AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.lcd_ac_bias_en */ 290 >; 291 }; 292 293 294 user_leds_s0: user_leds_s0 { 295 pinctrl-single,pins = < 296 AM33XX_IOPAD(0x810, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */ 297 AM33XX_IOPAD(0x814, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */ 298 AM33XX_IOPAD(0x818, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */ 299 AM33XX_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */ 300 >; 301 }; 302 303 gpio_keys_s0: gpio_keys_s0 { 304 pinctrl-single,pins = < 305 AM33XX_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */ 306 AM33XX_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */ 307 AM33XX_IOPAD(0x870, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */ 308 AM33XX_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */ 309 >; 310 }; 311 312 i2c0_pins: pinmux_i2c0_pins { 313 pinctrl-single,pins = < 314 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 315 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 316 >; 317 }; 318 319 uart0_pins: pinmux_uart0_pins { 320 pinctrl-single,pins = < 321 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ 322 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ 323 >; 324 }; 325 326 clkout2_pin: pinmux_clkout2_pin { 327 pinctrl-single,pins = < 328 AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ 329 >; 330 }; 331 332 ecap2_pins: backlight_pins { 333 pinctrl-single,pins = < 334 AM33XX_IOPAD(0x99c, MUX_MODE4) /* mcasp0_ahclkr.ecap2_in_pwm2_out */ 335 >; 336 }; 337 338 cpsw_default: cpsw_default { 339 pinctrl-single,pins = < 340 /* Slave 1 */ 341 AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ 342 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ 343 AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ 344 AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ 345 AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ 346 AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ 347 AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ 348 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ 349 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ 350 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ 351 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ 352 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ 353 354 /* Slave 2 */ 355 AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ 356 AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */ 357 AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ 358 AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ 359 AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ 360 AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ 361 AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ 362 AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ 363 AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ 364 AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ 365 AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ 366 AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ 367 >; 368 }; 369 370 cpsw_sleep: cpsw_sleep { 371 pinctrl-single,pins = < 372 /* Slave 1 reset value */ 373 AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7) 374 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7) 375 AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7) 376 AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7) 377 AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7) 378 AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7) 379 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7) 380 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7) 381 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7) 382 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7) 383 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7) 384 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7) 385 386 /* Slave 2 reset value*/ 387 AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7) 388 AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7) 389 AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7) 390 AM33XX_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7) 391 AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7) 392 AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7) 393 AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7) 394 AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7) 395 AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7) 396 AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7) 397 AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7) 398 AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7) 399 >; 400 }; 401 402 davinci_mdio_default: davinci_mdio_default { 403 pinctrl-single,pins = < 404 /* MDIO */ 405 AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ 406 AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ 407 >; 408 }; 409 410 davinci_mdio_sleep: davinci_mdio_sleep { 411 pinctrl-single,pins = < 412 /* MDIO reset value */ 413 AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7) 414 AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7) 415 >; 416 }; 417 418 mmc1_pins: pinmux_mmc1_pins { 419 pinctrl-single,pins = < 420 AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ 421 >; 422 }; 423 424 mcasp1_pins: mcasp1_pins { 425 pinctrl-single,pins = < 426 AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */ 427 AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */ 428 AM33XX_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ 429 AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ 430 >; 431 }; 432 433 mcasp1_pins_sleep: mcasp1_pins_sleep { 434 pinctrl-single,pins = < 435 AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7) 436 AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7) 437 AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7) 438 AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7) 439 >; 440 }; 441 442 mmc2_pins: pinmux_mmc2_pins { 443 pinctrl-single,pins = < 444 AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_31 */ 445 AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ 446 AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ 447 AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ 448 AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ 449 AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ 450 AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ 451 >; 452 }; 453 454 wl12xx_gpio: pinmux_wl12xx_gpio { 455 pinctrl-single,pins = < 456 AM33XX_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_csn0.gpio1_29 */ 457 >; 458 }; 459}; 460 461&uart0 { 462 pinctrl-names = "default"; 463 pinctrl-0 = <&uart0_pins>; 464 465 status = "okay"; 466}; 467 468&i2c0 { 469 pinctrl-names = "default"; 470 pinctrl-0 = <&i2c0_pins>; 471 472 status = "okay"; 473 clock-frequency = <400000>; 474 475 tps: tps@2d { 476 reg = <0x2d>; 477 }; 478 479 lis331dlh: lis331dlh@18 { 480 compatible = "st,lis331dlh", "st,lis3lv02d"; 481 reg = <0x18>; 482 Vdd-supply = <&lis3_reg>; 483 Vdd_IO-supply = <&lis3_reg>; 484 485 st,click-single-x; 486 st,click-single-y; 487 st,click-single-z; 488 st,click-thresh-x = <10>; 489 st,click-thresh-y = <10>; 490 st,click-thresh-z = <10>; 491 st,irq1-click; 492 st,irq2-click; 493 st,wakeup-x-lo; 494 st,wakeup-x-hi; 495 st,wakeup-y-lo; 496 st,wakeup-y-hi; 497 st,wakeup-z-lo; 498 st,wakeup-z-hi; 499 st,min-limit-x = <120>; 500 st,min-limit-y = <120>; 501 st,min-limit-z = <140>; 502 st,max-limit-x = <550>; 503 st,max-limit-y = <550>; 504 st,max-limit-z = <750>; 505 }; 506 507 tlv320aic3106: tlv320aic3106@1b { 508 #sound-dai-cells = <0>; 509 compatible = "ti,tlv320aic3106"; 510 reg = <0x1b>; 511 status = "okay"; 512 513 /* Regulators */ 514 AVDD-supply = <&v3_3d_reg>; 515 IOVDD-supply = <&v3_3d_reg>; 516 DRVDD-supply = <&v3_3d_reg>; 517 DVDD-supply = <&v1_8d_reg>; 518 }; 519}; 520 521&usb { 522 status = "okay"; 523}; 524 525&usb_ctrl_mod { 526 status = "okay"; 527}; 528 529&usb0_phy { 530 status = "okay"; 531}; 532 533&usb1_phy { 534 status = "okay"; 535}; 536 537&usb0 { 538 status = "okay"; 539}; 540 541&usb1 { 542 status = "okay"; 543 dr_mode = "host"; 544}; 545 546&cppi41dma { 547 status = "okay"; 548}; 549 550&epwmss2 { 551 status = "okay"; 552 553 ecap2: ecap@48304100 { 554 status = "okay"; 555 pinctrl-names = "default"; 556 pinctrl-0 = <&ecap2_pins>; 557 }; 558}; 559 560#include "tps65910.dtsi" 561 562&tps { 563 vcc1-supply = <&vbat>; 564 vcc2-supply = <&vbat>; 565 vcc3-supply = <&vbat>; 566 vcc4-supply = <&vbat>; 567 vcc5-supply = <&vbat>; 568 vcc6-supply = <&vbat>; 569 vcc7-supply = <&vbat>; 570 vccio-supply = <&vbat>; 571 572 regulators { 573 vrtc_reg: regulator@0 { 574 regulator-always-on; 575 }; 576 577 vio_reg: regulator@1 { 578 regulator-always-on; 579 }; 580 581 vdd1_reg: regulator@2 { 582 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ 583 regulator-name = "vdd_mpu"; 584 regulator-min-microvolt = <912500>; 585 regulator-max-microvolt = <1351500>; 586 regulator-boot-on; 587 regulator-always-on; 588 }; 589 590 vdd2_reg: regulator@3 { 591 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ 592 regulator-name = "vdd_core"; 593 regulator-min-microvolt = <912500>; 594 regulator-max-microvolt = <1150000>; 595 regulator-boot-on; 596 regulator-always-on; 597 }; 598 599 vdd3_reg: regulator@4 { 600 regulator-always-on; 601 }; 602 603 vdig1_reg: regulator@5 { 604 regulator-always-on; 605 }; 606 607 vdig2_reg: regulator@6 { 608 regulator-always-on; 609 }; 610 611 vpll_reg: regulator@7 { 612 regulator-always-on; 613 }; 614 615 vdac_reg: regulator@8 { 616 regulator-always-on; 617 }; 618 619 vaux1_reg: regulator@9 { 620 regulator-always-on; 621 }; 622 623 vaux2_reg: regulator@10 { 624 regulator-always-on; 625 }; 626 627 vaux33_reg: regulator@11 { 628 regulator-always-on; 629 }; 630 631 vmmc_reg: regulator@12 { 632 regulator-min-microvolt = <1800000>; 633 regulator-max-microvolt = <3300000>; 634 regulator-always-on; 635 }; 636 }; 637}; 638 639&mac { 640 pinctrl-names = "default", "sleep"; 641 pinctrl-0 = <&cpsw_default>; 642 pinctrl-1 = <&cpsw_sleep>; 643 dual_emac = <1>; 644 status = "okay"; 645}; 646 647&davinci_mdio { 648 pinctrl-names = "default", "sleep"; 649 pinctrl-0 = <&davinci_mdio_default>; 650 pinctrl-1 = <&davinci_mdio_sleep>; 651 status = "okay"; 652}; 653 654&cpsw_emac0 { 655 phy_id = <&davinci_mdio>, <0>; 656 phy-mode = "rgmii-txid"; 657 dual_emac_res_vlan = <1>; 658}; 659 660&cpsw_emac1 { 661 phy_id = <&davinci_mdio>, <1>; 662 phy-mode = "rgmii-txid"; 663 dual_emac_res_vlan = <2>; 664}; 665 666&mmc1 { 667 status = "okay"; 668 vmmc-supply = <&vmmc_reg>; 669 bus-width = <4>; 670 pinctrl-names = "default"; 671 pinctrl-0 = <&mmc1_pins>; 672 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; 673}; 674 675&sham { 676 status = "okay"; 677}; 678 679&aes { 680 status = "okay"; 681}; 682 683&gpio0 { 684 ti,no-reset-on-init; 685}; 686 687&mmc2 { 688 status = "okay"; 689 vmmc-supply = <&wl12xx_vmmc>; 690 ti,non-removable; 691 bus-width = <4>; 692 cap-power-off-card; 693 keep-power-in-suspend; 694 pinctrl-names = "default"; 695 pinctrl-0 = <&mmc2_pins>; 696 697 #address-cells = <1>; 698 #size-cells = <0>; 699 wlcore: wlcore@2 { 700 compatible = "ti,wl1271"; 701 reg = <2>; 702 interrupt-parent = <&gpio0>; 703 interrupts = <31 IRQ_TYPE_LEVEL_HIGH>; /* gpio 31 */ 704 ref-clock-frequency = <38400000>; 705 }; 706}; 707 708&mcasp1 { 709 #sound-dai-cells = <0>; 710 pinctrl-names = "default", "sleep"; 711 pinctrl-0 = <&mcasp1_pins>; 712 pinctrl-1 = <&mcasp1_pins_sleep>; 713 714 status = "okay"; 715 716 op-mode = <0>; /* MCASP_IIS_MODE */ 717 tdm-slots = <2>; 718 /* 4 serializers */ 719 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 720 0 0 1 2 721 >; 722 tx-num-evt = <32>; 723 rx-num-evt = <32>; 724}; 725 726&tscadc { 727 status = "okay"; 728 tsc { 729 ti,wires = <4>; 730 ti,x-plate-resistance = <200>; 731 ti,coordinate-readouts = <5>; 732 ti,wire-config = <0x00 0x11 0x22 0x33>; 733 }; 734}; 735 736&lcdc { 737 status = "okay"; 738 739 blue-and-red-wiring = "crossed"; 740}; 741 742&rtc { 743 clocks = <&clk_32768_ck>, <&clkdiv32k_ick>; 744 clock-names = "ext-clk", "int-clk"; 745}; 746