1/* 2 * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> 3 * 4 * The code contained herein is licensed under the GNU General Public 5 * License. You may obtain a copy of the GNU General Public License 6 * Version 2 or later at the following locations: 7 * 8 * http://www.opensource.org/licenses/gpl-license.html 9 * http://www.gnu.org/copyleft/gpl.html 10 */ 11 12#include <dt-bindings/gpio/gpio.h> 13#include "imx25-pinfunc.h" 14 15/ { 16 #address-cells = <1>; 17 #size-cells = <1>; 18 /* 19 * The decompressor and also some bootloaders rely on a 20 * pre-existing /chosen node to be available to insert the 21 * command line and merge other ATAGS info. 22 * Also for U-Boot there must be a pre-existing /memory node. 23 */ 24 chosen {}; 25 memory { device_type = "memory"; reg = <0 0>; }; 26 27 aliases { 28 ethernet0 = &fec; 29 gpio0 = &gpio1; 30 gpio1 = &gpio2; 31 gpio2 = &gpio3; 32 gpio3 = &gpio4; 33 i2c0 = &i2c1; 34 i2c1 = &i2c2; 35 i2c2 = &i2c3; 36 mmc0 = &esdhc1; 37 mmc1 = &esdhc2; 38 pwm0 = &pwm1; 39 pwm1 = &pwm2; 40 pwm2 = &pwm3; 41 pwm3 = &pwm4; 42 serial0 = &uart1; 43 serial1 = &uart2; 44 serial2 = &uart3; 45 serial3 = &uart4; 46 serial4 = &uart5; 47 spi0 = &spi1; 48 spi1 = &spi2; 49 spi2 = &spi3; 50 usb0 = &usbotg; 51 usb1 = &usbhost1; 52 }; 53 54 cpus { 55 #address-cells = <1>; 56 #size-cells = <0>; 57 58 cpu@0 { 59 compatible = "arm,arm926ej-s"; 60 device_type = "cpu"; 61 reg = <0>; 62 }; 63 }; 64 65 asic: asic-interrupt-controller@68000000 { 66 compatible = "fsl,imx25-asic", "fsl,avic"; 67 interrupt-controller; 68 #interrupt-cells = <1>; 69 reg = <0x68000000 0x8000000>; 70 }; 71 72 clocks { 73 #address-cells = <1>; 74 #size-cells = <0>; 75 76 osc { 77 compatible = "fsl,imx-osc", "fixed-clock"; 78 #clock-cells = <0>; 79 clock-frequency = <24000000>; 80 }; 81 }; 82 83 soc { 84 #address-cells = <1>; 85 #size-cells = <1>; 86 compatible = "simple-bus"; 87 interrupt-parent = <&asic>; 88 ranges; 89 90 aips@43f00000 { /* AIPS1 */ 91 compatible = "fsl,aips-bus", "simple-bus"; 92 #address-cells = <1>; 93 #size-cells = <1>; 94 reg = <0x43f00000 0x100000>; 95 ranges; 96 97 aips1: bridge@43f00000 { 98 compatible = "fsl,imx25-aips"; 99 reg = <0x43f00000 0x4000>; 100 }; 101 102 i2c1: i2c@43f80000 { 103 #address-cells = <1>; 104 #size-cells = <0>; 105 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; 106 reg = <0x43f80000 0x4000>; 107 clocks = <&clks 48>; 108 clock-names = ""; 109 interrupts = <3>; 110 status = "disabled"; 111 }; 112 113 i2c3: i2c@43f84000 { 114 #address-cells = <1>; 115 #size-cells = <0>; 116 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; 117 reg = <0x43f84000 0x4000>; 118 clocks = <&clks 48>; 119 clock-names = ""; 120 interrupts = <10>; 121 status = "disabled"; 122 }; 123 124 can1: can@43f88000 { 125 compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan"; 126 reg = <0x43f88000 0x4000>; 127 interrupts = <43>; 128 clocks = <&clks 75>, <&clks 75>; 129 clock-names = "ipg", "per"; 130 status = "disabled"; 131 }; 132 133 can2: can@43f8c000 { 134 compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan"; 135 reg = <0x43f8c000 0x4000>; 136 interrupts = <44>; 137 clocks = <&clks 76>, <&clks 76>; 138 clock-names = "ipg", "per"; 139 status = "disabled"; 140 }; 141 142 uart1: serial@43f90000 { 143 compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 144 reg = <0x43f90000 0x4000>; 145 interrupts = <45>; 146 clocks = <&clks 120>, <&clks 57>; 147 clock-names = "ipg", "per"; 148 status = "disabled"; 149 }; 150 151 uart2: serial@43f94000 { 152 compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 153 reg = <0x43f94000 0x4000>; 154 interrupts = <32>; 155 clocks = <&clks 121>, <&clks 57>; 156 clock-names = "ipg", "per"; 157 status = "disabled"; 158 }; 159 160 i2c2: i2c@43f98000 { 161 #address-cells = <1>; 162 #size-cells = <0>; 163 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; 164 reg = <0x43f98000 0x4000>; 165 clocks = <&clks 48>; 166 clock-names = ""; 167 interrupts = <4>; 168 status = "disabled"; 169 }; 170 171 owire@43f9c000 { 172 #address-cells = <1>; 173 #size-cells = <0>; 174 reg = <0x43f9c000 0x4000>; 175 clocks = <&clks 51>; 176 clock-names = ""; 177 interrupts = <2>; 178 status = "disabled"; 179 }; 180 181 spi1: cspi@43fa4000 { 182 #address-cells = <1>; 183 #size-cells = <0>; 184 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; 185 reg = <0x43fa4000 0x4000>; 186 clocks = <&clks 78>, <&clks 78>; 187 clock-names = "ipg", "per"; 188 interrupts = <14>; 189 status = "disabled"; 190 }; 191 192 kpp: kpp@43fa8000 { 193 #address-cells = <1>; 194 #size-cells = <0>; 195 compatible = "fsl,imx25-kpp", "fsl,imx21-kpp"; 196 reg = <0x43fa8000 0x4000>; 197 clocks = <&clks 102>; 198 clock-names = ""; 199 interrupts = <24>; 200 status = "disabled"; 201 }; 202 203 iomuxc: iomuxc@43fac000 { 204 compatible = "fsl,imx25-iomuxc"; 205 reg = <0x43fac000 0x4000>; 206 }; 207 208 audmux: audmux@43fb0000 { 209 compatible = "fsl,imx25-audmux", "fsl,imx31-audmux"; 210 reg = <0x43fb0000 0x4000>; 211 status = "disabled"; 212 }; 213 }; 214 215 spba@50000000 { 216 compatible = "fsl,spba-bus", "simple-bus"; 217 #address-cells = <1>; 218 #size-cells = <1>; 219 reg = <0x50000000 0x40000>; 220 ranges; 221 222 spi3: cspi@50004000 { 223 #address-cells = <1>; 224 #size-cells = <0>; 225 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; 226 reg = <0x50004000 0x4000>; 227 interrupts = <0>; 228 clocks = <&clks 80>, <&clks 80>; 229 clock-names = "ipg", "per"; 230 status = "disabled"; 231 }; 232 233 uart4: serial@50008000 { 234 compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 235 reg = <0x50008000 0x4000>; 236 interrupts = <5>; 237 clocks = <&clks 123>, <&clks 57>; 238 clock-names = "ipg", "per"; 239 status = "disabled"; 240 }; 241 242 uart3: serial@5000c000 { 243 compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 244 reg = <0x5000c000 0x4000>; 245 interrupts = <18>; 246 clocks = <&clks 122>, <&clks 57>; 247 clock-names = "ipg", "per"; 248 status = "disabled"; 249 }; 250 251 spi2: cspi@50010000 { 252 #address-cells = <1>; 253 #size-cells = <0>; 254 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; 255 reg = <0x50010000 0x4000>; 256 clocks = <&clks 79>, <&clks 79>; 257 clock-names = "ipg", "per"; 258 interrupts = <13>; 259 status = "disabled"; 260 }; 261 262 ssi2: ssi@50014000 { 263 #sound-dai-cells = <0>; 264 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi"; 265 reg = <0x50014000 0x4000>; 266 interrupts = <11>; 267 clocks = <&clks 118>; 268 clock-names = "ipg"; 269 dmas = <&sdma 24 1 0>, 270 <&sdma 25 1 0>; 271 dma-names = "rx", "tx"; 272 status = "disabled"; 273 }; 274 275 esai@50018000 { 276 reg = <0x50018000 0x4000>; 277 interrupts = <7>; 278 }; 279 280 uart5: serial@5002c000 { 281 compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 282 reg = <0x5002c000 0x4000>; 283 interrupts = <40>; 284 clocks = <&clks 124>, <&clks 57>; 285 clock-names = "ipg", "per"; 286 status = "disabled"; 287 }; 288 289 tscadc: tscadc@50030000 { 290 compatible = "fsl,imx25-tsadc"; 291 reg = <0x50030000 0xc>; 292 interrupts = <46>; 293 clocks = <&clks 119>; 294 clock-names = "ipg"; 295 interrupt-controller; 296 #interrupt-cells = <1>; 297 #address-cells = <1>; 298 #size-cells = <1>; 299 status = "disabled"; 300 ranges; 301 302 adc: adc@50030800 { 303 compatible = "fsl,imx25-gcq"; 304 reg = <0x50030800 0x60>; 305 interrupt-parent = <&tscadc>; 306 interrupts = <1>; 307 #address-cells = <1>; 308 #size-cells = <0>; 309 status = "disabled"; 310 }; 311 312 tsc: tcq@50030400 { 313 compatible = "fsl,imx25-tcq"; 314 reg = <0x50030400 0x60>; 315 interrupt-parent = <&tscadc>; 316 interrupts = <0>; 317 fsl,wires = <4>; 318 status = "disabled"; 319 }; 320 }; 321 322 ssi1: ssi@50034000 { 323 #sound-dai-cells = <0>; 324 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi"; 325 reg = <0x50034000 0x4000>; 326 interrupts = <12>; 327 clocks = <&clks 117>; 328 clock-names = "ipg"; 329 dmas = <&sdma 28 1 0>, 330 <&sdma 29 1 0>; 331 dma-names = "rx", "tx"; 332 status = "disabled"; 333 }; 334 335 fec: ethernet@50038000 { 336 compatible = "fsl,imx25-fec"; 337 reg = <0x50038000 0x4000>; 338 interrupts = <57>; 339 clocks = <&clks 88>, <&clks 65>; 340 clock-names = "ipg", "ahb"; 341 status = "disabled"; 342 }; 343 }; 344 345 aips@53f00000 { /* AIPS2 */ 346 compatible = "fsl,aips-bus", "simple-bus"; 347 #address-cells = <1>; 348 #size-cells = <1>; 349 reg = <0x53f00000 0x100000>; 350 ranges; 351 352 aips2: bridge@53f00000 { 353 compatible = "fsl,imx25-aips"; 354 reg = <0x53f00000 0x4000>; 355 }; 356 357 clks: ccm@53f80000 { 358 compatible = "fsl,imx25-ccm"; 359 reg = <0x53f80000 0x4000>; 360 interrupts = <31>; 361 #clock-cells = <1>; 362 }; 363 364 gpt4: timer@53f84000 { 365 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; 366 reg = <0x53f84000 0x4000>; 367 clocks = <&clks 95>, <&clks 47>; 368 clock-names = "ipg", "per"; 369 interrupts = <1>; 370 }; 371 372 gpt3: timer@53f88000 { 373 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; 374 reg = <0x53f88000 0x4000>; 375 clocks = <&clks 94>, <&clks 47>; 376 clock-names = "ipg", "per"; 377 interrupts = <29>; 378 }; 379 380 gpt2: timer@53f8c000 { 381 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; 382 reg = <0x53f8c000 0x4000>; 383 clocks = <&clks 93>, <&clks 47>; 384 clock-names = "ipg", "per"; 385 interrupts = <53>; 386 }; 387 388 gpt1: timer@53f90000 { 389 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; 390 reg = <0x53f90000 0x4000>; 391 clocks = <&clks 92>, <&clks 47>; 392 clock-names = "ipg", "per"; 393 interrupts = <54>; 394 }; 395 396 epit1: timer@53f94000 { 397 compatible = "fsl,imx25-epit"; 398 reg = <0x53f94000 0x4000>; 399 interrupts = <28>; 400 }; 401 402 epit2: timer@53f98000 { 403 compatible = "fsl,imx25-epit"; 404 reg = <0x53f98000 0x4000>; 405 interrupts = <27>; 406 }; 407 408 gpio4: gpio@53f9c000 { 409 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; 410 reg = <0x53f9c000 0x4000>; 411 interrupts = <23>; 412 gpio-controller; 413 #gpio-cells = <2>; 414 interrupt-controller; 415 #interrupt-cells = <2>; 416 }; 417 418 pwm2: pwm@53fa0000 { 419 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 420 #pwm-cells = <2>; 421 reg = <0x53fa0000 0x4000>; 422 clocks = <&clks 106>, <&clks 52>; 423 clock-names = "ipg", "per"; 424 interrupts = <36>; 425 }; 426 427 gpio3: gpio@53fa4000 { 428 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; 429 reg = <0x53fa4000 0x4000>; 430 interrupts = <16>; 431 gpio-controller; 432 #gpio-cells = <2>; 433 interrupt-controller; 434 #interrupt-cells = <2>; 435 }; 436 437 pwm3: pwm@53fa8000 { 438 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 439 #pwm-cells = <2>; 440 reg = <0x53fa8000 0x4000>; 441 clocks = <&clks 107>, <&clks 52>; 442 clock-names = "ipg", "per"; 443 interrupts = <41>; 444 }; 445 446 scc: crypto@53fac000 { 447 compatible = "fsl,imx25-scc"; 448 reg = <0x53fac000 0x4000>; 449 clocks = <&clks 111>; 450 clock-names = "ipg"; 451 interrupts = <49>, <50>; 452 interrupt-names = "scm", "smn"; 453 }; 454 455 rngb: rngb@53fb0000 { 456 compatible = "fsl,imx25-rngb"; 457 reg = <0x53fb0000 0x4000>; 458 clocks = <&clks 109>; 459 interrupts = <22>; 460 }; 461 462 esdhc1: esdhc@53fb4000 { 463 compatible = "fsl,imx25-esdhc"; 464 reg = <0x53fb4000 0x4000>; 465 interrupts = <9>; 466 clocks = <&clks 86>, <&clks 63>, <&clks 45>; 467 clock-names = "ipg", "ahb", "per"; 468 status = "disabled"; 469 }; 470 471 esdhc2: esdhc@53fb8000 { 472 compatible = "fsl,imx25-esdhc"; 473 reg = <0x53fb8000 0x4000>; 474 interrupts = <8>; 475 clocks = <&clks 87>, <&clks 64>, <&clks 46>; 476 clock-names = "ipg", "ahb", "per"; 477 status = "disabled"; 478 }; 479 480 lcdc: lcdc@53fbc000 { 481 compatible = "fsl,imx25-fb", "fsl,imx21-fb"; 482 reg = <0x53fbc000 0x4000>; 483 interrupts = <39>; 484 clocks = <&clks 103>, <&clks 66>, <&clks 49>; 485 clock-names = "ipg", "ahb", "per"; 486 status = "disabled"; 487 }; 488 489 slcdc@53fc0000 { 490 reg = <0x53fc0000 0x4000>; 491 interrupts = <38>; 492 status = "disabled"; 493 }; 494 495 pwm4: pwm@53fc8000 { 496 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 497 #pwm-cells = <2>; 498 reg = <0x53fc8000 0x4000>; 499 clocks = <&clks 108>, <&clks 52>; 500 clock-names = "ipg", "per"; 501 interrupts = <42>; 502 }; 503 504 gpio1: gpio@53fcc000 { 505 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; 506 reg = <0x53fcc000 0x4000>; 507 interrupts = <52>; 508 gpio-controller; 509 #gpio-cells = <2>; 510 interrupt-controller; 511 #interrupt-cells = <2>; 512 }; 513 514 gpio2: gpio@53fd0000 { 515 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; 516 reg = <0x53fd0000 0x4000>; 517 interrupts = <51>; 518 gpio-controller; 519 #gpio-cells = <2>; 520 interrupt-controller; 521 #interrupt-cells = <2>; 522 }; 523 524 sdma: sdma@53fd4000 { 525 compatible = "fsl,imx25-sdma"; 526 reg = <0x53fd4000 0x4000>; 527 clocks = <&clks 112>, <&clks 68>; 528 clock-names = "ipg", "ahb"; 529 #dma-cells = <3>; 530 interrupts = <34>; 531 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin"; 532 }; 533 534 wdog@53fdc000 { 535 compatible = "fsl,imx25-wdt", "fsl,imx21-wdt"; 536 reg = <0x53fdc000 0x4000>; 537 clocks = <&clks 126>; 538 clock-names = ""; 539 interrupts = <55>; 540 }; 541 542 pwm1: pwm@53fe0000 { 543 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 544 #pwm-cells = <2>; 545 reg = <0x53fe0000 0x4000>; 546 clocks = <&clks 105>, <&clks 52>; 547 clock-names = "ipg", "per"; 548 interrupts = <26>; 549 }; 550 551 iim: iim@53ff0000 { 552 compatible = "fsl,imx25-iim", "fsl,imx27-iim"; 553 reg = <0x53ff0000 0x4000>; 554 interrupts = <19>; 555 clocks = <&clks 99>; 556 }; 557 558 usbotg: usb@53ff4000 { 559 compatible = "fsl,imx25-usb", "fsl,imx27-usb"; 560 reg = <0x53ff4000 0x0200>; 561 interrupts = <37>; 562 clocks = <&clks 9>, <&clks 70>, <&clks 8>; 563 clock-names = "ipg", "ahb", "per"; 564 fsl,usbmisc = <&usbmisc 0>; 565 fsl,usbphy = <&usbphy0>; 566 phy_type = "utmi"; 567 dr_mode = "otg"; 568 status = "disabled"; 569 }; 570 571 usbhost1: usb@53ff4400 { 572 compatible = "fsl,imx25-usb", "fsl,imx27-usb"; 573 reg = <0x53ff4400 0x0200>; 574 interrupts = <35>; 575 clocks = <&clks 9>, <&clks 70>, <&clks 8>; 576 clock-names = "ipg", "ahb", "per"; 577 fsl,usbmisc = <&usbmisc 1>; 578 fsl,usbphy = <&usbphy1>; 579 status = "disabled"; 580 }; 581 582 usbmisc: usbmisc@53ff4600 { 583 #index-cells = <1>; 584 compatible = "fsl,imx25-usbmisc"; 585 reg = <0x53ff4600 0x00f>; 586 }; 587 588 dryice@53ffc000 { 589 compatible = "fsl,imx25-dryice", "fsl,imx25-rtc"; 590 reg = <0x53ffc000 0x4000>; 591 clocks = <&clks 81>; 592 clock-names = "ipg"; 593 interrupts = <25 56>; 594 }; 595 }; 596 597 iram: sram@78000000 { 598 compatible = "mmio-sram"; 599 reg = <0x78000000 0x20000>; 600 }; 601 602 emi@80000000 { 603 compatible = "fsl,emi-bus", "simple-bus"; 604 #address-cells = <1>; 605 #size-cells = <1>; 606 reg = <0x80000000 0x3b002000>; 607 ranges; 608 609 nfc: nand@bb000000 { 610 #address-cells = <1>; 611 #size-cells = <1>; 612 613 compatible = "fsl,imx25-nand"; 614 reg = <0xbb000000 0x2000>; 615 clocks = <&clks 50>; 616 clock-names = ""; 617 interrupts = <33>; 618 status = "disabled"; 619 }; 620 }; 621 }; 622 623 usbphy { 624 compatible = "simple-bus"; 625 #address-cells = <1>; 626 #size-cells = <0>; 627 628 usbphy0: usb-phy@0 { 629 reg = <0>; 630 compatible = "usb-nop-xceiv"; 631 }; 632 633 usbphy1: usb-phy@1 { 634 reg = <1>; 635 compatible = "usb-nop-xceiv"; 636 }; 637 }; 638}; 639