1 /*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/device.h>
14 #include <linux/slab.h>
15 #include <linux/export.h>
16 #include <linux/mutex.h>
17 #include <linux/err.h>
18 #include <linux/of.h>
19 #include <linux/rbtree.h>
20 #include <linux/sched.h>
21 #include <linux/delay.h>
22 #include <linux/log2.h>
23
24 #define CREATE_TRACE_POINTS
25 #include "trace.h"
26
27 #include "internal.h"
28
29 /*
30 * Sometimes for failures during very early init the trace
31 * infrastructure isn't available early enough to be used. For this
32 * sort of problem defining LOG_DEVICE will add printks for basic
33 * register I/O on a specific device.
34 */
35 #undef LOG_DEVICE
36
37 static int _regmap_update_bits(struct regmap *map, unsigned int reg,
38 unsigned int mask, unsigned int val,
39 bool *change, bool force_write);
40
41 static int _regmap_bus_reg_read(void *context, unsigned int reg,
42 unsigned int *val);
43 static int _regmap_bus_read(void *context, unsigned int reg,
44 unsigned int *val);
45 static int _regmap_bus_formatted_write(void *context, unsigned int reg,
46 unsigned int val);
47 static int _regmap_bus_reg_write(void *context, unsigned int reg,
48 unsigned int val);
49 static int _regmap_bus_raw_write(void *context, unsigned int reg,
50 unsigned int val);
51
regmap_reg_in_ranges(unsigned int reg,const struct regmap_range * ranges,unsigned int nranges)52 bool regmap_reg_in_ranges(unsigned int reg,
53 const struct regmap_range *ranges,
54 unsigned int nranges)
55 {
56 const struct regmap_range *r;
57 int i;
58
59 for (i = 0, r = ranges; i < nranges; i++, r++)
60 if (regmap_reg_in_range(reg, r))
61 return true;
62 return false;
63 }
64 EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
65
regmap_check_range_table(struct regmap * map,unsigned int reg,const struct regmap_access_table * table)66 bool regmap_check_range_table(struct regmap *map, unsigned int reg,
67 const struct regmap_access_table *table)
68 {
69 /* Check "no ranges" first */
70 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
71 return false;
72
73 /* In case zero "yes ranges" are supplied, any reg is OK */
74 if (!table->n_yes_ranges)
75 return true;
76
77 return regmap_reg_in_ranges(reg, table->yes_ranges,
78 table->n_yes_ranges);
79 }
80 EXPORT_SYMBOL_GPL(regmap_check_range_table);
81
regmap_writeable(struct regmap * map,unsigned int reg)82 bool regmap_writeable(struct regmap *map, unsigned int reg)
83 {
84 if (map->max_register && reg > map->max_register)
85 return false;
86
87 if (map->writeable_reg)
88 return map->writeable_reg(map->dev, reg);
89
90 if (map->wr_table)
91 return regmap_check_range_table(map, reg, map->wr_table);
92
93 return true;
94 }
95
regmap_cached(struct regmap * map,unsigned int reg)96 bool regmap_cached(struct regmap *map, unsigned int reg)
97 {
98 int ret;
99 unsigned int val;
100
101 if (map->cache_type == REGCACHE_NONE)
102 return false;
103
104 if (!map->cache_ops)
105 return false;
106
107 if (map->max_register && reg > map->max_register)
108 return false;
109
110 map->lock(map->lock_arg);
111 ret = regcache_read(map, reg, &val);
112 map->unlock(map->lock_arg);
113 if (ret)
114 return false;
115
116 return true;
117 }
118
regmap_readable(struct regmap * map,unsigned int reg)119 bool regmap_readable(struct regmap *map, unsigned int reg)
120 {
121 if (!map->reg_read)
122 return false;
123
124 if (map->max_register && reg > map->max_register)
125 return false;
126
127 if (map->format.format_write)
128 return false;
129
130 if (map->readable_reg)
131 return map->readable_reg(map->dev, reg);
132
133 if (map->rd_table)
134 return regmap_check_range_table(map, reg, map->rd_table);
135
136 return true;
137 }
138
regmap_volatile(struct regmap * map,unsigned int reg)139 bool regmap_volatile(struct regmap *map, unsigned int reg)
140 {
141 if (!map->format.format_write && !regmap_readable(map, reg))
142 return false;
143
144 if (map->volatile_reg)
145 return map->volatile_reg(map->dev, reg);
146
147 if (map->volatile_table)
148 return regmap_check_range_table(map, reg, map->volatile_table);
149
150 if (map->cache_ops)
151 return false;
152 else
153 return true;
154 }
155
regmap_precious(struct regmap * map,unsigned int reg)156 bool regmap_precious(struct regmap *map, unsigned int reg)
157 {
158 if (!regmap_readable(map, reg))
159 return false;
160
161 if (map->precious_reg)
162 return map->precious_reg(map->dev, reg);
163
164 if (map->precious_table)
165 return regmap_check_range_table(map, reg, map->precious_table);
166
167 return false;
168 }
169
regmap_volatile_range(struct regmap * map,unsigned int reg,size_t num)170 static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
171 size_t num)
172 {
173 unsigned int i;
174
175 for (i = 0; i < num; i++)
176 if (!regmap_volatile(map, reg + i))
177 return false;
178
179 return true;
180 }
181
regmap_format_2_6_write(struct regmap * map,unsigned int reg,unsigned int val)182 static void regmap_format_2_6_write(struct regmap *map,
183 unsigned int reg, unsigned int val)
184 {
185 u8 *out = map->work_buf;
186
187 *out = (reg << 6) | val;
188 }
189
regmap_format_4_12_write(struct regmap * map,unsigned int reg,unsigned int val)190 static void regmap_format_4_12_write(struct regmap *map,
191 unsigned int reg, unsigned int val)
192 {
193 __be16 *out = map->work_buf;
194 *out = cpu_to_be16((reg << 12) | val);
195 }
196
regmap_format_7_9_write(struct regmap * map,unsigned int reg,unsigned int val)197 static void regmap_format_7_9_write(struct regmap *map,
198 unsigned int reg, unsigned int val)
199 {
200 __be16 *out = map->work_buf;
201 *out = cpu_to_be16((reg << 9) | val);
202 }
203
regmap_format_10_14_write(struct regmap * map,unsigned int reg,unsigned int val)204 static void regmap_format_10_14_write(struct regmap *map,
205 unsigned int reg, unsigned int val)
206 {
207 u8 *out = map->work_buf;
208
209 out[2] = val;
210 out[1] = (val >> 8) | (reg << 6);
211 out[0] = reg >> 2;
212 }
213
regmap_format_8(void * buf,unsigned int val,unsigned int shift)214 static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
215 {
216 u8 *b = buf;
217
218 b[0] = val << shift;
219 }
220
regmap_format_16_be(void * buf,unsigned int val,unsigned int shift)221 static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
222 {
223 __be16 *b = buf;
224
225 b[0] = cpu_to_be16(val << shift);
226 }
227
regmap_format_16_le(void * buf,unsigned int val,unsigned int shift)228 static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
229 {
230 __le16 *b = buf;
231
232 b[0] = cpu_to_le16(val << shift);
233 }
234
regmap_format_16_native(void * buf,unsigned int val,unsigned int shift)235 static void regmap_format_16_native(void *buf, unsigned int val,
236 unsigned int shift)
237 {
238 *(u16 *)buf = val << shift;
239 }
240
regmap_format_24(void * buf,unsigned int val,unsigned int shift)241 static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
242 {
243 u8 *b = buf;
244
245 val <<= shift;
246
247 b[0] = val >> 16;
248 b[1] = val >> 8;
249 b[2] = val;
250 }
251
regmap_format_32_be(void * buf,unsigned int val,unsigned int shift)252 static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
253 {
254 __be32 *b = buf;
255
256 b[0] = cpu_to_be32(val << shift);
257 }
258
regmap_format_32_le(void * buf,unsigned int val,unsigned int shift)259 static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
260 {
261 __le32 *b = buf;
262
263 b[0] = cpu_to_le32(val << shift);
264 }
265
regmap_format_32_native(void * buf,unsigned int val,unsigned int shift)266 static void regmap_format_32_native(void *buf, unsigned int val,
267 unsigned int shift)
268 {
269 *(u32 *)buf = val << shift;
270 }
271
272 #ifdef CONFIG_64BIT
regmap_format_64_be(void * buf,unsigned int val,unsigned int shift)273 static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift)
274 {
275 __be64 *b = buf;
276
277 b[0] = cpu_to_be64((u64)val << shift);
278 }
279
regmap_format_64_le(void * buf,unsigned int val,unsigned int shift)280 static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift)
281 {
282 __le64 *b = buf;
283
284 b[0] = cpu_to_le64((u64)val << shift);
285 }
286
regmap_format_64_native(void * buf,unsigned int val,unsigned int shift)287 static void regmap_format_64_native(void *buf, unsigned int val,
288 unsigned int shift)
289 {
290 *(u64 *)buf = (u64)val << shift;
291 }
292 #endif
293
regmap_parse_inplace_noop(void * buf)294 static void regmap_parse_inplace_noop(void *buf)
295 {
296 }
297
regmap_parse_8(const void * buf)298 static unsigned int regmap_parse_8(const void *buf)
299 {
300 const u8 *b = buf;
301
302 return b[0];
303 }
304
regmap_parse_16_be(const void * buf)305 static unsigned int regmap_parse_16_be(const void *buf)
306 {
307 const __be16 *b = buf;
308
309 return be16_to_cpu(b[0]);
310 }
311
regmap_parse_16_le(const void * buf)312 static unsigned int regmap_parse_16_le(const void *buf)
313 {
314 const __le16 *b = buf;
315
316 return le16_to_cpu(b[0]);
317 }
318
regmap_parse_16_be_inplace(void * buf)319 static void regmap_parse_16_be_inplace(void *buf)
320 {
321 __be16 *b = buf;
322
323 b[0] = be16_to_cpu(b[0]);
324 }
325
regmap_parse_16_le_inplace(void * buf)326 static void regmap_parse_16_le_inplace(void *buf)
327 {
328 __le16 *b = buf;
329
330 b[0] = le16_to_cpu(b[0]);
331 }
332
regmap_parse_16_native(const void * buf)333 static unsigned int regmap_parse_16_native(const void *buf)
334 {
335 return *(u16 *)buf;
336 }
337
regmap_parse_24(const void * buf)338 static unsigned int regmap_parse_24(const void *buf)
339 {
340 const u8 *b = buf;
341 unsigned int ret = b[2];
342 ret |= ((unsigned int)b[1]) << 8;
343 ret |= ((unsigned int)b[0]) << 16;
344
345 return ret;
346 }
347
regmap_parse_32_be(const void * buf)348 static unsigned int regmap_parse_32_be(const void *buf)
349 {
350 const __be32 *b = buf;
351
352 return be32_to_cpu(b[0]);
353 }
354
regmap_parse_32_le(const void * buf)355 static unsigned int regmap_parse_32_le(const void *buf)
356 {
357 const __le32 *b = buf;
358
359 return le32_to_cpu(b[0]);
360 }
361
regmap_parse_32_be_inplace(void * buf)362 static void regmap_parse_32_be_inplace(void *buf)
363 {
364 __be32 *b = buf;
365
366 b[0] = be32_to_cpu(b[0]);
367 }
368
regmap_parse_32_le_inplace(void * buf)369 static void regmap_parse_32_le_inplace(void *buf)
370 {
371 __le32 *b = buf;
372
373 b[0] = le32_to_cpu(b[0]);
374 }
375
regmap_parse_32_native(const void * buf)376 static unsigned int regmap_parse_32_native(const void *buf)
377 {
378 return *(u32 *)buf;
379 }
380
381 #ifdef CONFIG_64BIT
regmap_parse_64_be(const void * buf)382 static unsigned int regmap_parse_64_be(const void *buf)
383 {
384 const __be64 *b = buf;
385
386 return be64_to_cpu(b[0]);
387 }
388
regmap_parse_64_le(const void * buf)389 static unsigned int regmap_parse_64_le(const void *buf)
390 {
391 const __le64 *b = buf;
392
393 return le64_to_cpu(b[0]);
394 }
395
regmap_parse_64_be_inplace(void * buf)396 static void regmap_parse_64_be_inplace(void *buf)
397 {
398 __be64 *b = buf;
399
400 b[0] = be64_to_cpu(b[0]);
401 }
402
regmap_parse_64_le_inplace(void * buf)403 static void regmap_parse_64_le_inplace(void *buf)
404 {
405 __le64 *b = buf;
406
407 b[0] = le64_to_cpu(b[0]);
408 }
409
regmap_parse_64_native(const void * buf)410 static unsigned int regmap_parse_64_native(const void *buf)
411 {
412 return *(u64 *)buf;
413 }
414 #endif
415
regmap_lock_mutex(void * __map)416 static void regmap_lock_mutex(void *__map)
417 {
418 struct regmap *map = __map;
419 mutex_lock(&map->mutex);
420 }
421
regmap_unlock_mutex(void * __map)422 static void regmap_unlock_mutex(void *__map)
423 {
424 struct regmap *map = __map;
425 mutex_unlock(&map->mutex);
426 }
427
regmap_lock_spinlock(void * __map)428 static void regmap_lock_spinlock(void *__map)
429 __acquires(&map->spinlock)
430 {
431 struct regmap *map = __map;
432 unsigned long flags;
433
434 spin_lock_irqsave(&map->spinlock, flags);
435 map->spinlock_flags = flags;
436 }
437
regmap_unlock_spinlock(void * __map)438 static void regmap_unlock_spinlock(void *__map)
439 __releases(&map->spinlock)
440 {
441 struct regmap *map = __map;
442 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
443 }
444
dev_get_regmap_release(struct device * dev,void * res)445 static void dev_get_regmap_release(struct device *dev, void *res)
446 {
447 /*
448 * We don't actually have anything to do here; the goal here
449 * is not to manage the regmap but to provide a simple way to
450 * get the regmap back given a struct device.
451 */
452 }
453
_regmap_range_add(struct regmap * map,struct regmap_range_node * data)454 static bool _regmap_range_add(struct regmap *map,
455 struct regmap_range_node *data)
456 {
457 struct rb_root *root = &map->range_tree;
458 struct rb_node **new = &(root->rb_node), *parent = NULL;
459
460 while (*new) {
461 struct regmap_range_node *this =
462 rb_entry(*new, struct regmap_range_node, node);
463
464 parent = *new;
465 if (data->range_max < this->range_min)
466 new = &((*new)->rb_left);
467 else if (data->range_min > this->range_max)
468 new = &((*new)->rb_right);
469 else
470 return false;
471 }
472
473 rb_link_node(&data->node, parent, new);
474 rb_insert_color(&data->node, root);
475
476 return true;
477 }
478
_regmap_range_lookup(struct regmap * map,unsigned int reg)479 static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
480 unsigned int reg)
481 {
482 struct rb_node *node = map->range_tree.rb_node;
483
484 while (node) {
485 struct regmap_range_node *this =
486 rb_entry(node, struct regmap_range_node, node);
487
488 if (reg < this->range_min)
489 node = node->rb_left;
490 else if (reg > this->range_max)
491 node = node->rb_right;
492 else
493 return this;
494 }
495
496 return NULL;
497 }
498
regmap_range_exit(struct regmap * map)499 static void regmap_range_exit(struct regmap *map)
500 {
501 struct rb_node *next;
502 struct regmap_range_node *range_node;
503
504 next = rb_first(&map->range_tree);
505 while (next) {
506 range_node = rb_entry(next, struct regmap_range_node, node);
507 next = rb_next(&range_node->node);
508 rb_erase(&range_node->node, &map->range_tree);
509 kfree(range_node);
510 }
511
512 kfree(map->selector_work_buf);
513 }
514
regmap_attach_dev(struct device * dev,struct regmap * map,const struct regmap_config * config)515 int regmap_attach_dev(struct device *dev, struct regmap *map,
516 const struct regmap_config *config)
517 {
518 struct regmap **m;
519
520 map->dev = dev;
521
522 regmap_debugfs_init(map, config->name);
523
524 /* Add a devres resource for dev_get_regmap() */
525 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
526 if (!m) {
527 regmap_debugfs_exit(map);
528 return -ENOMEM;
529 }
530 *m = map;
531 devres_add(dev, m);
532
533 return 0;
534 }
535 EXPORT_SYMBOL_GPL(regmap_attach_dev);
536
regmap_get_reg_endian(const struct regmap_bus * bus,const struct regmap_config * config)537 static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
538 const struct regmap_config *config)
539 {
540 enum regmap_endian endian;
541
542 /* Retrieve the endianness specification from the regmap config */
543 endian = config->reg_format_endian;
544
545 /* If the regmap config specified a non-default value, use that */
546 if (endian != REGMAP_ENDIAN_DEFAULT)
547 return endian;
548
549 /* Retrieve the endianness specification from the bus config */
550 if (bus && bus->reg_format_endian_default)
551 endian = bus->reg_format_endian_default;
552
553 /* If the bus specified a non-default value, use that */
554 if (endian != REGMAP_ENDIAN_DEFAULT)
555 return endian;
556
557 /* Use this if no other value was found */
558 return REGMAP_ENDIAN_BIG;
559 }
560
regmap_get_val_endian(struct device * dev,const struct regmap_bus * bus,const struct regmap_config * config)561 enum regmap_endian regmap_get_val_endian(struct device *dev,
562 const struct regmap_bus *bus,
563 const struct regmap_config *config)
564 {
565 struct device_node *np;
566 enum regmap_endian endian;
567
568 /* Retrieve the endianness specification from the regmap config */
569 endian = config->val_format_endian;
570
571 /* If the regmap config specified a non-default value, use that */
572 if (endian != REGMAP_ENDIAN_DEFAULT)
573 return endian;
574
575 /* If the dev and dev->of_node exist try to get endianness from DT */
576 if (dev && dev->of_node) {
577 np = dev->of_node;
578
579 /* Parse the device's DT node for an endianness specification */
580 if (of_property_read_bool(np, "big-endian"))
581 endian = REGMAP_ENDIAN_BIG;
582 else if (of_property_read_bool(np, "little-endian"))
583 endian = REGMAP_ENDIAN_LITTLE;
584 else if (of_property_read_bool(np, "native-endian"))
585 endian = REGMAP_ENDIAN_NATIVE;
586
587 /* If the endianness was specified in DT, use that */
588 if (endian != REGMAP_ENDIAN_DEFAULT)
589 return endian;
590 }
591
592 /* Retrieve the endianness specification from the bus config */
593 if (bus && bus->val_format_endian_default)
594 endian = bus->val_format_endian_default;
595
596 /* If the bus specified a non-default value, use that */
597 if (endian != REGMAP_ENDIAN_DEFAULT)
598 return endian;
599
600 /* Use this if no other value was found */
601 return REGMAP_ENDIAN_BIG;
602 }
603 EXPORT_SYMBOL_GPL(regmap_get_val_endian);
604
__regmap_init(struct device * dev,const struct regmap_bus * bus,void * bus_context,const struct regmap_config * config,struct lock_class_key * lock_key,const char * lock_name)605 struct regmap *__regmap_init(struct device *dev,
606 const struct regmap_bus *bus,
607 void *bus_context,
608 const struct regmap_config *config,
609 struct lock_class_key *lock_key,
610 const char *lock_name)
611 {
612 struct regmap *map;
613 int ret = -EINVAL;
614 enum regmap_endian reg_endian, val_endian;
615 int i, j;
616
617 if (!config)
618 goto err;
619
620 map = kzalloc(sizeof(*map), GFP_KERNEL);
621 if (map == NULL) {
622 ret = -ENOMEM;
623 goto err;
624 }
625
626 if (config->lock && config->unlock) {
627 map->lock = config->lock;
628 map->unlock = config->unlock;
629 map->lock_arg = config->lock_arg;
630 } else {
631 if ((bus && bus->fast_io) ||
632 config->fast_io) {
633 spin_lock_init(&map->spinlock);
634 map->lock = regmap_lock_spinlock;
635 map->unlock = regmap_unlock_spinlock;
636 lockdep_set_class_and_name(&map->spinlock,
637 lock_key, lock_name);
638 } else {
639 mutex_init(&map->mutex);
640 map->lock = regmap_lock_mutex;
641 map->unlock = regmap_unlock_mutex;
642 lockdep_set_class_and_name(&map->mutex,
643 lock_key, lock_name);
644 }
645 map->lock_arg = map;
646 }
647
648 /*
649 * When we write in fast-paths with regmap_bulk_write() don't allocate
650 * scratch buffers with sleeping allocations.
651 */
652 if ((bus && bus->fast_io) || config->fast_io)
653 map->alloc_flags = GFP_ATOMIC;
654 else
655 map->alloc_flags = GFP_KERNEL;
656
657 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
658 map->format.pad_bytes = config->pad_bits / 8;
659 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
660 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
661 config->val_bits + config->pad_bits, 8);
662 map->reg_shift = config->pad_bits % 8;
663 if (config->reg_stride)
664 map->reg_stride = config->reg_stride;
665 else
666 map->reg_stride = 1;
667 if (is_power_of_2(map->reg_stride))
668 map->reg_stride_order = ilog2(map->reg_stride);
669 else
670 map->reg_stride_order = -1;
671 map->use_single_read = config->use_single_rw || !bus || !bus->read;
672 map->use_single_write = config->use_single_rw || !bus || !bus->write;
673 map->can_multi_write = config->can_multi_write && bus && bus->write;
674 if (bus) {
675 map->max_raw_read = bus->max_raw_read;
676 map->max_raw_write = bus->max_raw_write;
677 }
678 map->dev = dev;
679 map->bus = bus;
680 map->bus_context = bus_context;
681 map->max_register = config->max_register;
682 map->wr_table = config->wr_table;
683 map->rd_table = config->rd_table;
684 map->volatile_table = config->volatile_table;
685 map->precious_table = config->precious_table;
686 map->writeable_reg = config->writeable_reg;
687 map->readable_reg = config->readable_reg;
688 map->volatile_reg = config->volatile_reg;
689 map->precious_reg = config->precious_reg;
690 map->cache_type = config->cache_type;
691 map->name = config->name;
692
693 spin_lock_init(&map->async_lock);
694 INIT_LIST_HEAD(&map->async_list);
695 INIT_LIST_HEAD(&map->async_free);
696 init_waitqueue_head(&map->async_waitq);
697
698 if (config->read_flag_mask || config->write_flag_mask) {
699 map->read_flag_mask = config->read_flag_mask;
700 map->write_flag_mask = config->write_flag_mask;
701 } else if (bus) {
702 map->read_flag_mask = bus->read_flag_mask;
703 }
704
705 if (!bus) {
706 map->reg_read = config->reg_read;
707 map->reg_write = config->reg_write;
708
709 map->defer_caching = false;
710 goto skip_format_initialization;
711 } else if (!bus->read || !bus->write) {
712 map->reg_read = _regmap_bus_reg_read;
713 map->reg_write = _regmap_bus_reg_write;
714
715 map->defer_caching = false;
716 goto skip_format_initialization;
717 } else {
718 map->reg_read = _regmap_bus_read;
719 map->reg_update_bits = bus->reg_update_bits;
720 }
721
722 reg_endian = regmap_get_reg_endian(bus, config);
723 val_endian = regmap_get_val_endian(dev, bus, config);
724
725 switch (config->reg_bits + map->reg_shift) {
726 case 2:
727 switch (config->val_bits) {
728 case 6:
729 map->format.format_write = regmap_format_2_6_write;
730 break;
731 default:
732 goto err_map;
733 }
734 break;
735
736 case 4:
737 switch (config->val_bits) {
738 case 12:
739 map->format.format_write = regmap_format_4_12_write;
740 break;
741 default:
742 goto err_map;
743 }
744 break;
745
746 case 7:
747 switch (config->val_bits) {
748 case 9:
749 map->format.format_write = regmap_format_7_9_write;
750 break;
751 default:
752 goto err_map;
753 }
754 break;
755
756 case 10:
757 switch (config->val_bits) {
758 case 14:
759 map->format.format_write = regmap_format_10_14_write;
760 break;
761 default:
762 goto err_map;
763 }
764 break;
765
766 case 8:
767 map->format.format_reg = regmap_format_8;
768 break;
769
770 case 16:
771 switch (reg_endian) {
772 case REGMAP_ENDIAN_BIG:
773 map->format.format_reg = regmap_format_16_be;
774 break;
775 case REGMAP_ENDIAN_LITTLE:
776 map->format.format_reg = regmap_format_16_le;
777 break;
778 case REGMAP_ENDIAN_NATIVE:
779 map->format.format_reg = regmap_format_16_native;
780 break;
781 default:
782 goto err_map;
783 }
784 break;
785
786 case 24:
787 if (reg_endian != REGMAP_ENDIAN_BIG)
788 goto err_map;
789 map->format.format_reg = regmap_format_24;
790 break;
791
792 case 32:
793 switch (reg_endian) {
794 case REGMAP_ENDIAN_BIG:
795 map->format.format_reg = regmap_format_32_be;
796 break;
797 case REGMAP_ENDIAN_LITTLE:
798 map->format.format_reg = regmap_format_32_le;
799 break;
800 case REGMAP_ENDIAN_NATIVE:
801 map->format.format_reg = regmap_format_32_native;
802 break;
803 default:
804 goto err_map;
805 }
806 break;
807
808 #ifdef CONFIG_64BIT
809 case 64:
810 switch (reg_endian) {
811 case REGMAP_ENDIAN_BIG:
812 map->format.format_reg = regmap_format_64_be;
813 break;
814 case REGMAP_ENDIAN_LITTLE:
815 map->format.format_reg = regmap_format_64_le;
816 break;
817 case REGMAP_ENDIAN_NATIVE:
818 map->format.format_reg = regmap_format_64_native;
819 break;
820 default:
821 goto err_map;
822 }
823 break;
824 #endif
825
826 default:
827 goto err_map;
828 }
829
830 if (val_endian == REGMAP_ENDIAN_NATIVE)
831 map->format.parse_inplace = regmap_parse_inplace_noop;
832
833 switch (config->val_bits) {
834 case 8:
835 map->format.format_val = regmap_format_8;
836 map->format.parse_val = regmap_parse_8;
837 map->format.parse_inplace = regmap_parse_inplace_noop;
838 break;
839 case 16:
840 switch (val_endian) {
841 case REGMAP_ENDIAN_BIG:
842 map->format.format_val = regmap_format_16_be;
843 map->format.parse_val = regmap_parse_16_be;
844 map->format.parse_inplace = regmap_parse_16_be_inplace;
845 break;
846 case REGMAP_ENDIAN_LITTLE:
847 map->format.format_val = regmap_format_16_le;
848 map->format.parse_val = regmap_parse_16_le;
849 map->format.parse_inplace = regmap_parse_16_le_inplace;
850 break;
851 case REGMAP_ENDIAN_NATIVE:
852 map->format.format_val = regmap_format_16_native;
853 map->format.parse_val = regmap_parse_16_native;
854 break;
855 default:
856 goto err_map;
857 }
858 break;
859 case 24:
860 if (val_endian != REGMAP_ENDIAN_BIG)
861 goto err_map;
862 map->format.format_val = regmap_format_24;
863 map->format.parse_val = regmap_parse_24;
864 break;
865 case 32:
866 switch (val_endian) {
867 case REGMAP_ENDIAN_BIG:
868 map->format.format_val = regmap_format_32_be;
869 map->format.parse_val = regmap_parse_32_be;
870 map->format.parse_inplace = regmap_parse_32_be_inplace;
871 break;
872 case REGMAP_ENDIAN_LITTLE:
873 map->format.format_val = regmap_format_32_le;
874 map->format.parse_val = regmap_parse_32_le;
875 map->format.parse_inplace = regmap_parse_32_le_inplace;
876 break;
877 case REGMAP_ENDIAN_NATIVE:
878 map->format.format_val = regmap_format_32_native;
879 map->format.parse_val = regmap_parse_32_native;
880 break;
881 default:
882 goto err_map;
883 }
884 break;
885 #ifdef CONFIG_64BIT
886 case 64:
887 switch (val_endian) {
888 case REGMAP_ENDIAN_BIG:
889 map->format.format_val = regmap_format_64_be;
890 map->format.parse_val = regmap_parse_64_be;
891 map->format.parse_inplace = regmap_parse_64_be_inplace;
892 break;
893 case REGMAP_ENDIAN_LITTLE:
894 map->format.format_val = regmap_format_64_le;
895 map->format.parse_val = regmap_parse_64_le;
896 map->format.parse_inplace = regmap_parse_64_le_inplace;
897 break;
898 case REGMAP_ENDIAN_NATIVE:
899 map->format.format_val = regmap_format_64_native;
900 map->format.parse_val = regmap_parse_64_native;
901 break;
902 default:
903 goto err_map;
904 }
905 break;
906 #endif
907 }
908
909 if (map->format.format_write) {
910 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
911 (val_endian != REGMAP_ENDIAN_BIG))
912 goto err_map;
913 map->use_single_write = true;
914 }
915
916 if (!map->format.format_write &&
917 !(map->format.format_reg && map->format.format_val))
918 goto err_map;
919
920 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
921 if (map->work_buf == NULL) {
922 ret = -ENOMEM;
923 goto err_map;
924 }
925
926 if (map->format.format_write) {
927 map->defer_caching = false;
928 map->reg_write = _regmap_bus_formatted_write;
929 } else if (map->format.format_val) {
930 map->defer_caching = true;
931 map->reg_write = _regmap_bus_raw_write;
932 }
933
934 skip_format_initialization:
935
936 map->range_tree = RB_ROOT;
937 for (i = 0; i < config->num_ranges; i++) {
938 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
939 struct regmap_range_node *new;
940
941 /* Sanity check */
942 if (range_cfg->range_max < range_cfg->range_min) {
943 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
944 range_cfg->range_max, range_cfg->range_min);
945 goto err_range;
946 }
947
948 if (range_cfg->range_max > map->max_register) {
949 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
950 range_cfg->range_max, map->max_register);
951 goto err_range;
952 }
953
954 if (range_cfg->selector_reg > map->max_register) {
955 dev_err(map->dev,
956 "Invalid range %d: selector out of map\n", i);
957 goto err_range;
958 }
959
960 if (range_cfg->window_len == 0) {
961 dev_err(map->dev, "Invalid range %d: window_len 0\n",
962 i);
963 goto err_range;
964 }
965
966 /* Make sure, that this register range has no selector
967 or data window within its boundary */
968 for (j = 0; j < config->num_ranges; j++) {
969 unsigned sel_reg = config->ranges[j].selector_reg;
970 unsigned win_min = config->ranges[j].window_start;
971 unsigned win_max = win_min +
972 config->ranges[j].window_len - 1;
973
974 /* Allow data window inside its own virtual range */
975 if (j == i)
976 continue;
977
978 if (range_cfg->range_min <= sel_reg &&
979 sel_reg <= range_cfg->range_max) {
980 dev_err(map->dev,
981 "Range %d: selector for %d in window\n",
982 i, j);
983 goto err_range;
984 }
985
986 if (!(win_max < range_cfg->range_min ||
987 win_min > range_cfg->range_max)) {
988 dev_err(map->dev,
989 "Range %d: window for %d in window\n",
990 i, j);
991 goto err_range;
992 }
993 }
994
995 new = kzalloc(sizeof(*new), GFP_KERNEL);
996 if (new == NULL) {
997 ret = -ENOMEM;
998 goto err_range;
999 }
1000
1001 new->map = map;
1002 new->name = range_cfg->name;
1003 new->range_min = range_cfg->range_min;
1004 new->range_max = range_cfg->range_max;
1005 new->selector_reg = range_cfg->selector_reg;
1006 new->selector_mask = range_cfg->selector_mask;
1007 new->selector_shift = range_cfg->selector_shift;
1008 new->window_start = range_cfg->window_start;
1009 new->window_len = range_cfg->window_len;
1010
1011 if (!_regmap_range_add(map, new)) {
1012 dev_err(map->dev, "Failed to add range %d\n", i);
1013 kfree(new);
1014 goto err_range;
1015 }
1016
1017 if (map->selector_work_buf == NULL) {
1018 map->selector_work_buf =
1019 kzalloc(map->format.buf_size, GFP_KERNEL);
1020 if (map->selector_work_buf == NULL) {
1021 ret = -ENOMEM;
1022 goto err_range;
1023 }
1024 }
1025 }
1026
1027 ret = regcache_init(map, config);
1028 if (ret != 0)
1029 goto err_range;
1030
1031 if (dev) {
1032 ret = regmap_attach_dev(dev, map, config);
1033 if (ret != 0)
1034 goto err_regcache;
1035 }
1036
1037 return map;
1038
1039 err_regcache:
1040 regcache_exit(map);
1041 err_range:
1042 regmap_range_exit(map);
1043 kfree(map->work_buf);
1044 err_map:
1045 kfree(map);
1046 err:
1047 return ERR_PTR(ret);
1048 }
1049 EXPORT_SYMBOL_GPL(__regmap_init);
1050
devm_regmap_release(struct device * dev,void * res)1051 static void devm_regmap_release(struct device *dev, void *res)
1052 {
1053 regmap_exit(*(struct regmap **)res);
1054 }
1055
__devm_regmap_init(struct device * dev,const struct regmap_bus * bus,void * bus_context,const struct regmap_config * config,struct lock_class_key * lock_key,const char * lock_name)1056 struct regmap *__devm_regmap_init(struct device *dev,
1057 const struct regmap_bus *bus,
1058 void *bus_context,
1059 const struct regmap_config *config,
1060 struct lock_class_key *lock_key,
1061 const char *lock_name)
1062 {
1063 struct regmap **ptr, *regmap;
1064
1065 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1066 if (!ptr)
1067 return ERR_PTR(-ENOMEM);
1068
1069 regmap = __regmap_init(dev, bus, bus_context, config,
1070 lock_key, lock_name);
1071 if (!IS_ERR(regmap)) {
1072 *ptr = regmap;
1073 devres_add(dev, ptr);
1074 } else {
1075 devres_free(ptr);
1076 }
1077
1078 return regmap;
1079 }
1080 EXPORT_SYMBOL_GPL(__devm_regmap_init);
1081
regmap_field_init(struct regmap_field * rm_field,struct regmap * regmap,struct reg_field reg_field)1082 static void regmap_field_init(struct regmap_field *rm_field,
1083 struct regmap *regmap, struct reg_field reg_field)
1084 {
1085 rm_field->regmap = regmap;
1086 rm_field->reg = reg_field.reg;
1087 rm_field->shift = reg_field.lsb;
1088 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
1089 rm_field->id_size = reg_field.id_size;
1090 rm_field->id_offset = reg_field.id_offset;
1091 }
1092
1093 /**
1094 * devm_regmap_field_alloc() - Allocate and initialise a register field.
1095 *
1096 * @dev: Device that will be interacted with
1097 * @regmap: regmap bank in which this register field is located.
1098 * @reg_field: Register field with in the bank.
1099 *
1100 * The return value will be an ERR_PTR() on error or a valid pointer
1101 * to a struct regmap_field. The regmap_field will be automatically freed
1102 * by the device management code.
1103 */
devm_regmap_field_alloc(struct device * dev,struct regmap * regmap,struct reg_field reg_field)1104 struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1105 struct regmap *regmap, struct reg_field reg_field)
1106 {
1107 struct regmap_field *rm_field = devm_kzalloc(dev,
1108 sizeof(*rm_field), GFP_KERNEL);
1109 if (!rm_field)
1110 return ERR_PTR(-ENOMEM);
1111
1112 regmap_field_init(rm_field, regmap, reg_field);
1113
1114 return rm_field;
1115
1116 }
1117 EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1118
1119 /**
1120 * devm_regmap_field_free() - Free a register field allocated using
1121 * devm_regmap_field_alloc.
1122 *
1123 * @dev: Device that will be interacted with
1124 * @field: regmap field which should be freed.
1125 *
1126 * Free register field allocated using devm_regmap_field_alloc(). Usually
1127 * drivers need not call this function, as the memory allocated via devm
1128 * will be freed as per device-driver life-cyle.
1129 */
devm_regmap_field_free(struct device * dev,struct regmap_field * field)1130 void devm_regmap_field_free(struct device *dev,
1131 struct regmap_field *field)
1132 {
1133 devm_kfree(dev, field);
1134 }
1135 EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1136
1137 /**
1138 * regmap_field_alloc() - Allocate and initialise a register field.
1139 *
1140 * @regmap: regmap bank in which this register field is located.
1141 * @reg_field: Register field with in the bank.
1142 *
1143 * The return value will be an ERR_PTR() on error or a valid pointer
1144 * to a struct regmap_field. The regmap_field should be freed by the
1145 * user once its finished working with it using regmap_field_free().
1146 */
regmap_field_alloc(struct regmap * regmap,struct reg_field reg_field)1147 struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1148 struct reg_field reg_field)
1149 {
1150 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1151
1152 if (!rm_field)
1153 return ERR_PTR(-ENOMEM);
1154
1155 regmap_field_init(rm_field, regmap, reg_field);
1156
1157 return rm_field;
1158 }
1159 EXPORT_SYMBOL_GPL(regmap_field_alloc);
1160
1161 /**
1162 * regmap_field_free() - Free register field allocated using
1163 * regmap_field_alloc.
1164 *
1165 * @field: regmap field which should be freed.
1166 */
regmap_field_free(struct regmap_field * field)1167 void regmap_field_free(struct regmap_field *field)
1168 {
1169 kfree(field);
1170 }
1171 EXPORT_SYMBOL_GPL(regmap_field_free);
1172
1173 /**
1174 * regmap_reinit_cache() - Reinitialise the current register cache
1175 *
1176 * @map: Register map to operate on.
1177 * @config: New configuration. Only the cache data will be used.
1178 *
1179 * Discard any existing register cache for the map and initialize a
1180 * new cache. This can be used to restore the cache to defaults or to
1181 * update the cache configuration to reflect runtime discovery of the
1182 * hardware.
1183 *
1184 * No explicit locking is done here, the user needs to ensure that
1185 * this function will not race with other calls to regmap.
1186 */
regmap_reinit_cache(struct regmap * map,const struct regmap_config * config)1187 int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1188 {
1189 regcache_exit(map);
1190 regmap_debugfs_exit(map);
1191
1192 map->max_register = config->max_register;
1193 map->writeable_reg = config->writeable_reg;
1194 map->readable_reg = config->readable_reg;
1195 map->volatile_reg = config->volatile_reg;
1196 map->precious_reg = config->precious_reg;
1197 map->cache_type = config->cache_type;
1198
1199 regmap_debugfs_init(map, config->name);
1200
1201 map->cache_bypass = false;
1202 map->cache_only = false;
1203
1204 return regcache_init(map, config);
1205 }
1206 EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1207
1208 /**
1209 * regmap_exit() - Free a previously allocated register map
1210 *
1211 * @map: Register map to operate on.
1212 */
regmap_exit(struct regmap * map)1213 void regmap_exit(struct regmap *map)
1214 {
1215 struct regmap_async *async;
1216
1217 regcache_exit(map);
1218 regmap_debugfs_exit(map);
1219 regmap_range_exit(map);
1220 if (map->bus && map->bus->free_context)
1221 map->bus->free_context(map->bus_context);
1222 kfree(map->work_buf);
1223 while (!list_empty(&map->async_free)) {
1224 async = list_first_entry_or_null(&map->async_free,
1225 struct regmap_async,
1226 list);
1227 list_del(&async->list);
1228 kfree(async->work_buf);
1229 kfree(async);
1230 }
1231 kfree(map);
1232 }
1233 EXPORT_SYMBOL_GPL(regmap_exit);
1234
dev_get_regmap_match(struct device * dev,void * res,void * data)1235 static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1236 {
1237 struct regmap **r = res;
1238 if (!r || !*r) {
1239 WARN_ON(!r || !*r);
1240 return 0;
1241 }
1242
1243 /* If the user didn't specify a name match any */
1244 if (data)
1245 return (*r)->name == data;
1246 else
1247 return 1;
1248 }
1249
1250 /**
1251 * dev_get_regmap() - Obtain the regmap (if any) for a device
1252 *
1253 * @dev: Device to retrieve the map for
1254 * @name: Optional name for the register map, usually NULL.
1255 *
1256 * Returns the regmap for the device if one is present, or NULL. If
1257 * name is specified then it must match the name specified when
1258 * registering the device, if it is NULL then the first regmap found
1259 * will be used. Devices with multiple register maps are very rare,
1260 * generic code should normally not need to specify a name.
1261 */
dev_get_regmap(struct device * dev,const char * name)1262 struct regmap *dev_get_regmap(struct device *dev, const char *name)
1263 {
1264 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1265 dev_get_regmap_match, (void *)name);
1266
1267 if (!r)
1268 return NULL;
1269 return *r;
1270 }
1271 EXPORT_SYMBOL_GPL(dev_get_regmap);
1272
1273 /**
1274 * regmap_get_device() - Obtain the device from a regmap
1275 *
1276 * @map: Register map to operate on.
1277 *
1278 * Returns the underlying device that the regmap has been created for.
1279 */
regmap_get_device(struct regmap * map)1280 struct device *regmap_get_device(struct regmap *map)
1281 {
1282 return map->dev;
1283 }
1284 EXPORT_SYMBOL_GPL(regmap_get_device);
1285
_regmap_select_page(struct regmap * map,unsigned int * reg,struct regmap_range_node * range,unsigned int val_num)1286 static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1287 struct regmap_range_node *range,
1288 unsigned int val_num)
1289 {
1290 void *orig_work_buf;
1291 unsigned int win_offset;
1292 unsigned int win_page;
1293 bool page_chg;
1294 int ret;
1295
1296 win_offset = (*reg - range->range_min) % range->window_len;
1297 win_page = (*reg - range->range_min) / range->window_len;
1298
1299 if (val_num > 1) {
1300 /* Bulk write shouldn't cross range boundary */
1301 if (*reg + val_num - 1 > range->range_max)
1302 return -EINVAL;
1303
1304 /* ... or single page boundary */
1305 if (val_num > range->window_len - win_offset)
1306 return -EINVAL;
1307 }
1308
1309 /* It is possible to have selector register inside data window.
1310 In that case, selector register is located on every page and
1311 it needs no page switching, when accessed alone. */
1312 if (val_num > 1 ||
1313 range->window_start + win_offset != range->selector_reg) {
1314 /* Use separate work_buf during page switching */
1315 orig_work_buf = map->work_buf;
1316 map->work_buf = map->selector_work_buf;
1317
1318 ret = _regmap_update_bits(map, range->selector_reg,
1319 range->selector_mask,
1320 win_page << range->selector_shift,
1321 &page_chg, false);
1322
1323 map->work_buf = orig_work_buf;
1324
1325 if (ret != 0)
1326 return ret;
1327 }
1328
1329 *reg = range->window_start + win_offset;
1330
1331 return 0;
1332 }
1333
regmap_set_work_buf_flag_mask(struct regmap * map,int max_bytes,unsigned long mask)1334 static void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes,
1335 unsigned long mask)
1336 {
1337 u8 *buf;
1338 int i;
1339
1340 if (!mask || !map->work_buf)
1341 return;
1342
1343 buf = map->work_buf;
1344
1345 for (i = 0; i < max_bytes; i++)
1346 buf[i] |= (mask >> (8 * i)) & 0xff;
1347 }
1348
_regmap_raw_write(struct regmap * map,unsigned int reg,const void * val,size_t val_len)1349 int _regmap_raw_write(struct regmap *map, unsigned int reg,
1350 const void *val, size_t val_len)
1351 {
1352 struct regmap_range_node *range;
1353 unsigned long flags;
1354 void *work_val = map->work_buf + map->format.reg_bytes +
1355 map->format.pad_bytes;
1356 void *buf;
1357 int ret = -ENOTSUPP;
1358 size_t len;
1359 int i;
1360
1361 WARN_ON(!map->bus);
1362
1363 /* Check for unwritable registers before we start */
1364 if (map->writeable_reg)
1365 for (i = 0; i < val_len / map->format.val_bytes; i++)
1366 if (!map->writeable_reg(map->dev,
1367 reg + regmap_get_offset(map, i)))
1368 return -EINVAL;
1369
1370 if (!map->cache_bypass && map->format.parse_val) {
1371 unsigned int ival;
1372 int val_bytes = map->format.val_bytes;
1373 for (i = 0; i < val_len / val_bytes; i++) {
1374 ival = map->format.parse_val(val + (i * val_bytes));
1375 ret = regcache_write(map,
1376 reg + regmap_get_offset(map, i),
1377 ival);
1378 if (ret) {
1379 dev_err(map->dev,
1380 "Error in caching of register: %x ret: %d\n",
1381 reg + i, ret);
1382 return ret;
1383 }
1384 }
1385 if (map->cache_only) {
1386 map->cache_dirty = true;
1387 return 0;
1388 }
1389 }
1390
1391 range = _regmap_range_lookup(map, reg);
1392 if (range) {
1393 int val_num = val_len / map->format.val_bytes;
1394 int win_offset = (reg - range->range_min) % range->window_len;
1395 int win_residue = range->window_len - win_offset;
1396
1397 /* If the write goes beyond the end of the window split it */
1398 while (val_num > win_residue) {
1399 dev_dbg(map->dev, "Writing window %d/%zu\n",
1400 win_residue, val_len / map->format.val_bytes);
1401 ret = _regmap_raw_write(map, reg, val, win_residue *
1402 map->format.val_bytes);
1403 if (ret != 0)
1404 return ret;
1405
1406 reg += win_residue;
1407 val_num -= win_residue;
1408 val += win_residue * map->format.val_bytes;
1409 val_len -= win_residue * map->format.val_bytes;
1410
1411 win_offset = (reg - range->range_min) %
1412 range->window_len;
1413 win_residue = range->window_len - win_offset;
1414 }
1415
1416 ret = _regmap_select_page(map, ®, range, val_num);
1417 if (ret != 0)
1418 return ret;
1419 }
1420
1421 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1422 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
1423 map->write_flag_mask);
1424
1425 /*
1426 * Essentially all I/O mechanisms will be faster with a single
1427 * buffer to write. Since register syncs often generate raw
1428 * writes of single registers optimise that case.
1429 */
1430 if (val != work_val && val_len == map->format.val_bytes) {
1431 memcpy(work_val, val, map->format.val_bytes);
1432 val = work_val;
1433 }
1434
1435 if (map->async && map->bus->async_write) {
1436 struct regmap_async *async;
1437
1438 trace_regmap_async_write_start(map, reg, val_len);
1439
1440 spin_lock_irqsave(&map->async_lock, flags);
1441 async = list_first_entry_or_null(&map->async_free,
1442 struct regmap_async,
1443 list);
1444 if (async)
1445 list_del(&async->list);
1446 spin_unlock_irqrestore(&map->async_lock, flags);
1447
1448 if (!async) {
1449 async = map->bus->async_alloc();
1450 if (!async)
1451 return -ENOMEM;
1452
1453 async->work_buf = kzalloc(map->format.buf_size,
1454 GFP_KERNEL | GFP_DMA);
1455 if (!async->work_buf) {
1456 kfree(async);
1457 return -ENOMEM;
1458 }
1459 }
1460
1461 async->map = map;
1462
1463 /* If the caller supplied the value we can use it safely. */
1464 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1465 map->format.reg_bytes + map->format.val_bytes);
1466
1467 spin_lock_irqsave(&map->async_lock, flags);
1468 list_add_tail(&async->list, &map->async_list);
1469 spin_unlock_irqrestore(&map->async_lock, flags);
1470
1471 if (val != work_val)
1472 ret = map->bus->async_write(map->bus_context,
1473 async->work_buf,
1474 map->format.reg_bytes +
1475 map->format.pad_bytes,
1476 val, val_len, async);
1477 else
1478 ret = map->bus->async_write(map->bus_context,
1479 async->work_buf,
1480 map->format.reg_bytes +
1481 map->format.pad_bytes +
1482 val_len, NULL, 0, async);
1483
1484 if (ret != 0) {
1485 dev_err(map->dev, "Failed to schedule write: %d\n",
1486 ret);
1487
1488 spin_lock_irqsave(&map->async_lock, flags);
1489 list_move(&async->list, &map->async_free);
1490 spin_unlock_irqrestore(&map->async_lock, flags);
1491 }
1492
1493 return ret;
1494 }
1495
1496 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
1497
1498 /* If we're doing a single register write we can probably just
1499 * send the work_buf directly, otherwise try to do a gather
1500 * write.
1501 */
1502 if (val == work_val)
1503 ret = map->bus->write(map->bus_context, map->work_buf,
1504 map->format.reg_bytes +
1505 map->format.pad_bytes +
1506 val_len);
1507 else if (map->bus->gather_write)
1508 ret = map->bus->gather_write(map->bus_context, map->work_buf,
1509 map->format.reg_bytes +
1510 map->format.pad_bytes,
1511 val, val_len);
1512 else
1513 ret = -ENOTSUPP;
1514
1515 /* If that didn't work fall back on linearising by hand. */
1516 if (ret == -ENOTSUPP) {
1517 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1518 buf = kzalloc(len, GFP_KERNEL);
1519 if (!buf)
1520 return -ENOMEM;
1521
1522 memcpy(buf, map->work_buf, map->format.reg_bytes);
1523 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1524 val, val_len);
1525 ret = map->bus->write(map->bus_context, buf, len);
1526
1527 kfree(buf);
1528 } else if (ret != 0 && !map->cache_bypass && map->format.parse_val) {
1529 /* regcache_drop_region() takes lock that we already have,
1530 * thus call map->cache_ops->drop() directly
1531 */
1532 if (map->cache_ops && map->cache_ops->drop)
1533 map->cache_ops->drop(map, reg, reg + 1);
1534 }
1535
1536 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
1537
1538 return ret;
1539 }
1540
1541 /**
1542 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1543 *
1544 * @map: Map to check.
1545 */
regmap_can_raw_write(struct regmap * map)1546 bool regmap_can_raw_write(struct regmap *map)
1547 {
1548 return map->bus && map->bus->write && map->format.format_val &&
1549 map->format.format_reg;
1550 }
1551 EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1552
1553 /**
1554 * regmap_get_raw_read_max - Get the maximum size we can read
1555 *
1556 * @map: Map to check.
1557 */
regmap_get_raw_read_max(struct regmap * map)1558 size_t regmap_get_raw_read_max(struct regmap *map)
1559 {
1560 return map->max_raw_read;
1561 }
1562 EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1563
1564 /**
1565 * regmap_get_raw_write_max - Get the maximum size we can read
1566 *
1567 * @map: Map to check.
1568 */
regmap_get_raw_write_max(struct regmap * map)1569 size_t regmap_get_raw_write_max(struct regmap *map)
1570 {
1571 return map->max_raw_write;
1572 }
1573 EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1574
_regmap_bus_formatted_write(void * context,unsigned int reg,unsigned int val)1575 static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1576 unsigned int val)
1577 {
1578 int ret;
1579 struct regmap_range_node *range;
1580 struct regmap *map = context;
1581
1582 WARN_ON(!map->bus || !map->format.format_write);
1583
1584 range = _regmap_range_lookup(map, reg);
1585 if (range) {
1586 ret = _regmap_select_page(map, ®, range, 1);
1587 if (ret != 0)
1588 return ret;
1589 }
1590
1591 map->format.format_write(map, reg, val);
1592
1593 trace_regmap_hw_write_start(map, reg, 1);
1594
1595 ret = map->bus->write(map->bus_context, map->work_buf,
1596 map->format.buf_size);
1597
1598 trace_regmap_hw_write_done(map, reg, 1);
1599
1600 return ret;
1601 }
1602
_regmap_bus_reg_write(void * context,unsigned int reg,unsigned int val)1603 static int _regmap_bus_reg_write(void *context, unsigned int reg,
1604 unsigned int val)
1605 {
1606 struct regmap *map = context;
1607
1608 return map->bus->reg_write(map->bus_context, reg, val);
1609 }
1610
_regmap_bus_raw_write(void * context,unsigned int reg,unsigned int val)1611 static int _regmap_bus_raw_write(void *context, unsigned int reg,
1612 unsigned int val)
1613 {
1614 struct regmap *map = context;
1615
1616 WARN_ON(!map->bus || !map->format.format_val);
1617
1618 map->format.format_val(map->work_buf + map->format.reg_bytes
1619 + map->format.pad_bytes, val, 0);
1620 return _regmap_raw_write(map, reg,
1621 map->work_buf +
1622 map->format.reg_bytes +
1623 map->format.pad_bytes,
1624 map->format.val_bytes);
1625 }
1626
_regmap_map_get_context(struct regmap * map)1627 static inline void *_regmap_map_get_context(struct regmap *map)
1628 {
1629 return (map->bus) ? map : map->bus_context;
1630 }
1631
_regmap_write(struct regmap * map,unsigned int reg,unsigned int val)1632 int _regmap_write(struct regmap *map, unsigned int reg,
1633 unsigned int val)
1634 {
1635 int ret;
1636 void *context = _regmap_map_get_context(map);
1637
1638 if (!regmap_writeable(map, reg))
1639 return -EIO;
1640
1641 if (!map->cache_bypass && !map->defer_caching) {
1642 ret = regcache_write(map, reg, val);
1643 if (ret != 0)
1644 return ret;
1645 if (map->cache_only) {
1646 map->cache_dirty = true;
1647 return 0;
1648 }
1649 }
1650
1651 #ifdef LOG_DEVICE
1652 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1653 dev_info(map->dev, "%x <= %x\n", reg, val);
1654 #endif
1655
1656 trace_regmap_reg_write(map, reg, val);
1657
1658 return map->reg_write(context, reg, val);
1659 }
1660
1661 /**
1662 * regmap_write() - Write a value to a single register
1663 *
1664 * @map: Register map to write to
1665 * @reg: Register to write to
1666 * @val: Value to be written
1667 *
1668 * A value of zero will be returned on success, a negative errno will
1669 * be returned in error cases.
1670 */
regmap_write(struct regmap * map,unsigned int reg,unsigned int val)1671 int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1672 {
1673 int ret;
1674
1675 if (!IS_ALIGNED(reg, map->reg_stride))
1676 return -EINVAL;
1677
1678 map->lock(map->lock_arg);
1679
1680 ret = _regmap_write(map, reg, val);
1681
1682 map->unlock(map->lock_arg);
1683
1684 return ret;
1685 }
1686 EXPORT_SYMBOL_GPL(regmap_write);
1687
1688 /**
1689 * regmap_write_async() - Write a value to a single register asynchronously
1690 *
1691 * @map: Register map to write to
1692 * @reg: Register to write to
1693 * @val: Value to be written
1694 *
1695 * A value of zero will be returned on success, a negative errno will
1696 * be returned in error cases.
1697 */
regmap_write_async(struct regmap * map,unsigned int reg,unsigned int val)1698 int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1699 {
1700 int ret;
1701
1702 if (!IS_ALIGNED(reg, map->reg_stride))
1703 return -EINVAL;
1704
1705 map->lock(map->lock_arg);
1706
1707 map->async = true;
1708
1709 ret = _regmap_write(map, reg, val);
1710
1711 map->async = false;
1712
1713 map->unlock(map->lock_arg);
1714
1715 return ret;
1716 }
1717 EXPORT_SYMBOL_GPL(regmap_write_async);
1718
1719 /**
1720 * regmap_raw_write() - Write raw values to one or more registers
1721 *
1722 * @map: Register map to write to
1723 * @reg: Initial register to write to
1724 * @val: Block of data to be written, laid out for direct transmission to the
1725 * device
1726 * @val_len: Length of data pointed to by val.
1727 *
1728 * This function is intended to be used for things like firmware
1729 * download where a large block of data needs to be transferred to the
1730 * device. No formatting will be done on the data provided.
1731 *
1732 * A value of zero will be returned on success, a negative errno will
1733 * be returned in error cases.
1734 */
regmap_raw_write(struct regmap * map,unsigned int reg,const void * val,size_t val_len)1735 int regmap_raw_write(struct regmap *map, unsigned int reg,
1736 const void *val, size_t val_len)
1737 {
1738 int ret;
1739
1740 if (!regmap_can_raw_write(map))
1741 return -EINVAL;
1742 if (val_len % map->format.val_bytes)
1743 return -EINVAL;
1744 if (map->max_raw_write && map->max_raw_write < val_len)
1745 return -E2BIG;
1746
1747 map->lock(map->lock_arg);
1748
1749 ret = _regmap_raw_write(map, reg, val, val_len);
1750
1751 map->unlock(map->lock_arg);
1752
1753 return ret;
1754 }
1755 EXPORT_SYMBOL_GPL(regmap_raw_write);
1756
1757 /**
1758 * regmap_field_update_bits_base() - Perform a read/modify/write cycle a
1759 * register field.
1760 *
1761 * @field: Register field to write to
1762 * @mask: Bitmask to change
1763 * @val: Value to be written
1764 * @change: Boolean indicating if a write was done
1765 * @async: Boolean indicating asynchronously
1766 * @force: Boolean indicating use force update
1767 *
1768 * Perform a read/modify/write cycle on the register field with change,
1769 * async, force option.
1770 *
1771 * A value of zero will be returned on success, a negative errno will
1772 * be returned in error cases.
1773 */
regmap_field_update_bits_base(struct regmap_field * field,unsigned int mask,unsigned int val,bool * change,bool async,bool force)1774 int regmap_field_update_bits_base(struct regmap_field *field,
1775 unsigned int mask, unsigned int val,
1776 bool *change, bool async, bool force)
1777 {
1778 mask = (mask << field->shift) & field->mask;
1779
1780 return regmap_update_bits_base(field->regmap, field->reg,
1781 mask, val << field->shift,
1782 change, async, force);
1783 }
1784 EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
1785
1786 /**
1787 * regmap_fields_update_bits_base() - Perform a read/modify/write cycle a
1788 * register field with port ID
1789 *
1790 * @field: Register field to write to
1791 * @id: port ID
1792 * @mask: Bitmask to change
1793 * @val: Value to be written
1794 * @change: Boolean indicating if a write was done
1795 * @async: Boolean indicating asynchronously
1796 * @force: Boolean indicating use force update
1797 *
1798 * A value of zero will be returned on success, a negative errno will
1799 * be returned in error cases.
1800 */
regmap_fields_update_bits_base(struct regmap_field * field,unsigned int id,unsigned int mask,unsigned int val,bool * change,bool async,bool force)1801 int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
1802 unsigned int mask, unsigned int val,
1803 bool *change, bool async, bool force)
1804 {
1805 if (id >= field->id_size)
1806 return -EINVAL;
1807
1808 mask = (mask << field->shift) & field->mask;
1809
1810 return regmap_update_bits_base(field->regmap,
1811 field->reg + (field->id_offset * id),
1812 mask, val << field->shift,
1813 change, async, force);
1814 }
1815 EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base);
1816
1817 /**
1818 * regmap_bulk_write() - Write multiple registers to the device
1819 *
1820 * @map: Register map to write to
1821 * @reg: First register to be write from
1822 * @val: Block of data to be written, in native register size for device
1823 * @val_count: Number of registers to write
1824 *
1825 * This function is intended to be used for writing a large block of
1826 * data to the device either in single transfer or multiple transfer.
1827 *
1828 * A value of zero will be returned on success, a negative errno will
1829 * be returned in error cases.
1830 */
regmap_bulk_write(struct regmap * map,unsigned int reg,const void * val,size_t val_count)1831 int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1832 size_t val_count)
1833 {
1834 int ret = 0, i;
1835 size_t val_bytes = map->format.val_bytes;
1836 size_t total_size = val_bytes * val_count;
1837
1838 if (!IS_ALIGNED(reg, map->reg_stride))
1839 return -EINVAL;
1840
1841 /*
1842 * Some devices don't support bulk write, for
1843 * them we have a series of single write operations in the first two if
1844 * blocks.
1845 *
1846 * The first if block is used for memory mapped io. It does not allow
1847 * val_bytes of 3 for example.
1848 * The second one is for busses that do not provide raw I/O.
1849 * The third one is used for busses which do not have these limitations
1850 * and can write arbitrary value lengths.
1851 */
1852 if (!map->bus) {
1853 map->lock(map->lock_arg);
1854 for (i = 0; i < val_count; i++) {
1855 unsigned int ival;
1856
1857 switch (val_bytes) {
1858 case 1:
1859 ival = *(u8 *)(val + (i * val_bytes));
1860 break;
1861 case 2:
1862 ival = *(u16 *)(val + (i * val_bytes));
1863 break;
1864 case 4:
1865 ival = *(u32 *)(val + (i * val_bytes));
1866 break;
1867 #ifdef CONFIG_64BIT
1868 case 8:
1869 ival = *(u64 *)(val + (i * val_bytes));
1870 break;
1871 #endif
1872 default:
1873 ret = -EINVAL;
1874 goto out;
1875 }
1876
1877 ret = _regmap_write(map,
1878 reg + regmap_get_offset(map, i),
1879 ival);
1880 if (ret != 0)
1881 goto out;
1882 }
1883 out:
1884 map->unlock(map->lock_arg);
1885 } else if (map->bus && !map->format.parse_inplace) {
1886 const u8 *u8 = val;
1887 const u16 *u16 = val;
1888 const u32 *u32 = val;
1889 unsigned int ival;
1890
1891 for (i = 0; i < val_count; i++) {
1892 switch (map->format.val_bytes) {
1893 case 4:
1894 ival = u32[i];
1895 break;
1896 case 2:
1897 ival = u16[i];
1898 break;
1899 case 1:
1900 ival = u8[i];
1901 break;
1902 default:
1903 return -EINVAL;
1904 }
1905
1906 ret = regmap_write(map, reg + (i * map->reg_stride),
1907 ival);
1908 if (ret)
1909 return ret;
1910 }
1911 } else if (map->use_single_write ||
1912 (map->max_raw_write && map->max_raw_write < total_size)) {
1913 int chunk_stride = map->reg_stride;
1914 size_t chunk_size = val_bytes;
1915 size_t chunk_count = val_count;
1916
1917 if (!map->use_single_write) {
1918 chunk_size = map->max_raw_write;
1919 if (chunk_size % val_bytes)
1920 chunk_size -= chunk_size % val_bytes;
1921 chunk_count = total_size / chunk_size;
1922 chunk_stride *= chunk_size / val_bytes;
1923 }
1924
1925 map->lock(map->lock_arg);
1926 /* Write as many bytes as possible with chunk_size */
1927 for (i = 0; i < chunk_count; i++) {
1928 ret = _regmap_raw_write(map,
1929 reg + (i * chunk_stride),
1930 val + (i * chunk_size),
1931 chunk_size);
1932 if (ret)
1933 break;
1934 }
1935
1936 /* Write remaining bytes */
1937 if (!ret && chunk_size * i < total_size) {
1938 ret = _regmap_raw_write(map, reg + (i * chunk_stride),
1939 val + (i * chunk_size),
1940 total_size - i * chunk_size);
1941 }
1942 map->unlock(map->lock_arg);
1943 } else {
1944 void *wval;
1945
1946 if (!val_count)
1947 return -EINVAL;
1948
1949 wval = kmemdup(val, val_count * val_bytes, map->alloc_flags);
1950 if (!wval) {
1951 dev_err(map->dev, "Error in memory allocation\n");
1952 return -ENOMEM;
1953 }
1954 for (i = 0; i < val_count * val_bytes; i += val_bytes)
1955 map->format.parse_inplace(wval + i);
1956
1957 map->lock(map->lock_arg);
1958 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);
1959 map->unlock(map->lock_arg);
1960
1961 kfree(wval);
1962 }
1963 return ret;
1964 }
1965 EXPORT_SYMBOL_GPL(regmap_bulk_write);
1966
1967 /*
1968 * _regmap_raw_multi_reg_write()
1969 *
1970 * the (register,newvalue) pairs in regs have not been formatted, but
1971 * they are all in the same page and have been changed to being page
1972 * relative. The page register has been written if that was necessary.
1973 */
_regmap_raw_multi_reg_write(struct regmap * map,const struct reg_sequence * regs,size_t num_regs)1974 static int _regmap_raw_multi_reg_write(struct regmap *map,
1975 const struct reg_sequence *regs,
1976 size_t num_regs)
1977 {
1978 int ret;
1979 void *buf;
1980 int i;
1981 u8 *u8;
1982 size_t val_bytes = map->format.val_bytes;
1983 size_t reg_bytes = map->format.reg_bytes;
1984 size_t pad_bytes = map->format.pad_bytes;
1985 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
1986 size_t len = pair_size * num_regs;
1987
1988 if (!len)
1989 return -EINVAL;
1990
1991 buf = kzalloc(len, GFP_KERNEL);
1992 if (!buf)
1993 return -ENOMEM;
1994
1995 /* We have to linearise by hand. */
1996
1997 u8 = buf;
1998
1999 for (i = 0; i < num_regs; i++) {
2000 unsigned int reg = regs[i].reg;
2001 unsigned int val = regs[i].def;
2002 trace_regmap_hw_write_start(map, reg, 1);
2003 map->format.format_reg(u8, reg, map->reg_shift);
2004 u8 += reg_bytes + pad_bytes;
2005 map->format.format_val(u8, val, 0);
2006 u8 += val_bytes;
2007 }
2008 u8 = buf;
2009 *u8 |= map->write_flag_mask;
2010
2011 ret = map->bus->write(map->bus_context, buf, len);
2012
2013 kfree(buf);
2014
2015 for (i = 0; i < num_regs; i++) {
2016 int reg = regs[i].reg;
2017 trace_regmap_hw_write_done(map, reg, 1);
2018 }
2019 return ret;
2020 }
2021
_regmap_register_page(struct regmap * map,unsigned int reg,struct regmap_range_node * range)2022 static unsigned int _regmap_register_page(struct regmap *map,
2023 unsigned int reg,
2024 struct regmap_range_node *range)
2025 {
2026 unsigned int win_page = (reg - range->range_min) / range->window_len;
2027
2028 return win_page;
2029 }
2030
_regmap_range_multi_paged_reg_write(struct regmap * map,struct reg_sequence * regs,size_t num_regs)2031 static int _regmap_range_multi_paged_reg_write(struct regmap *map,
2032 struct reg_sequence *regs,
2033 size_t num_regs)
2034 {
2035 int ret;
2036 int i, n;
2037 struct reg_sequence *base;
2038 unsigned int this_page = 0;
2039 unsigned int page_change = 0;
2040 /*
2041 * the set of registers are not neccessarily in order, but
2042 * since the order of write must be preserved this algorithm
2043 * chops the set each time the page changes. This also applies
2044 * if there is a delay required at any point in the sequence.
2045 */
2046 base = regs;
2047 for (i = 0, n = 0; i < num_regs; i++, n++) {
2048 unsigned int reg = regs[i].reg;
2049 struct regmap_range_node *range;
2050
2051 range = _regmap_range_lookup(map, reg);
2052 if (range) {
2053 unsigned int win_page = _regmap_register_page(map, reg,
2054 range);
2055
2056 if (i == 0)
2057 this_page = win_page;
2058 if (win_page != this_page) {
2059 this_page = win_page;
2060 page_change = 1;
2061 }
2062 }
2063
2064 /* If we have both a page change and a delay make sure to
2065 * write the regs and apply the delay before we change the
2066 * page.
2067 */
2068
2069 if (page_change || regs[i].delay_us) {
2070
2071 /* For situations where the first write requires
2072 * a delay we need to make sure we don't call
2073 * raw_multi_reg_write with n=0
2074 * This can't occur with page breaks as we
2075 * never write on the first iteration
2076 */
2077 if (regs[i].delay_us && i == 0)
2078 n = 1;
2079
2080 ret = _regmap_raw_multi_reg_write(map, base, n);
2081 if (ret != 0)
2082 return ret;
2083
2084 if (regs[i].delay_us)
2085 udelay(regs[i].delay_us);
2086
2087 base += n;
2088 n = 0;
2089
2090 if (page_change) {
2091 ret = _regmap_select_page(map,
2092 &base[n].reg,
2093 range, 1);
2094 if (ret != 0)
2095 return ret;
2096
2097 page_change = 0;
2098 }
2099
2100 }
2101
2102 }
2103 if (n > 0)
2104 return _regmap_raw_multi_reg_write(map, base, n);
2105 return 0;
2106 }
2107
_regmap_multi_reg_write(struct regmap * map,const struct reg_sequence * regs,size_t num_regs)2108 static int _regmap_multi_reg_write(struct regmap *map,
2109 const struct reg_sequence *regs,
2110 size_t num_regs)
2111 {
2112 int i;
2113 int ret;
2114
2115 if (!map->can_multi_write) {
2116 for (i = 0; i < num_regs; i++) {
2117 ret = _regmap_write(map, regs[i].reg, regs[i].def);
2118 if (ret != 0)
2119 return ret;
2120
2121 if (regs[i].delay_us)
2122 udelay(regs[i].delay_us);
2123 }
2124 return 0;
2125 }
2126
2127 if (!map->format.parse_inplace)
2128 return -EINVAL;
2129
2130 if (map->writeable_reg)
2131 for (i = 0; i < num_regs; i++) {
2132 int reg = regs[i].reg;
2133 if (!map->writeable_reg(map->dev, reg))
2134 return -EINVAL;
2135 if (!IS_ALIGNED(reg, map->reg_stride))
2136 return -EINVAL;
2137 }
2138
2139 if (!map->cache_bypass) {
2140 for (i = 0; i < num_regs; i++) {
2141 unsigned int val = regs[i].def;
2142 unsigned int reg = regs[i].reg;
2143 ret = regcache_write(map, reg, val);
2144 if (ret) {
2145 dev_err(map->dev,
2146 "Error in caching of register: %x ret: %d\n",
2147 reg, ret);
2148 return ret;
2149 }
2150 }
2151 if (map->cache_only) {
2152 map->cache_dirty = true;
2153 return 0;
2154 }
2155 }
2156
2157 WARN_ON(!map->bus);
2158
2159 for (i = 0; i < num_regs; i++) {
2160 unsigned int reg = regs[i].reg;
2161 struct regmap_range_node *range;
2162
2163 /* Coalesce all the writes between a page break or a delay
2164 * in a sequence
2165 */
2166 range = _regmap_range_lookup(map, reg);
2167 if (range || regs[i].delay_us) {
2168 size_t len = sizeof(struct reg_sequence)*num_regs;
2169 struct reg_sequence *base = kmemdup(regs, len,
2170 GFP_KERNEL);
2171 if (!base)
2172 return -ENOMEM;
2173 ret = _regmap_range_multi_paged_reg_write(map, base,
2174 num_regs);
2175 kfree(base);
2176
2177 return ret;
2178 }
2179 }
2180 return _regmap_raw_multi_reg_write(map, regs, num_regs);
2181 }
2182
2183 /**
2184 * regmap_multi_reg_write() - Write multiple registers to the device
2185 *
2186 * @map: Register map to write to
2187 * @regs: Array of structures containing register,value to be written
2188 * @num_regs: Number of registers to write
2189 *
2190 * Write multiple registers to the device where the set of register, value
2191 * pairs are supplied in any order, possibly not all in a single range.
2192 *
2193 * The 'normal' block write mode will send ultimately send data on the
2194 * target bus as R,V1,V2,V3,..,Vn where successively higher registers are
2195 * addressed. However, this alternative block multi write mode will send
2196 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2197 * must of course support the mode.
2198 *
2199 * A value of zero will be returned on success, a negative errno will be
2200 * returned in error cases.
2201 */
regmap_multi_reg_write(struct regmap * map,const struct reg_sequence * regs,int num_regs)2202 int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
2203 int num_regs)
2204 {
2205 int ret;
2206
2207 map->lock(map->lock_arg);
2208
2209 ret = _regmap_multi_reg_write(map, regs, num_regs);
2210
2211 map->unlock(map->lock_arg);
2212
2213 return ret;
2214 }
2215 EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2216
2217 /**
2218 * regmap_multi_reg_write_bypassed() - Write multiple registers to the
2219 * device but not the cache
2220 *
2221 * @map: Register map to write to
2222 * @regs: Array of structures containing register,value to be written
2223 * @num_regs: Number of registers to write
2224 *
2225 * Write multiple registers to the device but not the cache where the set
2226 * of register are supplied in any order.
2227 *
2228 * This function is intended to be used for writing a large block of data
2229 * atomically to the device in single transfer for those I2C client devices
2230 * that implement this alternative block write mode.
2231 *
2232 * A value of zero will be returned on success, a negative errno will
2233 * be returned in error cases.
2234 */
regmap_multi_reg_write_bypassed(struct regmap * map,const struct reg_sequence * regs,int num_regs)2235 int regmap_multi_reg_write_bypassed(struct regmap *map,
2236 const struct reg_sequence *regs,
2237 int num_regs)
2238 {
2239 int ret;
2240 bool bypass;
2241
2242 map->lock(map->lock_arg);
2243
2244 bypass = map->cache_bypass;
2245 map->cache_bypass = true;
2246
2247 ret = _regmap_multi_reg_write(map, regs, num_regs);
2248
2249 map->cache_bypass = bypass;
2250
2251 map->unlock(map->lock_arg);
2252
2253 return ret;
2254 }
2255 EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
2256
2257 /**
2258 * regmap_raw_write_async() - Write raw values to one or more registers
2259 * asynchronously
2260 *
2261 * @map: Register map to write to
2262 * @reg: Initial register to write to
2263 * @val: Block of data to be written, laid out for direct transmission to the
2264 * device. Must be valid until regmap_async_complete() is called.
2265 * @val_len: Length of data pointed to by val.
2266 *
2267 * This function is intended to be used for things like firmware
2268 * download where a large block of data needs to be transferred to the
2269 * device. No formatting will be done on the data provided.
2270 *
2271 * If supported by the underlying bus the write will be scheduled
2272 * asynchronously, helping maximise I/O speed on higher speed buses
2273 * like SPI. regmap_async_complete() can be called to ensure that all
2274 * asynchrnous writes have been completed.
2275 *
2276 * A value of zero will be returned on success, a negative errno will
2277 * be returned in error cases.
2278 */
regmap_raw_write_async(struct regmap * map,unsigned int reg,const void * val,size_t val_len)2279 int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2280 const void *val, size_t val_len)
2281 {
2282 int ret;
2283
2284 if (val_len % map->format.val_bytes)
2285 return -EINVAL;
2286 if (!IS_ALIGNED(reg, map->reg_stride))
2287 return -EINVAL;
2288
2289 map->lock(map->lock_arg);
2290
2291 map->async = true;
2292
2293 ret = _regmap_raw_write(map, reg, val, val_len);
2294
2295 map->async = false;
2296
2297 map->unlock(map->lock_arg);
2298
2299 return ret;
2300 }
2301 EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2302
_regmap_raw_read(struct regmap * map,unsigned int reg,void * val,unsigned int val_len)2303 static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2304 unsigned int val_len)
2305 {
2306 struct regmap_range_node *range;
2307 int ret;
2308
2309 WARN_ON(!map->bus);
2310
2311 if (!map->bus || !map->bus->read)
2312 return -EINVAL;
2313
2314 range = _regmap_range_lookup(map, reg);
2315 if (range) {
2316 ret = _regmap_select_page(map, ®, range,
2317 val_len / map->format.val_bytes);
2318 if (ret != 0)
2319 return ret;
2320 }
2321
2322 map->format.format_reg(map->work_buf, reg, map->reg_shift);
2323 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
2324 map->read_flag_mask);
2325 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
2326
2327 ret = map->bus->read(map->bus_context, map->work_buf,
2328 map->format.reg_bytes + map->format.pad_bytes,
2329 val, val_len);
2330
2331 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
2332
2333 return ret;
2334 }
2335
_regmap_bus_reg_read(void * context,unsigned int reg,unsigned int * val)2336 static int _regmap_bus_reg_read(void *context, unsigned int reg,
2337 unsigned int *val)
2338 {
2339 struct regmap *map = context;
2340
2341 return map->bus->reg_read(map->bus_context, reg, val);
2342 }
2343
_regmap_bus_read(void * context,unsigned int reg,unsigned int * val)2344 static int _regmap_bus_read(void *context, unsigned int reg,
2345 unsigned int *val)
2346 {
2347 int ret;
2348 struct regmap *map = context;
2349
2350 if (!map->format.parse_val)
2351 return -EINVAL;
2352
2353 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
2354 if (ret == 0)
2355 *val = map->format.parse_val(map->work_buf);
2356
2357 return ret;
2358 }
2359
_regmap_read(struct regmap * map,unsigned int reg,unsigned int * val)2360 static int _regmap_read(struct regmap *map, unsigned int reg,
2361 unsigned int *val)
2362 {
2363 int ret;
2364 void *context = _regmap_map_get_context(map);
2365
2366 if (!map->cache_bypass) {
2367 ret = regcache_read(map, reg, val);
2368 if (ret == 0)
2369 return 0;
2370 }
2371
2372 if (map->cache_only)
2373 return -EBUSY;
2374
2375 if (!regmap_readable(map, reg))
2376 return -EIO;
2377
2378 ret = map->reg_read(context, reg, val);
2379 if (ret == 0) {
2380 #ifdef LOG_DEVICE
2381 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
2382 dev_info(map->dev, "%x => %x\n", reg, *val);
2383 #endif
2384
2385 trace_regmap_reg_read(map, reg, *val);
2386
2387 if (!map->cache_bypass)
2388 regcache_write(map, reg, *val);
2389 }
2390
2391 return ret;
2392 }
2393
2394 /**
2395 * regmap_read() - Read a value from a single register
2396 *
2397 * @map: Register map to read from
2398 * @reg: Register to be read from
2399 * @val: Pointer to store read value
2400 *
2401 * A value of zero will be returned on success, a negative errno will
2402 * be returned in error cases.
2403 */
regmap_read(struct regmap * map,unsigned int reg,unsigned int * val)2404 int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2405 {
2406 int ret;
2407
2408 if (!IS_ALIGNED(reg, map->reg_stride))
2409 return -EINVAL;
2410
2411 map->lock(map->lock_arg);
2412
2413 ret = _regmap_read(map, reg, val);
2414
2415 map->unlock(map->lock_arg);
2416
2417 return ret;
2418 }
2419 EXPORT_SYMBOL_GPL(regmap_read);
2420
2421 /**
2422 * regmap_raw_read() - Read raw data from the device
2423 *
2424 * @map: Register map to read from
2425 * @reg: First register to be read from
2426 * @val: Pointer to store read value
2427 * @val_len: Size of data to read
2428 *
2429 * A value of zero will be returned on success, a negative errno will
2430 * be returned in error cases.
2431 */
regmap_raw_read(struct regmap * map,unsigned int reg,void * val,size_t val_len)2432 int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2433 size_t val_len)
2434 {
2435 size_t val_bytes = map->format.val_bytes;
2436 size_t val_count = val_len / val_bytes;
2437 unsigned int v;
2438 int ret, i;
2439
2440 if (!map->bus)
2441 return -EINVAL;
2442 if (val_len % map->format.val_bytes)
2443 return -EINVAL;
2444 if (!IS_ALIGNED(reg, map->reg_stride))
2445 return -EINVAL;
2446 if (val_count == 0)
2447 return -EINVAL;
2448
2449 map->lock(map->lock_arg);
2450
2451 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2452 map->cache_type == REGCACHE_NONE) {
2453 if (!map->bus->read) {
2454 ret = -ENOTSUPP;
2455 goto out;
2456 }
2457 if (map->max_raw_read && map->max_raw_read < val_len) {
2458 ret = -E2BIG;
2459 goto out;
2460 }
2461
2462 /* Physical block read if there's no cache involved */
2463 ret = _regmap_raw_read(map, reg, val, val_len);
2464
2465 } else {
2466 /* Otherwise go word by word for the cache; should be low
2467 * cost as we expect to hit the cache.
2468 */
2469 for (i = 0; i < val_count; i++) {
2470 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
2471 &v);
2472 if (ret != 0)
2473 goto out;
2474
2475 map->format.format_val(val + (i * val_bytes), v, 0);
2476 }
2477 }
2478
2479 out:
2480 map->unlock(map->lock_arg);
2481
2482 return ret;
2483 }
2484 EXPORT_SYMBOL_GPL(regmap_raw_read);
2485
2486 /**
2487 * regmap_field_read() - Read a value to a single register field
2488 *
2489 * @field: Register field to read from
2490 * @val: Pointer to store read value
2491 *
2492 * A value of zero will be returned on success, a negative errno will
2493 * be returned in error cases.
2494 */
regmap_field_read(struct regmap_field * field,unsigned int * val)2495 int regmap_field_read(struct regmap_field *field, unsigned int *val)
2496 {
2497 int ret;
2498 unsigned int reg_val;
2499 ret = regmap_read(field->regmap, field->reg, ®_val);
2500 if (ret != 0)
2501 return ret;
2502
2503 reg_val &= field->mask;
2504 reg_val >>= field->shift;
2505 *val = reg_val;
2506
2507 return ret;
2508 }
2509 EXPORT_SYMBOL_GPL(regmap_field_read);
2510
2511 /**
2512 * regmap_fields_read() - Read a value to a single register field with port ID
2513 *
2514 * @field: Register field to read from
2515 * @id: port ID
2516 * @val: Pointer to store read value
2517 *
2518 * A value of zero will be returned on success, a negative errno will
2519 * be returned in error cases.
2520 */
regmap_fields_read(struct regmap_field * field,unsigned int id,unsigned int * val)2521 int regmap_fields_read(struct regmap_field *field, unsigned int id,
2522 unsigned int *val)
2523 {
2524 int ret;
2525 unsigned int reg_val;
2526
2527 if (id >= field->id_size)
2528 return -EINVAL;
2529
2530 ret = regmap_read(field->regmap,
2531 field->reg + (field->id_offset * id),
2532 ®_val);
2533 if (ret != 0)
2534 return ret;
2535
2536 reg_val &= field->mask;
2537 reg_val >>= field->shift;
2538 *val = reg_val;
2539
2540 return ret;
2541 }
2542 EXPORT_SYMBOL_GPL(regmap_fields_read);
2543
2544 /**
2545 * regmap_bulk_read() - Read multiple registers from the device
2546 *
2547 * @map: Register map to read from
2548 * @reg: First register to be read from
2549 * @val: Pointer to store read value, in native register size for device
2550 * @val_count: Number of registers to read
2551 *
2552 * A value of zero will be returned on success, a negative errno will
2553 * be returned in error cases.
2554 */
regmap_bulk_read(struct regmap * map,unsigned int reg,void * val,size_t val_count)2555 int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2556 size_t val_count)
2557 {
2558 int ret, i;
2559 size_t val_bytes = map->format.val_bytes;
2560 bool vol = regmap_volatile_range(map, reg, val_count);
2561
2562 if (!IS_ALIGNED(reg, map->reg_stride))
2563 return -EINVAL;
2564
2565 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
2566 /*
2567 * Some devices does not support bulk read, for
2568 * them we have a series of single read operations.
2569 */
2570 size_t total_size = val_bytes * val_count;
2571
2572 if (!map->use_single_read &&
2573 (!map->max_raw_read || map->max_raw_read > total_size)) {
2574 ret = regmap_raw_read(map, reg, val,
2575 val_bytes * val_count);
2576 if (ret != 0)
2577 return ret;
2578 } else {
2579 /*
2580 * Some devices do not support bulk read or do not
2581 * support large bulk reads, for them we have a series
2582 * of read operations.
2583 */
2584 int chunk_stride = map->reg_stride;
2585 size_t chunk_size = val_bytes;
2586 size_t chunk_count = val_count;
2587
2588 if (!map->use_single_read) {
2589 chunk_size = map->max_raw_read;
2590 if (chunk_size % val_bytes)
2591 chunk_size -= chunk_size % val_bytes;
2592 chunk_count = total_size / chunk_size;
2593 chunk_stride *= chunk_size / val_bytes;
2594 }
2595
2596 /* Read bytes that fit into a multiple of chunk_size */
2597 for (i = 0; i < chunk_count; i++) {
2598 ret = regmap_raw_read(map,
2599 reg + (i * chunk_stride),
2600 val + (i * chunk_size),
2601 chunk_size);
2602 if (ret != 0)
2603 return ret;
2604 }
2605
2606 /* Read remaining bytes */
2607 if (chunk_size * i < total_size) {
2608 ret = regmap_raw_read(map,
2609 reg + (i * chunk_stride),
2610 val + (i * chunk_size),
2611 total_size - i * chunk_size);
2612 if (ret != 0)
2613 return ret;
2614 }
2615 }
2616
2617 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2618 map->format.parse_inplace(val + i);
2619 } else {
2620 for (i = 0; i < val_count; i++) {
2621 unsigned int ival;
2622 ret = regmap_read(map, reg + regmap_get_offset(map, i),
2623 &ival);
2624 if (ret != 0)
2625 return ret;
2626
2627 if (map->format.format_val) {
2628 map->format.format_val(val + (i * val_bytes), ival, 0);
2629 } else {
2630 /* Devices providing read and write
2631 * operations can use the bulk I/O
2632 * functions if they define a val_bytes,
2633 * we assume that the values are native
2634 * endian.
2635 */
2636 #ifdef CONFIG_64BIT
2637 u64 *u64 = val;
2638 #endif
2639 u32 *u32 = val;
2640 u16 *u16 = val;
2641 u8 *u8 = val;
2642
2643 switch (map->format.val_bytes) {
2644 #ifdef CONFIG_64BIT
2645 case 8:
2646 u64[i] = ival;
2647 break;
2648 #endif
2649 case 4:
2650 u32[i] = ival;
2651 break;
2652 case 2:
2653 u16[i] = ival;
2654 break;
2655 case 1:
2656 u8[i] = ival;
2657 break;
2658 default:
2659 return -EINVAL;
2660 }
2661 }
2662 }
2663 }
2664
2665 return 0;
2666 }
2667 EXPORT_SYMBOL_GPL(regmap_bulk_read);
2668
_regmap_update_bits(struct regmap * map,unsigned int reg,unsigned int mask,unsigned int val,bool * change,bool force_write)2669 static int _regmap_update_bits(struct regmap *map, unsigned int reg,
2670 unsigned int mask, unsigned int val,
2671 bool *change, bool force_write)
2672 {
2673 int ret;
2674 unsigned int tmp, orig;
2675
2676 if (change)
2677 *change = false;
2678
2679 if (regmap_volatile(map, reg) && map->reg_update_bits) {
2680 ret = map->reg_update_bits(map->bus_context, reg, mask, val);
2681 if (ret == 0 && change)
2682 *change = true;
2683 } else {
2684 ret = _regmap_read(map, reg, &orig);
2685 if (ret != 0)
2686 return ret;
2687
2688 tmp = orig & ~mask;
2689 tmp |= val & mask;
2690
2691 if (force_write || (tmp != orig)) {
2692 ret = _regmap_write(map, reg, tmp);
2693 if (ret == 0 && change)
2694 *change = true;
2695 }
2696 }
2697
2698 return ret;
2699 }
2700
2701 /**
2702 * regmap_update_bits_base() - Perform a read/modify/write cycle on a register
2703 *
2704 * @map: Register map to update
2705 * @reg: Register to update
2706 * @mask: Bitmask to change
2707 * @val: New value for bitmask
2708 * @change: Boolean indicating if a write was done
2709 * @async: Boolean indicating asynchronously
2710 * @force: Boolean indicating use force update
2711 *
2712 * Perform a read/modify/write cycle on a register map with change, async, force
2713 * options.
2714 *
2715 * If async is true:
2716 *
2717 * With most buses the read must be done synchronously so this is most useful
2718 * for devices with a cache which do not need to interact with the hardware to
2719 * determine the current register value.
2720 *
2721 * Returns zero for success, a negative number on error.
2722 */
regmap_update_bits_base(struct regmap * map,unsigned int reg,unsigned int mask,unsigned int val,bool * change,bool async,bool force)2723 int regmap_update_bits_base(struct regmap *map, unsigned int reg,
2724 unsigned int mask, unsigned int val,
2725 bool *change, bool async, bool force)
2726 {
2727 int ret;
2728
2729 map->lock(map->lock_arg);
2730
2731 map->async = async;
2732
2733 ret = _regmap_update_bits(map, reg, mask, val, change, force);
2734
2735 map->async = false;
2736
2737 map->unlock(map->lock_arg);
2738
2739 return ret;
2740 }
2741 EXPORT_SYMBOL_GPL(regmap_update_bits_base);
2742
regmap_async_complete_cb(struct regmap_async * async,int ret)2743 void regmap_async_complete_cb(struct regmap_async *async, int ret)
2744 {
2745 struct regmap *map = async->map;
2746 bool wake;
2747
2748 trace_regmap_async_io_complete(map);
2749
2750 spin_lock(&map->async_lock);
2751 list_move(&async->list, &map->async_free);
2752 wake = list_empty(&map->async_list);
2753
2754 if (ret != 0)
2755 map->async_ret = ret;
2756
2757 spin_unlock(&map->async_lock);
2758
2759 if (wake)
2760 wake_up(&map->async_waitq);
2761 }
2762 EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
2763
regmap_async_is_done(struct regmap * map)2764 static int regmap_async_is_done(struct regmap *map)
2765 {
2766 unsigned long flags;
2767 int ret;
2768
2769 spin_lock_irqsave(&map->async_lock, flags);
2770 ret = list_empty(&map->async_list);
2771 spin_unlock_irqrestore(&map->async_lock, flags);
2772
2773 return ret;
2774 }
2775
2776 /**
2777 * regmap_async_complete - Ensure all asynchronous I/O has completed.
2778 *
2779 * @map: Map to operate on.
2780 *
2781 * Blocks until any pending asynchronous I/O has completed. Returns
2782 * an error code for any failed I/O operations.
2783 */
regmap_async_complete(struct regmap * map)2784 int regmap_async_complete(struct regmap *map)
2785 {
2786 unsigned long flags;
2787 int ret;
2788
2789 /* Nothing to do with no async support */
2790 if (!map->bus || !map->bus->async_write)
2791 return 0;
2792
2793 trace_regmap_async_complete_start(map);
2794
2795 wait_event(map->async_waitq, regmap_async_is_done(map));
2796
2797 spin_lock_irqsave(&map->async_lock, flags);
2798 ret = map->async_ret;
2799 map->async_ret = 0;
2800 spin_unlock_irqrestore(&map->async_lock, flags);
2801
2802 trace_regmap_async_complete_done(map);
2803
2804 return ret;
2805 }
2806 EXPORT_SYMBOL_GPL(regmap_async_complete);
2807
2808 /**
2809 * regmap_register_patch - Register and apply register updates to be applied
2810 * on device initialistion
2811 *
2812 * @map: Register map to apply updates to.
2813 * @regs: Values to update.
2814 * @num_regs: Number of entries in regs.
2815 *
2816 * Register a set of register updates to be applied to the device
2817 * whenever the device registers are synchronised with the cache and
2818 * apply them immediately. Typically this is used to apply
2819 * corrections to be applied to the device defaults on startup, such
2820 * as the updates some vendors provide to undocumented registers.
2821 *
2822 * The caller must ensure that this function cannot be called
2823 * concurrently with either itself or regcache_sync().
2824 */
regmap_register_patch(struct regmap * map,const struct reg_sequence * regs,int num_regs)2825 int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
2826 int num_regs)
2827 {
2828 struct reg_sequence *p;
2829 int ret;
2830 bool bypass;
2831
2832 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
2833 num_regs))
2834 return 0;
2835
2836 p = krealloc(map->patch,
2837 sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
2838 GFP_KERNEL);
2839 if (p) {
2840 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
2841 map->patch = p;
2842 map->patch_regs += num_regs;
2843 } else {
2844 return -ENOMEM;
2845 }
2846
2847 map->lock(map->lock_arg);
2848
2849 bypass = map->cache_bypass;
2850
2851 map->cache_bypass = true;
2852 map->async = true;
2853
2854 ret = _regmap_multi_reg_write(map, regs, num_regs);
2855
2856 map->async = false;
2857 map->cache_bypass = bypass;
2858
2859 map->unlock(map->lock_arg);
2860
2861 regmap_async_complete(map);
2862
2863 return ret;
2864 }
2865 EXPORT_SYMBOL_GPL(regmap_register_patch);
2866
2867 /**
2868 * regmap_get_val_bytes() - Report the size of a register value
2869 *
2870 * @map: Register map to operate on.
2871 *
2872 * Report the size of a register value, mainly intended to for use by
2873 * generic infrastructure built on top of regmap.
2874 */
regmap_get_val_bytes(struct regmap * map)2875 int regmap_get_val_bytes(struct regmap *map)
2876 {
2877 if (map->format.format_write)
2878 return -EINVAL;
2879
2880 return map->format.val_bytes;
2881 }
2882 EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
2883
2884 /**
2885 * regmap_get_max_register() - Report the max register value
2886 *
2887 * @map: Register map to operate on.
2888 *
2889 * Report the max register value, mainly intended to for use by
2890 * generic infrastructure built on top of regmap.
2891 */
regmap_get_max_register(struct regmap * map)2892 int regmap_get_max_register(struct regmap *map)
2893 {
2894 return map->max_register ? map->max_register : -EINVAL;
2895 }
2896 EXPORT_SYMBOL_GPL(regmap_get_max_register);
2897
2898 /**
2899 * regmap_get_reg_stride() - Report the register address stride
2900 *
2901 * @map: Register map to operate on.
2902 *
2903 * Report the register address stride, mainly intended to for use by
2904 * generic infrastructure built on top of regmap.
2905 */
regmap_get_reg_stride(struct regmap * map)2906 int regmap_get_reg_stride(struct regmap *map)
2907 {
2908 return map->reg_stride;
2909 }
2910 EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
2911
regmap_parse_val(struct regmap * map,const void * buf,unsigned int * val)2912 int regmap_parse_val(struct regmap *map, const void *buf,
2913 unsigned int *val)
2914 {
2915 if (!map->format.parse_val)
2916 return -EINVAL;
2917
2918 *val = map->format.parse_val(buf);
2919
2920 return 0;
2921 }
2922 EXPORT_SYMBOL_GPL(regmap_parse_val);
2923
regmap_initcall(void)2924 static int __init regmap_initcall(void)
2925 {
2926 regmap_debugfs_initcall();
2927
2928 return 0;
2929 }
2930 postcore_initcall(regmap_initcall);
2931