1 /*
2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 */
33
34 #include <linux/mlx4/cq.h>
35 #include <linux/mlx4/qp.h>
36 #include <linux/mlx4/cmd.h>
37
38 #include "mlx4_en.h"
39
mlx4_en_cq_event(struct mlx4_cq * cq,enum mlx4_event event)40 static void mlx4_en_cq_event(struct mlx4_cq *cq, enum mlx4_event event)
41 {
42 return;
43 }
44
45
mlx4_en_create_cq(struct mlx4_en_priv * priv,struct mlx4_en_cq ** pcq,int entries,int ring,enum cq_type mode,int node)46 int mlx4_en_create_cq(struct mlx4_en_priv *priv,
47 struct mlx4_en_cq **pcq,
48 int entries, int ring, enum cq_type mode,
49 int node)
50 {
51 struct mlx4_en_dev *mdev = priv->mdev;
52 struct mlx4_en_cq *cq;
53 int err;
54
55 cq = kzalloc_node(sizeof(*cq), GFP_KERNEL, node);
56 if (!cq) {
57 cq = kzalloc(sizeof(*cq), GFP_KERNEL);
58 if (!cq) {
59 en_err(priv, "Failed to allocate CQ structure\n");
60 return -ENOMEM;
61 }
62 }
63
64 cq->size = entries;
65 cq->buf_size = cq->size * mdev->dev->caps.cqe_size;
66
67 cq->ring = ring;
68 cq->type = mode;
69 cq->vector = mdev->dev->caps.num_comp_vectors;
70
71 /* Allocate HW buffers on provided NUMA node.
72 * dev->numa_node is used in mtt range allocation flow.
73 */
74 set_dev_node(&mdev->dev->persist->pdev->dev, node);
75 err = mlx4_alloc_hwq_res(mdev->dev, &cq->wqres,
76 cq->buf_size);
77 set_dev_node(&mdev->dev->persist->pdev->dev, mdev->dev->numa_node);
78 if (err)
79 goto err_cq;
80
81 cq->buf = (struct mlx4_cqe *)cq->wqres.buf.direct.buf;
82 *pcq = cq;
83
84 return 0;
85
86 err_cq:
87 kfree(cq);
88 *pcq = NULL;
89 return err;
90 }
91
mlx4_en_activate_cq(struct mlx4_en_priv * priv,struct mlx4_en_cq * cq,int cq_idx)92 int mlx4_en_activate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq,
93 int cq_idx)
94 {
95 struct mlx4_en_dev *mdev = priv->mdev;
96 int err = 0;
97 int timestamp_en = 0;
98 bool assigned_eq = false;
99
100 cq->dev = mdev->pndev[priv->port];
101 cq->mcq.set_ci_db = cq->wqres.db.db;
102 cq->mcq.arm_db = cq->wqres.db.db + 1;
103 *cq->mcq.set_ci_db = 0;
104 *cq->mcq.arm_db = 0;
105 memset(cq->buf, 0, cq->buf_size);
106
107 if (cq->type == RX) {
108 if (!mlx4_is_eq_vector_valid(mdev->dev, priv->port,
109 cq->vector)) {
110 cq->vector = cpumask_first(priv->rx_ring[cq->ring]->affinity_mask);
111
112 err = mlx4_assign_eq(mdev->dev, priv->port,
113 &cq->vector);
114 if (err) {
115 mlx4_err(mdev, "Failed assigning an EQ to CQ vector %d\n",
116 cq->vector);
117 goto free_eq;
118 }
119
120 assigned_eq = true;
121 }
122
123 cq->irq_desc =
124 irq_to_desc(mlx4_eq_get_irq(mdev->dev,
125 cq->vector));
126 } else {
127 /* For TX we use the same irq per
128 ring we assigned for the RX */
129 struct mlx4_en_cq *rx_cq;
130
131 cq_idx = cq_idx % priv->rx_ring_num;
132 rx_cq = priv->rx_cq[cq_idx];
133 cq->vector = rx_cq->vector;
134 }
135
136 if (cq->type == RX)
137 cq->size = priv->rx_ring[cq->ring]->actual_size;
138
139 if ((cq->type != RX && priv->hwtstamp_config.tx_type) ||
140 (cq->type == RX && priv->hwtstamp_config.rx_filter))
141 timestamp_en = 1;
142
143 cq->mcq.usage = MLX4_RES_USAGE_DRIVER;
144 err = mlx4_cq_alloc(mdev->dev, cq->size, &cq->wqres.mtt,
145 &mdev->priv_uar, cq->wqres.db.dma, &cq->mcq,
146 cq->vector, 0, timestamp_en);
147 if (err)
148 goto free_eq;
149
150 cq->mcq.event = mlx4_en_cq_event;
151
152 switch (cq->type) {
153 case TX:
154 cq->mcq.comp = mlx4_en_tx_irq;
155 netif_tx_napi_add(cq->dev, &cq->napi, mlx4_en_poll_tx_cq,
156 NAPI_POLL_WEIGHT);
157 napi_enable(&cq->napi);
158 break;
159 case RX:
160 cq->mcq.comp = mlx4_en_rx_irq;
161 netif_napi_add(cq->dev, &cq->napi, mlx4_en_poll_rx_cq, 64);
162 napi_enable(&cq->napi);
163 break;
164 case TX_XDP:
165 /* nothing regarding napi, it's shared with rx ring */
166 cq->xdp_busy = false;
167 break;
168 }
169
170 return 0;
171
172 free_eq:
173 if (assigned_eq)
174 mlx4_release_eq(mdev->dev, cq->vector);
175 cq->vector = mdev->dev->caps.num_comp_vectors;
176 return err;
177 }
178
mlx4_en_destroy_cq(struct mlx4_en_priv * priv,struct mlx4_en_cq ** pcq)179 void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq **pcq)
180 {
181 struct mlx4_en_dev *mdev = priv->mdev;
182 struct mlx4_en_cq *cq = *pcq;
183
184 mlx4_free_hwq_res(mdev->dev, &cq->wqres, cq->buf_size);
185 if (mlx4_is_eq_vector_valid(mdev->dev, priv->port, cq->vector) &&
186 cq->type == RX)
187 mlx4_release_eq(priv->mdev->dev, cq->vector);
188 cq->vector = 0;
189 cq->buf_size = 0;
190 cq->buf = NULL;
191 kfree(cq);
192 *pcq = NULL;
193 }
194
mlx4_en_deactivate_cq(struct mlx4_en_priv * priv,struct mlx4_en_cq * cq)195 void mlx4_en_deactivate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)
196 {
197 if (cq->type != TX_XDP) {
198 napi_disable(&cq->napi);
199 netif_napi_del(&cq->napi);
200 }
201
202 mlx4_cq_free(priv->mdev->dev, &cq->mcq);
203 }
204
205 /* Set rx cq moderation parameters */
mlx4_en_set_cq_moder(struct mlx4_en_priv * priv,struct mlx4_en_cq * cq)206 int mlx4_en_set_cq_moder(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)
207 {
208 return mlx4_cq_modify(priv->mdev->dev, &cq->mcq,
209 cq->moder_cnt, cq->moder_time);
210 }
211
mlx4_en_arm_cq(struct mlx4_en_priv * priv,struct mlx4_en_cq * cq)212 void mlx4_en_arm_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)
213 {
214 mlx4_cq_arm(&cq->mcq, MLX4_CQ_DB_REQ_NOT, priv->mdev->uar_map,
215 &priv->mdev->uar_lock);
216 }
217
218
219