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Lines Matching refs:clks

67 			clocks = <&clks IMX6UL_CLK_ARM>,
68 <&clks IMX6UL_CLK_PLL2_BUS>,
69 <&clks IMX6UL_CLK_PLL2_PFD2>,
70 <&clks IMX6UL_CA7_SECONDARY_SEL>,
71 <&clks IMX6UL_CLK_STEP>,
72 <&clks IMX6UL_CLK_PLL1_SW>,
73 <&clks IMX6UL_CLK_PLL1_SYS>,
74 <&clks IMX6UL_PLL1_BYPASS>,
75 <&clks IMX6UL_CLK_PLL1>,
76 <&clks IMX6UL_PLL1_BYPASS_SRC>,
77 <&clks IMX6UL_CLK_OSC>;
163 clocks = <&clks IMX6UL_CLK_ECSPI1>,
164 <&clks IMX6UL_CLK_ECSPI1>;
175 clocks = <&clks IMX6UL_CLK_ECSPI2>,
176 <&clks IMX6UL_CLK_ECSPI2>;
187 clocks = <&clks IMX6UL_CLK_ECSPI3>,
188 <&clks IMX6UL_CLK_ECSPI3>;
199 clocks = <&clks IMX6UL_CLK_ECSPI4>,
200 <&clks IMX6UL_CLK_ECSPI4>;
210 clocks = <&clks IMX6UL_CLK_UART7_IPG>,
211 <&clks IMX6UL_CLK_UART7_SERIAL>;
221 clocks = <&clks IMX6UL_CLK_UART1_IPG>,
222 <&clks IMX6UL_CLK_UART1_SERIAL>;
232 clocks = <&clks IMX6UL_CLK_UART8_IPG>,
233 <&clks IMX6UL_CLK_UART8_SERIAL>;
243 clocks = <&clks IMX6UL_CLK_GPT1_BUS>,
244 <&clks IMX6UL_CLK_GPT1_SERIAL>;
308 clocks = <&clks IMX6UL_CLK_ENET>,
309 <&clks IMX6UL_CLK_ENET_AHB>,
310 <&clks IMX6UL_CLK_ENET_PTP>,
311 <&clks IMX6UL_CLK_ENET2_REF_125M>,
312 <&clks IMX6UL_CLK_ENET2_REF_125M>;
324 clocks = <&clks IMX6UL_CLK_WDOG1>;
331 clocks = <&clks IMX6UL_CLK_WDOG2>;
335 clks: ccm@020c4000 { label
406 clocks = <&clks IMX6UL_CLK_USBPHY1>;
415 clocks = <&clks IMX6UL_CLK_USBPHY2>;
490 clocks = <&clks IMX6UL_CLK_DUMMY>,
491 <&clks IMX6UL_CLK_DUMMY>;
499 clocks = <&clks IMX6UL_CLK_DUMMY>,
500 <&clks IMX6UL_CLK_DUMMY>;
509 clocks = <&clks IMX6UL_CLK_DUMMY>,
510 <&clks IMX6UL_CLK_DUMMY>;
519 clocks = <&clks IMX6UL_CLK_DUMMY>,
520 <&clks IMX6UL_CLK_DUMMY>;
529 clocks = <&clks IMX6UL_CLK_DUMMY>,
530 <&clks IMX6UL_CLK_DUMMY>;
547 clocks = <&clks IMX6UL_CLK_USBOH3>;
558 clocks = <&clks IMX6UL_CLK_USBOH3>;
575 clocks = <&clks IMX6UL_CLK_ENET>,
576 <&clks IMX6UL_CLK_ENET_AHB>,
577 <&clks IMX6UL_CLK_ENET_PTP>,
578 <&clks IMX6UL_CLK_ENET_REF>,
579 <&clks IMX6UL_CLK_ENET_REF>;
592 clocks = <&clks IMX6UL_CLK_IPG>,
593 <&clks IMX6UL_CLK_ADC2>;
602 clocks = <&clks IMX6UL_CLK_USDHC1>,
603 <&clks IMX6UL_CLK_USDHC1>,
604 <&clks IMX6UL_CLK_USDHC1>;
614 clocks = <&clks IMX6UL_CLK_USDHC2>,
615 <&clks IMX6UL_CLK_USDHC2>,
616 <&clks IMX6UL_CLK_USDHC2>;
628 clocks = <&clks IMX6UL_CLK_I2C1>;
638 clocks = <&clks IMX6UL_CLK_I2C2>;
648 clocks = <&clks IMX6UL_CLK_I2C3>;
664 clocks = <&clks IMX6UL_CLK_QSPI>,
665 <&clks IMX6UL_CLK_QSPI>;
675 clocks = <&clks IMX6UL_CLK_UART2_IPG>,
676 <&clks IMX6UL_CLK_UART2_SERIAL>;
686 clocks = <&clks IMX6UL_CLK_UART3_IPG>,
687 <&clks IMX6UL_CLK_UART3_SERIAL>;
697 clocks = <&clks IMX6UL_CLK_UART4_IPG>,
698 <&clks IMX6UL_CLK_UART4_SERIAL>;
708 clocks = <&clks IMX6UL_CLK_UART5_IPG>,
709 <&clks IMX6UL_CLK_UART5_SERIAL>;
720 clocks = <&clks IMX6UL_CLK_I2C4>;
729 clocks = <&clks IMX6UL_CLK_UART6_IPG>,
730 <&clks IMX6UL_CLK_UART6_SERIAL>;