Lines Matching refs:CLK_A
150 txd0 = <&pio0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
151 txd1 = <&pio0 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
152 txd2 = <&pio0 2 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
153 txd3 = <&pio0 3 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
154 txer = <&pio0 4 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
155 txen = <&pio0 5 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
156 txclk = <&pio0 6 ALT1 IN NICLK 0 CLK_A>;
159 mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
162 rxd0 = <&pio1 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
163 rxd1 = <&pio1 5 ALT1 IN SE_NICLK_IO 0 CLK_A>;
164 rxd2 = <&pio1 6 ALT1 IN SE_NICLK_IO 0 CLK_A>;
165 rxd3 = <&pio1 7 ALT1 IN SE_NICLK_IO 0 CLK_A>;
166 rxdv = <&pio2 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
167 rx_er = <&pio2 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
168 rxclk = <&pio2 2 ALT1 IN NICLK 0 CLK_A>;
169 phyclk = <&pio2 3 ALT1 IN NICLK 1000 CLK_A>;
175 txd0 = <&pio0 0 ALT1 OUT DE_IO 1000 CLK_A>;
176 txd1 = <&pio0 1 ALT1 OUT DE_IO 1000 CLK_A>;
177 txd2 = <&pio0 2 ALT1 OUT DE_IO 1000 CLK_A>;
178 txd3 = <&pio0 3 ALT1 OUT DE_IO 1000 CLK_A>;
179 txen = <&pio0 5 ALT1 OUT DE_IO 0 CLK_A>;
180 txclk = <&pio0 6 ALT1 IN NICLK 0 CLK_A>;
182 mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
183 rxd0 = <&pio1 4 ALT1 IN DE_IO 0 CLK_A>;
184 rxd1 = <&pio1 5 ALT1 IN DE_IO 0 CLK_A>;
185 rxd2 = <&pio1 6 ALT1 IN DE_IO 0 CLK_A>;
186 rxd3 = <&pio1 7 ALT1 IN DE_IO 0 CLK_A>;
188 rxdv = <&pio2 0 ALT1 IN DE_IO 500 CLK_A>;
189 rxclk = <&pio2 2 ALT1 IN NICLK 0 CLK_A>;
192 clk125= <&pio3 7 ALT4 IN NICLK 0 CLK_A>;
366 txen = <&pio13 7 ALT2 OUT SE_NICLK_IO 0 CLK_A>;
368 txd0 = <&pio14 0 ALT2 OUT SE_NICLK_IO 0 CLK_A>;
369 txd1 = <&pio14 1 ALT2 OUT SE_NICLK_IO 0 CLK_A>;
373 txclk = <&pio15 0 ALT2 IN NICLK 0 CLK_A>;
374 txer = <&pio15 1 ALT2 OUT SE_NICLK_IO 0 CLK_A>;
380 rxd0 = <&pio16 0 ALT2 IN SE_NICLK_IO 0 CLK_A>;
381 rxd1 = <&pio16 1 ALT2 IN SE_NICLK_IO 0 CLK_A>;
382 rxd2 = <&pio16 2 ALT2 IN SE_NICLK_IO 0 CLK_A>;
383 rxd3 = <&pio16 3 ALT2 IN SE_NICLK_IO 0 CLK_A>;
384 rxdv = <&pio15 6 ALT2 IN SE_NICLK_IO 0 CLK_A>;
385 rx_er = <&pio15 7 ALT2 IN SE_NICLK_IO 0 CLK_A>;
386 rxclk = <&pio17 0 ALT2 IN NICLK 0 CLK_A>;
387 phyclk = <&pio13 5 ALT2 OUT NICLK 1000 CLK_A>;
397 txen = <&pio13 7 ALT2 OUT SE_NICLK_IO 3000 CLK_A>;
399 txd0 = <&pio14 0 ALT2 OUT SE_NICLK_IO 3000 CLK_A>;
400 txd1 = <&pio14 1 ALT2 OUT SE_NICLK_IO 3000 CLK_A>;
408 txclk = <&pio15 0 ALT2 IN NICLK 0 CLK_A>;
409 txer = <&pio15 1 ALT2 OUT SE_NICLK_IO 3000 CLK_A>;
412 rxdv = <&pio15 6 ALT2 IN SE_NICLK_IO 1500 CLK_A>;
413 rx_er = <&pio15 7 ALT2 IN SE_NICLK_IO 1500 CLK_A>;
415 rxd0 = <&pio16 0 ALT2 IN SE_NICLK_IO 1500 CLK_A>;
416 rxd1 = <&pio16 1 ALT2 IN SE_NICLK_IO 1500 CLK_A>;
417 rxd2 = <&pio16 2 ALT2 IN SE_NICLK_IO 1500 CLK_A>;
418 rxd3 = <&pio16 3 ALT2 IN SE_NICLK_IO 1500 CLK_A>;
419 rxd4 = <&pio16 4 ALT2 IN SE_NICLK_IO 1500 CLK_A>;
420 rxd5 = <&pio16 5 ALT2 IN SE_NICLK_IO 1500 CLK_A>;
421 rxd6 = <&pio16 6 ALT2 IN SE_NICLK_IO 1500 CLK_A>;
422 rxd7 = <&pio16 7 ALT2 IN SE_NICLK_IO 1500 CLK_A>;
424 rxclk = <&pio17 0 ALT2 IN NICLK 0 CLK_A>;
425 clk125 = <&pio17 6 ALT1 IN NICLK 0 CLK_A>;