148 	struct arm_pmu *cpu_pmu = (struct arm_pmu *)dev;  in xscale1pmu_handle_irq()  local
149 	struct pmu_hw_events *cpuc = this_cpu_ptr(cpu_pmu->hw_events);  in xscale1pmu_handle_irq()
173 	for (idx = 0; idx < cpu_pmu->num_events; ++idx) {  in xscale1pmu_handle_irq()
190 			cpu_pmu->disable(event);  in xscale1pmu_handle_irq()
207 	struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu);  in xscale1pmu_enable_event()  local
209 	struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events);  in xscale1pmu_enable_event()
243 	struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu);  in xscale1pmu_disable_event()  local
245 	struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events);  in xscale1pmu_disable_event()
295 static void xscale1pmu_start(struct arm_pmu *cpu_pmu)  in xscale1pmu_start()  argument
298 	struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events);  in xscale1pmu_start()
307 static void xscale1pmu_stop(struct arm_pmu *cpu_pmu)  in xscale1pmu_stop()  argument
310 	struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events);  in xscale1pmu_stop()
364 static int xscale1pmu_init(struct arm_pmu *cpu_pmu)  in xscale1pmu_init()  argument
366 	cpu_pmu->name		= "armv5_xscale1";  in xscale1pmu_init()
367 	cpu_pmu->handle_irq	= xscale1pmu_handle_irq;  in xscale1pmu_init()
368 	cpu_pmu->enable		= xscale1pmu_enable_event;  in xscale1pmu_init()
369 	cpu_pmu->disable	= xscale1pmu_disable_event;  in xscale1pmu_init()
370 	cpu_pmu->read_counter	= xscale1pmu_read_counter;  in xscale1pmu_init()
371 	cpu_pmu->write_counter	= xscale1pmu_write_counter;  in xscale1pmu_init()
372 	cpu_pmu->get_event_idx	= xscale1pmu_get_event_idx;  in xscale1pmu_init()
373 	cpu_pmu->start		= xscale1pmu_start;  in xscale1pmu_init()
374 	cpu_pmu->stop		= xscale1pmu_stop;  in xscale1pmu_init()
375 	cpu_pmu->map_event	= xscale_map_event;  in xscale1pmu_init()
376 	cpu_pmu->num_events	= 3;  in xscale1pmu_init()
377 	cpu_pmu->max_period	= (1LLU << 32) - 1;  in xscale1pmu_init()
495 	struct arm_pmu *cpu_pmu = (struct arm_pmu *)dev;  in xscale2pmu_handle_irq()  local
496 	struct pmu_hw_events *cpuc = this_cpu_ptr(cpu_pmu->hw_events);  in xscale2pmu_handle_irq()
514 	for (idx = 0; idx < cpu_pmu->num_events; ++idx) {  in xscale2pmu_handle_irq()
531 			cpu_pmu->disable(event);  in xscale2pmu_handle_irq()
548 	struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu);  in xscale2pmu_enable_event()  local
550 	struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events);  in xscale2pmu_enable_event()
594 	struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu);  in xscale2pmu_disable_event()  local
596 	struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events);  in xscale2pmu_disable_event()
659 static void xscale2pmu_start(struct arm_pmu *cpu_pmu)  in xscale2pmu_start()  argument
662 	struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events);  in xscale2pmu_start()
671 static void xscale2pmu_stop(struct arm_pmu *cpu_pmu)  in xscale2pmu_stop()  argument
674 	struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events);  in xscale2pmu_stop()
734 static int xscale2pmu_init(struct arm_pmu *cpu_pmu)  in xscale2pmu_init()  argument
736 	cpu_pmu->name		= "armv5_xscale2";  in xscale2pmu_init()
737 	cpu_pmu->handle_irq	= xscale2pmu_handle_irq;  in xscale2pmu_init()
738 	cpu_pmu->enable		= xscale2pmu_enable_event;  in xscale2pmu_init()
739 	cpu_pmu->disable	= xscale2pmu_disable_event;  in xscale2pmu_init()
740 	cpu_pmu->read_counter	= xscale2pmu_read_counter;  in xscale2pmu_init()
741 	cpu_pmu->write_counter	= xscale2pmu_write_counter;  in xscale2pmu_init()
742 	cpu_pmu->get_event_idx	= xscale2pmu_get_event_idx;  in xscale2pmu_init()
743 	cpu_pmu->start		= xscale2pmu_start;  in xscale2pmu_init()
744 	cpu_pmu->stop		= xscale2pmu_stop;  in xscale2pmu_init()
745 	cpu_pmu->map_event	= xscale_map_event;  in xscale2pmu_init()
746 	cpu_pmu->num_events	= 5;  in xscale2pmu_init()
747 	cpu_pmu->max_period	= (1LLU << 32) - 1;  in xscale2pmu_init()