155 		if (__raw_readl(IOP13XX_ESSR0) & IOP13XX_INTERFACE_SEL_PCIX)  in iop13xx_atu_function()
161 		if (__raw_readl(IOP13XX_ESSR0) & IOP13XX_INTERFACE_SEL_PCIX)  in iop13xx_atu_function()
245 	status = __raw_readl(IOP13XX_ATUX_ATUISR);  in iop13xx_atux_pci_status()
286 		__raw_writel(__raw_readl(IOP13XX_XBG_BECSR) & 3,  in iop13xx_atux_read_config()
355 	status = __raw_readl(IOP13XX_ATUE_ATUISR);  in iop13xx_atue_pci_status()
366 			status = __raw_readl(IOP13XX_ATUE_PIE_STS) &  in iop13xx_atue_pci_status()
367 					~(__raw_readl(IOP13XX_ATUE_PIE_MSK));  in iop13xx_atue_pci_status()
371 					__raw_readl(IOP13XX_ATUE_PIE_STS));  in iop13xx_atue_pci_status()
375 					__raw_readl(IOP13XX_ATUE_PIE_STS));  in iop13xx_atue_pci_status()
377 					__raw_readl(IOP13XX_ATUE_PIE_MSK));  in iop13xx_atue_pci_status()
408 	val = __raw_readl(IOP13XX_ATUE_OCCDR);  in iop13xx_atue_read()
429 			__raw_writel(__raw_readl(IOP13XX_XBG_BECSR) & 3,  in iop13xx_atue_read_config()
489 	PRINTK("IOP13XX_XBG_BECSR: %#10x", __raw_readl(IOP13XX_XBG_BECSR));  in iop13xx_pci_abort()
490 	PRINTK("IOP13XX_XBG_BERAR: %#10x", __raw_readl(IOP13XX_XBG_BERAR));  in iop13xx_pci_abort()
491 	PRINTK("IOP13XX_XBG_BERUAR: %#10x", __raw_readl(IOP13XX_XBG_BERUAR));  in iop13xx_pci_abort()
605 	reg_val = __raw_readl(IOP13XX_ATUE_OIOBAR);  in iop13xx_atue_setup()
612 	reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR0);  in iop13xx_atue_setup()
618 	reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR1);  in iop13xx_atue_setup()
624 	reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR2);  in iop13xx_atue_setup()
630 	reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR3);  in iop13xx_atue_setup()
643 	reg_val = __raw_readl(IOP13XX_ATUE_ATUCR);  in iop13xx_atue_setup()
657 	while (__raw_readl(IOP13XX_ATUE_PCSR) & (IOP13XX_ATUE_PCSR_OUT_Q_BUSY |  in iop13xx_atue_disable()
668 	reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR0);  in iop13xx_atue_disable()
678 	reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR1);  in iop13xx_atue_disable()
688 	reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR2);  in iop13xx_atue_disable()
693 	reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR3);  in iop13xx_atue_disable()
719 	reg_val = __raw_readl(IOP13XX_ATUX_PCSR);  in iop13xx_atux_setup()
774 	reg_val = __raw_readl(IOP13XX_ATUX_OIOBAR);  in iop13xx_atux_setup()
781 	reg_val = __raw_readl(IOP13XX_ATUX_OUMBAR0);  in iop13xx_atux_setup()
787 	reg_val = __raw_readl(IOP13XX_ATUX_OUMBAR1);  in iop13xx_atux_setup()
793 	reg_val = __raw_readl(IOP13XX_ATUX_OUMBAR2);  in iop13xx_atux_setup()
799 	reg_val = __raw_readl(IOP13XX_ATUX_OUMBAR3);  in iop13xx_atux_setup()
812 	reg_val = __raw_readl(IOP13XX_ATUX_ATUCR);  in iop13xx_atux_setup()
825 	while (__raw_readl(IOP13XX_ATUX_PCSR) & (IOP13XX_ATUX_PCSR_OUT_Q_BUSY |  in iop13xx_atux_disable()
835 	reg_val = __raw_readl(IOP13XX_ATUX_OUMBAR0);  in iop13xx_atux_disable()
845 	reg_val = __raw_readl(IOP13XX_ATUX_OUMBAR1);  in iop13xx_atux_disable()
855 	reg_val = __raw_readl(IOP13XX_ATUX_OUMBAR2);  in iop13xx_atux_disable()
865 	reg_val = __raw_readl(IOP13XX_ATUX_OUMBAR3);  in iop13xx_atux_disable()
880 	switch(__raw_readl(IOP13XX_ESSR0) &  in iop13xx_set_atu_mmr_bases()
921 		if (__raw_readl(IOP13XX_ESSR0) & IOP13XX_INTERFACE_SEL_PCIX) {  in iop13xx_atu_select()
949 			if (!(__raw_readl(IOP13XX_ATUX_PCSR) &  in iop13xx_atu_select()
954 			if (__raw_readl(IOP13XX_ATUE_PCSR) &  in iop13xx_atu_select()
968 	__raw_writel(__raw_readl(IOP13XX_XBG_BECSR) & 3, IOP13XX_XBG_BECSR);  in iop13xx_pci_init()
1034 		pcixsr = __raw_readl(IOP13XX_ATUX_PCIXSR);  in iop13xx_pci_setup()
1052 		pcsr = __raw_readl(IOP13XX_ATUE_PCSR);  in iop13xx_pci_setup()
1082 	if (__raw_readl(IOP13XX_ESSR0) & IOP13XX_INTERFACE_SEL_PCIX)  in iop13xx_dev_id()