Lines Matching refs:NR_IRQS_LEGACY
37 #define INT_CAMERA (NR_IRQS_LEGACY + 1)
38 #define INT_FIQ (NR_IRQS_LEGACY + 3)
39 #define INT_RTDX (NR_IRQS_LEGACY + 6)
40 #define INT_DSP_MMU_ABORT (NR_IRQS_LEGACY + 7)
41 #define INT_HOST (NR_IRQS_LEGACY + 8)
42 #define INT_ABORT (NR_IRQS_LEGACY + 9)
43 #define INT_BRIDGE_PRIV (NR_IRQS_LEGACY + 13)
44 #define INT_GPIO_BANK1 (NR_IRQS_LEGACY + 14)
45 #define INT_UART3 (NR_IRQS_LEGACY + 15)
46 #define INT_TIMER3 (NR_IRQS_LEGACY + 16)
47 #define INT_DMA_CH0_6 (NR_IRQS_LEGACY + 19)
48 #define INT_DMA_CH1_7 (NR_IRQS_LEGACY + 20)
49 #define INT_DMA_CH2_8 (NR_IRQS_LEGACY + 21)
50 #define INT_DMA_CH3 (NR_IRQS_LEGACY + 22)
51 #define INT_DMA_CH4 (NR_IRQS_LEGACY + 23)
52 #define INT_DMA_CH5 (NR_IRQS_LEGACY + 24)
53 #define INT_TIMER1 (NR_IRQS_LEGACY + 26)
54 #define INT_WD_TIMER (NR_IRQS_LEGACY + 27)
55 #define INT_BRIDGE_PUB (NR_IRQS_LEGACY + 28)
56 #define INT_TIMER2 (NR_IRQS_LEGACY + 30)
57 #define INT_LCD_CTRL (NR_IRQS_LEGACY + 31)
62 #define INT_1510_IH2_IRQ (NR_IRQS_LEGACY + 0)
63 #define INT_1510_RES2 (NR_IRQS_LEGACY + 2)
64 #define INT_1510_SPI_TX (NR_IRQS_LEGACY + 4)
65 #define INT_1510_SPI_RX (NR_IRQS_LEGACY + 5)
66 #define INT_1510_DSP_MAILBOX1 (NR_IRQS_LEGACY + 10)
67 #define INT_1510_DSP_MAILBOX2 (NR_IRQS_LEGACY + 11)
68 #define INT_1510_RES12 (NR_IRQS_LEGACY + 12)
69 #define INT_1510_LB_MMU (NR_IRQS_LEGACY + 17)
70 #define INT_1510_RES18 (NR_IRQS_LEGACY + 18)
71 #define INT_1510_LOCAL_BUS (NR_IRQS_LEGACY + 29)
77 #define INT_1610_IH2_FIQ (NR_IRQS_LEGACY + 2)
78 #define INT_1610_McBSP2_TX (NR_IRQS_LEGACY + 4)
79 #define INT_1610_McBSP2_RX (NR_IRQS_LEGACY + 5)
80 #define INT_1610_DSP_MAILBOX1 (NR_IRQS_LEGACY + 10)
81 #define INT_1610_DSP_MAILBOX2 (NR_IRQS_LEGACY + 11)
82 #define INT_1610_LCD_LINE (NR_IRQS_LEGACY + 12)
83 #define INT_1610_GPTIMER1 (NR_IRQS_LEGACY + 17)
84 #define INT_1610_GPTIMER2 (NR_IRQS_LEGACY + 18)
85 #define INT_1610_SSR_FIFO_0 (NR_IRQS_LEGACY + 29)
90 #define INT_7XX_IH2_FIQ (NR_IRQS_LEGACY + 0)
91 #define INT_7XX_IH2_IRQ (NR_IRQS_LEGACY + 1)
92 #define INT_7XX_USB_NON_ISO (NR_IRQS_LEGACY + 2)
93 #define INT_7XX_USB_ISO (NR_IRQS_LEGACY + 3)
94 #define INT_7XX_ICR (NR_IRQS_LEGACY + 4)
95 #define INT_7XX_EAC (NR_IRQS_LEGACY + 5)
96 #define INT_7XX_GPIO_BANK1 (NR_IRQS_LEGACY + 6)
97 #define INT_7XX_GPIO_BANK2 (NR_IRQS_LEGACY + 7)
98 #define INT_7XX_GPIO_BANK3 (NR_IRQS_LEGACY + 8)
99 #define INT_7XX_McBSP2TX (NR_IRQS_LEGACY + 10)
100 #define INT_7XX_McBSP2RX (NR_IRQS_LEGACY + 11)
101 #define INT_7XX_McBSP2RX_OVF (NR_IRQS_LEGACY + 12)
102 #define INT_7XX_LCD_LINE (NR_IRQS_LEGACY + 14)
103 #define INT_7XX_GSM_PROTECT (NR_IRQS_LEGACY + 15)
104 #define INT_7XX_TIMER3 (NR_IRQS_LEGACY + 16)
105 #define INT_7XX_GPIO_BANK5 (NR_IRQS_LEGACY + 17)
106 #define INT_7XX_GPIO_BANK6 (NR_IRQS_LEGACY + 18)
107 #define INT_7XX_SPGIO_WR (NR_IRQS_LEGACY + 29)
114 #define IH2_BASE (NR_IRQS_LEGACY + 32)
258 #define OMAP_IRQ_BIT(irq) (1 << ((irq - NR_IRQS_LEGACY) % 32))