46 static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {  variable
223 	for (i = 0; i < omap4_prcm_irq_setup.nr_regs; i++)  in omap44xx_prm_read_pending_irqs()
224 		events[i] = _read_pending_irq_reg(omap4_prcm_irq_setup.mask +  in omap44xx_prm_read_pending_irqs()
225 				i * 4, omap4_prcm_irq_setup.ack + i * 4);  in omap44xx_prm_read_pending_irqs()
258 	for (i = 0; i < omap4_prcm_irq_setup.nr_regs; i++) {  in omap44xx_prm_save_and_clear_irqen()
259 		reg = omap4_prcm_irq_setup.mask + i * 4;  in omap44xx_prm_save_and_clear_irqen()
286 	for (i = 0; i < omap4_prcm_irq_setup.nr_regs; i++)  in omap44xx_prm_restore_irqen()
289 					 omap4_prcm_irq_setup.mask + i * 4);  in omap44xx_prm_restore_irqen()
313 				    omap4_prcm_irq_setup.pm_ctrl);  in omap44xx_prm_reconfigure_io_chain()
316 					   omap4_prcm_irq_setup.pm_ctrl) &  in omap44xx_prm_reconfigure_io_chain()
326 				    omap4_prcm_irq_setup.pm_ctrl);  in omap44xx_prm_reconfigure_io_chain()
329 					   omap4_prcm_irq_setup.pm_ctrl) &  in omap44xx_prm_reconfigure_io_chain()
357 				    omap4_prcm_irq_setup.pm_ctrl);  in omap44xx_prm_enable_io_wakeup()
728 		omap4_prcm_irq_setup.nr_irqs = 1;  in omap44xx_prm_init()
729 		omap4_prcm_irq_setup.nr_regs = 1;  in omap44xx_prm_init()
730 		omap4_prcm_irq_setup.pm_ctrl = AM43XX_PRM_IO_PMCTRL_OFFSET;  in omap44xx_prm_init()
731 		omap4_prcm_irq_setup.ack = AM43XX_PRM_IRQSTATUS_MPU_OFFSET;  in omap44xx_prm_init()
732 		omap4_prcm_irq_setup.mask = AM43XX_PRM_IRQENABLE_MPU_OFFSET;  in omap44xx_prm_init()
764 		omap4_prcm_irq_setup.irq = irq_num;  in omap44xx_prm_late_init()
765 		omap4_prcm_irq_setup.xlate_irq = NULL;  in omap44xx_prm_late_init()
770 	return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup);  in omap44xx_prm_late_init()