Lines Matching refs:ORION5X_PCI_REG
193 #define ORION5X_PCI_REG(x) (ORION5X_PCI_VIRT_BASE + (x)) macro
194 #define PCI_MODE ORION5X_PCI_REG(0xd00)
195 #define PCI_CMD ORION5X_PCI_REG(0xc00)
196 #define PCI_P2P_CONF ORION5X_PCI_REG(0x1d14)
197 #define PCI_CONF_ADDR ORION5X_PCI_REG(0xc78)
198 #define PCI_CONF_DATA ORION5X_PCI_REG(0xc7c)
240 #define PCI_BAR_SIZE_DDR_CS(n) (((n) == 0) ? ORION5X_PCI_REG(0xc08) : \
241 ((n) == 1) ? ORION5X_PCI_REG(0xd08) : \
242 ((n) == 2) ? ORION5X_PCI_REG(0xc0c) : \
243 ((n) == 3) ? ORION5X_PCI_REG(0xd0c) : NULL)
244 #define PCI_BAR_REMAP_DDR_CS(n) (((n) == 0) ? ORION5X_PCI_REG(0xc48) : \
245 ((n) == 1) ? ORION5X_PCI_REG(0xd48) : \
246 ((n) == 2) ? ORION5X_PCI_REG(0xc4c) : \
247 ((n) == 3) ? ORION5X_PCI_REG(0xd4c) : NULL)
248 #define PCI_BAR_ENABLE ORION5X_PCI_REG(0xc3c)
249 #define PCI_ADDR_DECODE_CTRL ORION5X_PCI_REG(0xd3c)