Lines Matching refs:c1

34 	mrc	p15, 0, r0, c1, c0, 0		@ ctrl register
37 	mcr	p15, 0, r0, c1, c0, 0		@ disable caches
56 	mrc	p15, 0, r1, c1, c0, 0		@ ctrl register
59 	mcr	p15, 0, r1, c1, c0, 0		@ disable MMU
143 	mrc	p15, 0, r8, c1, c0, 0	@ Control register
144 	mrc	p15, 0, r9, c1, c0, 1	@ Auxiliary control register
145 	mrc	p15, 0, r10, c1, c0, 2	@ Co-processor access control
176 	mrc	p15, 0, r4, c1, c0, 1	@ Read Auxiliary control register
178 	mcrne	p15, 0, r9, c1, c0, 1	@ No, so write it
179 	mcr	p15, 0, r10, c1, c0, 2	@ Co-processor access control
231 	mrc	p15, 1, r6, c15, c1, 0  @ save CP15 - extra features
233 	mrc	p15, 1, r8, c15, c1, 2	@ save CP15 - Aux Debug Modes Ctrl 2
234 	mrc	p15, 1, r9, c15, c1, 1  @ save CP15 - Aux Debug Modes Ctrl 1
243 	mcr	p15, 1, r6, c15, c1, 0  @ restore CP15 - extra features
245 	mcr	p15, 1, r8, c15, c1, 2	@ restore CP15 - Aux Debug Modes Ctrl 2
246 	mcr	p15, 1, r9, c15, c1, 1  @ restore CP15 - Aux Debug Modes Ctrl 1
289 	ALT_SMP(mrc	p15, 0, r0, c1, c0, 1)
294 	mcreq	p15, 0, r0, c1, c0, 1
309 	mrceq	p15, 0, r0, c1, c0, 1		@ read aux control register
311 	mcreq	p15, 0, r0, c1, c0, 1		@ write aux control register
315 	mrceq	p15, 0, r0, c1, c0, 1		@ read aux control register
318 	mcreq	p15, 0, r0, c1, c0, 1		@ write aux control register
364 	mrcle	p15, 0, r0, c1, c0, 1		@ read aux control register
366 	mcrle	p15, 0, r0, c1, c0, 1		@ write aux control register
396 	mrc	p15, 1,	r0, c15, c1, 1
400 	mcr	p15, 1,	r0, c15, c1, 1
403 	mrc	p15, 1,	r0, c15, c1, 2
406 	mcr	p15, 1,	r0, c15, c1, 2
418 	mrc	p15, 1,	r0, c15, c1, 0
420 	mcr	p15, 1,	r0, c15, c1, 0
467 	mrc	p15, 0, r0, c0, c1, 0		@ read ID_PFR0 for ThumbEE
472 	mcr	p14, 6, r3, c1, c0, 0		@ Initialize TEEHBR to 0
485    	mrc	p15, 0, r0, c1, c0, 0		@ read control register