Lines Matching refs:bfin_write32
27 #define bfin_write_SIC_RVECT(val) bfin_write32(SIC_RVECT,val)
29 #define bfin_write_SIC_IMASK(val) bfin_write32(SIC_IMASK,val)
31 #define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0,val)
33 #define bfin_write_SIC_IAR1(val) bfin_write32(SIC_IAR1,val)
35 #define bfin_write_SIC_IAR2(val) bfin_write32(SIC_IAR2,val)
37 #define bfin_write_SIC_IAR3(val) bfin_write32(SIC_IAR3,val)
39 #define bfin_write_SIC_ISR(val) bfin_write32(SIC_ISR,val)
41 #define bfin_write_SIC_IWR(val) bfin_write32(SIC_IWR,val)
47 #define bfin_write_WDOG_CNT(val) bfin_write32(WDOG_CNT,val)
49 #define bfin_write_WDOG_STAT(val) bfin_write32(WDOG_STAT,val)
53 #define bfin_write_RTC_STAT(val) bfin_write32(RTC_STAT,val)
61 #define bfin_write_RTC_ALARM(val) bfin_write32(RTC_ALARM,val)
113 #define bfin_write_TIMER0_COUNTER(val) bfin_write32(TIMER0_COUNTER,val)
115 #define bfin_write_TIMER0_PERIOD(val) bfin_write32(TIMER0_PERIOD,val)
117 #define bfin_write_TIMER0_WIDTH(val) bfin_write32(TIMER0_WIDTH,val)
122 #define bfin_write_TIMER1_COUNTER(val) bfin_write32(TIMER1_COUNTER,val)
124 #define bfin_write_TIMER1_PERIOD(val) bfin_write32(TIMER1_PERIOD,val)
126 #define bfin_write_TIMER1_WIDTH(val) bfin_write32(TIMER1_WIDTH,val)
131 #define bfin_write_TIMER2_COUNTER(val) bfin_write32(TIMER2_COUNTER,val)
133 #define bfin_write_TIMER2_PERIOD(val) bfin_write32(TIMER2_PERIOD,val)
135 #define bfin_write_TIMER2_WIDTH(val) bfin_write32(TIMER2_WIDTH,val)
140 #define bfin_write_TIMER3_COUNTER(val) bfin_write32(TIMER3_COUNTER,val)
142 #define bfin_write_TIMER3_PERIOD(val) bfin_write32(TIMER3_PERIOD,val)
144 #define bfin_write_TIMER3_WIDTH(val) bfin_write32(TIMER3_WIDTH,val)
149 #define bfin_write_TIMER4_COUNTER(val) bfin_write32(TIMER4_COUNTER,val)
151 #define bfin_write_TIMER4_PERIOD(val) bfin_write32(TIMER4_PERIOD,val)
153 #define bfin_write_TIMER4_WIDTH(val) bfin_write32(TIMER4_WIDTH,val)
158 #define bfin_write_TIMER5_COUNTER(val) bfin_write32(TIMER5_COUNTER,val)
160 #define bfin_write_TIMER5_PERIOD(val) bfin_write32(TIMER5_PERIOD,val)
162 #define bfin_write_TIMER5_WIDTH(val) bfin_write32(TIMER5_WIDTH,val)
167 #define bfin_write_TIMER6_COUNTER(val) bfin_write32(TIMER6_COUNTER,val)
169 #define bfin_write_TIMER6_PERIOD(val) bfin_write32(TIMER6_PERIOD,val)
171 #define bfin_write_TIMER6_WIDTH(val) bfin_write32(TIMER6_WIDTH,val)
176 #define bfin_write_TIMER7_COUNTER(val) bfin_write32(TIMER7_COUNTER,val)
178 #define bfin_write_TIMER7_PERIOD(val) bfin_write32(TIMER7_PERIOD,val)
180 #define bfin_write_TIMER7_WIDTH(val) bfin_write32(TIMER7_WIDTH,val)
187 #define bfin_write_TIMER_STATUS(val) bfin_write32(TIMER_STATUS,val)
235 #define bfin_write_SPORT0_TX(val) bfin_write32(SPORT0_TX,val)
237 #define bfin_write_SPORT0_RX(val) bfin_write32(SPORT0_RX,val)
239 #define bfin_write_SPORT0_TX32(val) bfin_write32(SPORT0_TX,val)
241 #define bfin_write_SPORT0_RX32(val) bfin_write32(SPORT0_RX,val)
263 #define bfin_write_SPORT0_MTCS0(val) bfin_write32(SPORT0_MTCS0,val)
265 #define bfin_write_SPORT0_MTCS1(val) bfin_write32(SPORT0_MTCS1,val)
267 #define bfin_write_SPORT0_MTCS2(val) bfin_write32(SPORT0_MTCS2,val)
269 #define bfin_write_SPORT0_MTCS3(val) bfin_write32(SPORT0_MTCS3,val)
271 #define bfin_write_SPORT0_MRCS0(val) bfin_write32(SPORT0_MRCS0,val)
273 #define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1,val)
275 #define bfin_write_SPORT0_MRCS2(val) bfin_write32(SPORT0_MRCS2,val)
277 #define bfin_write_SPORT0_MRCS3(val) bfin_write32(SPORT0_MRCS3,val)
289 #define bfin_write_SPORT1_TX(val) bfin_write32(SPORT1_TX,val)
291 #define bfin_write_SPORT1_RX(val) bfin_write32(SPORT1_RX,val)
293 #define bfin_write_SPORT1_TX32(val) bfin_write32(SPORT1_TX,val)
295 #define bfin_write_SPORT1_RX32(val) bfin_write32(SPORT1_RX,val)
317 #define bfin_write_SPORT1_MTCS0(val) bfin_write32(SPORT1_MTCS0,val)
319 #define bfin_write_SPORT1_MTCS1(val) bfin_write32(SPORT1_MTCS1,val)
321 #define bfin_write_SPORT1_MTCS2(val) bfin_write32(SPORT1_MTCS2,val)
323 #define bfin_write_SPORT1_MTCS3(val) bfin_write32(SPORT1_MTCS3,val)
325 #define bfin_write_SPORT1_MRCS0(val) bfin_write32(SPORT1_MRCS0,val)
327 #define bfin_write_SPORT1_MRCS1(val) bfin_write32(SPORT1_MRCS1,val)
329 #define bfin_write_SPORT1_MRCS2(val) bfin_write32(SPORT1_MRCS2,val)
331 #define bfin_write_SPORT1_MRCS3(val) bfin_write32(SPORT1_MRCS3,val)
337 #define bfin_write_EBIU_AMBCTL0(val) bfin_write32(EBIU_AMBCTL0,val)
339 #define bfin_write_EBIU_AMBCTL1(val) bfin_write32(EBIU_AMBCTL1,val)
341 #define bfin_write_EBIU_SDGCTL(val) bfin_write32(EBIU_SDGCTL,val)
359 #define bfin_write_DMA0_NEXT_DESC_PTR(val) bfin_write32(DMA0_NEXT_DESC_PTR,val)
361 #define bfin_write_DMA0_START_ADDR(val) bfin_write32(DMA0_START_ADDR,val)
371 #define bfin_write_DMA0_CURR_DESC_PTR(val) bfin_write32(DMA0_CURR_DESC_PTR,val)
373 #define bfin_write_DMA0_CURR_ADDR(val) bfin_write32(DMA0_CURR_ADDR,val)
386 #define bfin_write_DMA1_NEXT_DESC_PTR(val) bfin_write32(DMA1_NEXT_DESC_PTR,val)
388 #define bfin_write_DMA1_START_ADDR(val) bfin_write32(DMA1_START_ADDR,val)
398 #define bfin_write_DMA1_CURR_DESC_PTR(val) bfin_write32(DMA1_CURR_DESC_PTR,val)
400 #define bfin_write_DMA1_CURR_ADDR(val) bfin_write32(DMA1_CURR_ADDR,val)
413 #define bfin_write_DMA2_NEXT_DESC_PTR(val) bfin_write32(DMA2_NEXT_DESC_PTR,val)
415 #define bfin_write_DMA2_START_ADDR(val) bfin_write32(DMA2_START_ADDR,val)
425 #define bfin_write_DMA2_CURR_DESC_PTR(val) bfin_write32(DMA2_CURR_DESC_PTR,val)
427 #define bfin_write_DMA2_CURR_ADDR(val) bfin_write32(DMA2_CURR_ADDR,val)
440 #define bfin_write_DMA3_NEXT_DESC_PTR(val) bfin_write32(DMA3_NEXT_DESC_PTR,val)
442 #define bfin_write_DMA3_START_ADDR(val) bfin_write32(DMA3_START_ADDR,val)
452 #define bfin_write_DMA3_CURR_DESC_PTR(val) bfin_write32(DMA3_CURR_DESC_PTR,val)
454 #define bfin_write_DMA3_CURR_ADDR(val) bfin_write32(DMA3_CURR_ADDR,val)
467 #define bfin_write_DMA4_NEXT_DESC_PTR(val) bfin_write32(DMA4_NEXT_DESC_PTR,val)
469 #define bfin_write_DMA4_START_ADDR(val) bfin_write32(DMA4_START_ADDR,val)
479 #define bfin_write_DMA4_CURR_DESC_PTR(val) bfin_write32(DMA4_CURR_DESC_PTR,val)
481 #define bfin_write_DMA4_CURR_ADDR(val) bfin_write32(DMA4_CURR_ADDR,val)
494 #define bfin_write_DMA5_NEXT_DESC_PTR(val) bfin_write32(DMA5_NEXT_DESC_PTR,val)
496 #define bfin_write_DMA5_START_ADDR(val) bfin_write32(DMA5_START_ADDR,val)
506 #define bfin_write_DMA5_CURR_DESC_PTR(val) bfin_write32(DMA5_CURR_DESC_PTR,val)
508 #define bfin_write_DMA5_CURR_ADDR(val) bfin_write32(DMA5_CURR_ADDR,val)
521 #define bfin_write_DMA6_NEXT_DESC_PTR(val) bfin_write32(DMA6_NEXT_DESC_PTR,val)
523 #define bfin_write_DMA6_START_ADDR(val) bfin_write32(DMA6_START_ADDR,val)
533 #define bfin_write_DMA6_CURR_DESC_PTR(val) bfin_write32(DMA6_CURR_DESC_PTR,val)
535 #define bfin_write_DMA6_CURR_ADDR(val) bfin_write32(DMA6_CURR_ADDR,val)
548 #define bfin_write_DMA7_NEXT_DESC_PTR(val) bfin_write32(DMA7_NEXT_DESC_PTR,val)
550 #define bfin_write_DMA7_START_ADDR(val) bfin_write32(DMA7_START_ADDR,val)
560 #define bfin_write_DMA7_CURR_DESC_PTR(val) bfin_write32(DMA7_CURR_DESC_PTR,val)
562 #define bfin_write_DMA7_CURR_ADDR(val) bfin_write32(DMA7_CURR_ADDR,val)
575 #define bfin_write_DMA8_NEXT_DESC_PTR(val) bfin_write32(DMA8_NEXT_DESC_PTR,val)
577 #define bfin_write_DMA8_START_ADDR(val) bfin_write32(DMA8_START_ADDR,val)
587 #define bfin_write_DMA8_CURR_DESC_PTR(val) bfin_write32(DMA8_CURR_DESC_PTR,val)
589 #define bfin_write_DMA8_CURR_ADDR(val) bfin_write32(DMA8_CURR_ADDR,val)
602 #define bfin_write_DMA9_NEXT_DESC_PTR(val) bfin_write32(DMA9_NEXT_DESC_PTR,val)
604 #define bfin_write_DMA9_START_ADDR(val) bfin_write32(DMA9_START_ADDR,val)
614 #define bfin_write_DMA9_CURR_DESC_PTR(val) bfin_write32(DMA9_CURR_DESC_PTR,val)
616 #define bfin_write_DMA9_CURR_ADDR(val) bfin_write32(DMA9_CURR_ADDR,val)
629 #define bfin_write_DMA10_NEXT_DESC_PTR(val) bfin_write32(DMA10_NEXT_DESC_PTR,val)
631 #define bfin_write_DMA10_START_ADDR(val) bfin_write32(DMA10_START_ADDR,val)
641 #define bfin_write_DMA10_CURR_DESC_PTR(val) bfin_write32(DMA10_CURR_DESC_PTR,val)
643 #define bfin_write_DMA10_CURR_ADDR(val) bfin_write32(DMA10_CURR_ADDR,val)
656 #define bfin_write_DMA11_NEXT_DESC_PTR(val) bfin_write32(DMA11_NEXT_DESC_PTR,val)
658 #define bfin_write_DMA11_START_ADDR(val) bfin_write32(DMA11_START_ADDR,val)
668 #define bfin_write_DMA11_CURR_DESC_PTR(val) bfin_write32(DMA11_CURR_DESC_PTR,val)
670 #define bfin_write_DMA11_CURR_ADDR(val) bfin_write32(DMA11_CURR_ADDR,val)
683 #define bfin_write_MDMA_D0_NEXT_DESC_PTR(val) bfin_write32(MDMA_D0_NEXT_DESC_PTR,val)
685 #define bfin_write_MDMA_D0_START_ADDR(val) bfin_write32(MDMA_D0_START_ADDR,val)
695 #define bfin_write_MDMA_D0_CURR_DESC_PTR(val) bfin_write32(MDMA_D0_CURR_DESC_PTR,val)
697 #define bfin_write_MDMA_D0_CURR_ADDR(val) bfin_write32(MDMA_D0_CURR_ADDR,val)
710 #define bfin_write_MDMA_S0_NEXT_DESC_PTR(val) bfin_write32(MDMA_S0_NEXT_DESC_PTR,val)
712 #define bfin_write_MDMA_S0_START_ADDR(val) bfin_write32(MDMA_S0_START_ADDR,val)
722 #define bfin_write_MDMA_S0_CURR_DESC_PTR(val) bfin_write32(MDMA_S0_CURR_DESC_PTR,val)
724 #define bfin_write_MDMA_S0_CURR_ADDR(val) bfin_write32(MDMA_S0_CURR_ADDR,val)
737 #define bfin_write_MDMA_D1_NEXT_DESC_PTR(val) bfin_write32(MDMA_D1_NEXT_DESC_PTR,val)
739 #define bfin_write_MDMA_D1_START_ADDR(val) bfin_write32(MDMA_D1_START_ADDR,val)
749 #define bfin_write_MDMA_D1_CURR_DESC_PTR(val) bfin_write32(MDMA_D1_CURR_DESC_PTR,val)
751 #define bfin_write_MDMA_D1_CURR_ADDR(val) bfin_write32(MDMA_D1_CURR_ADDR,val)
764 #define bfin_write_MDMA_S1_NEXT_DESC_PTR(val) bfin_write32(MDMA_S1_NEXT_DESC_PTR,val)
766 #define bfin_write_MDMA_S1_START_ADDR(val) bfin_write32(MDMA_S1_START_ADDR,val)
776 #define bfin_write_MDMA_S1_CURR_DESC_PTR(val) bfin_write32(MDMA_S1_CURR_DESC_PTR,val)
778 #define bfin_write_MDMA_S1_CURR_ADDR(val) bfin_write32(MDMA_S1_CURR_ADDR,val)