Lines Matching refs:val
17 #define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV,val) argument
20 #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT,val) argument
22 #define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT,val) argument
27 #define bfin_write_SWRST(val) bfin_write16(SWRST,val) argument
29 #define bfin_write_SYSCR(val) bfin_write16(SYSCR,val) argument
31 #define bfin_write_SIC_RVECT(val) bfin_write16(SIC_RVECT,val) argument
33 #define bfin_write_SIC_IMASK0(val) bfin_write32(SIC_IMASK0,val) argument
35 #define bfin_write_SIC_IMASK1(val) bfin_write32(SIC_IMASK1,val) argument
37 #define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0,val) argument
39 #define bfin_write_SIC_IAR1(val) bfin_write32(SIC_IAR1,val) argument
41 #define bfin_write_SIC_IAR2(val) bfin_write32(SIC_IAR2,val) argument
43 #define bfin_write_SIC_IAR3(val) bfin_write32(SIC_IAR3,val) argument
45 #define bfin_write_SIC_IAR4(val) bfin_write32(SIC_IAR4,val) argument
47 #define bfin_write_SIC_IAR5(val) bfin_write32(SIC_IAR5,val) argument
49 #define bfin_write_SIC_IAR6(val) bfin_write32(SIC_IAR6,val) argument
51 #define bfin_write_SIC_IAR7(val) bfin_write32(SIC_IAR7,val) argument
53 #define bfin_write_SIC_ISR0(val) bfin_write32(SIC_ISR0,val) argument
55 #define bfin_write_SIC_ISR1(val) bfin_write32(SIC_ISR1,val) argument
57 #define bfin_write_SIC_IWR0(val) bfin_write32(SIC_IWR0,val) argument
59 #define bfin_write_SIC_IWR1(val) bfin_write32(SIC_IWR1,val) argument
63 #define bfin_write_SICB_SWRST(val) bfin_write16(SICB_SWRST,val) argument
65 #define bfin_write_SICB_SYSCR(val) bfin_write16(SICB_SYSCR,val) argument
67 #define bfin_write_SICB_RVECT(val) bfin_write16(SICB_RVECT,val) argument
69 #define bfin_write_SICB_IMASK0(val) bfin_write32(SICB_IMASK0,val) argument
71 #define bfin_write_SICB_IMASK1(val) bfin_write32(SICB_IMASK1,val) argument
73 #define bfin_write_SICB_IAR0(val) bfin_write32(SICB_IAR0,val) argument
75 #define bfin_write_SICB_IAR1(val) bfin_write32(SICB_IAR1,val) argument
77 #define bfin_write_SICB_IAR2(val) bfin_write32(SICB_IAR2,val) argument
79 #define bfin_write_SICB_IAR3(val) bfin_write32(SICB_IAR3,val) argument
81 #define bfin_write_SICB_IAR4(val) bfin_write32(SICB_IAR4,val) argument
83 #define bfin_write_SICB_IAR5(val) bfin_write32(SICB_IAR5,val) argument
85 #define bfin_write_SICB_IAR6(val) bfin_write32(SICB_IAR6,val) argument
87 #define bfin_write_SICB_IAR7(val) bfin_write32(SICB_IAR7,val) argument
89 #define bfin_write_SICB_ISR0(val) bfin_write32(SICB_ISR0,val) argument
91 #define bfin_write_SICB_ISR1(val) bfin_write32(SICB_ISR1,val) argument
93 #define bfin_write_SICB_IWR0(val) bfin_write32(SICB_IWR0,val) argument
95 #define bfin_write_SICB_IWR1(val) bfin_write32(SICB_IWR1,val) argument
98 #define bfin_write_WDOGA_CTL(val) bfin_write16(WDOGA_CTL,val) argument
100 #define bfin_write_WDOGA_CNT(val) bfin_write32(WDOGA_CNT,val) argument
102 #define bfin_write_WDOGA_STAT(val) bfin_write32(WDOGA_STAT,val) argument
106 #define bfin_write_WDOGB_CTL(val) bfin_write16(WDOGB_CTL,val) argument
108 #define bfin_write_WDOGB_CNT(val) bfin_write32(WDOGB_CNT,val) argument
110 #define bfin_write_WDOGB_STAT(val) bfin_write32(WDOGB_STAT,val) argument
114 #define bfin_write_UART_THR(val) bfin_write16(UART_THR,val) argument
116 #define bfin_write_UART_RBR(val) bfin_write16(UART_RBR,val) argument
118 #define bfin_write_UART_DLL(val) bfin_write16(UART_DLL,val) argument
120 #define bfin_write_UART_IER(val) bfin_write16(UART_IER,val) argument
122 #define bfin_write_UART_DLH(val) bfin_write16(UART_DLH,val) argument
124 #define bfin_write_UART_IIR(val) bfin_write16(UART_IIR,val) argument
126 #define bfin_write_UART_LCR(val) bfin_write16(UART_LCR,val) argument
128 #define bfin_write_UART_MCR(val) bfin_write16(UART_MCR,val) argument
130 #define bfin_write_UART_LSR(val) bfin_write16(UART_LSR,val) argument
132 #define bfin_write_UART_MSR(val) bfin_write16(UART_MSR,val) argument
134 #define bfin_write_UART_SCR(val) bfin_write16(UART_SCR,val) argument
136 #define bfin_write_UART_GCTL(val) bfin_write16(UART_GCTL,val) argument
140 #define bfin_write_SPI_CTL(val) bfin_write16(SPI_CTL,val) argument
142 #define bfin_write_SPI_FLG(val) bfin_write16(SPI_FLG,val) argument
144 #define bfin_write_SPI_STAT(val) bfin_write16(SPI_STAT,val) argument
146 #define bfin_write_SPI_TDBR(val) bfin_write16(SPI_TDBR,val) argument
148 #define bfin_write_SPI_RDBR(val) bfin_write16(SPI_RDBR,val) argument
150 #define bfin_write_SPI_BAUD(val) bfin_write16(SPI_BAUD,val) argument
152 #define bfin_write_SPI_SHADOW(val) bfin_write16(SPI_SHADOW,val) argument
156 #define bfin_write_TIMER0_CONFIG(val) bfin_write16(TIMER0_CONFIG,val) argument
158 #define bfin_write_TIMER0_COUNTER(val) bfin_write32(TIMER0_COUNTER,val) argument
160 #define bfin_write_TIMER0_PERIOD(val) bfin_write32(TIMER0_PERIOD,val) argument
162 #define bfin_write_TIMER0_WIDTH(val) bfin_write32(TIMER0_WIDTH,val) argument
164 #define bfin_write_TIMER1_CONFIG(val) bfin_write16(TIMER1_CONFIG,val) argument
166 #define bfin_write_TIMER1_COUNTER(val) bfin_write32(TIMER1_COUNTER,val) argument
168 #define bfin_write_TIMER1_PERIOD(val) bfin_write32(TIMER1_PERIOD,val) argument
170 #define bfin_write_TIMER1_WIDTH(val) bfin_write32(TIMER1_WIDTH,val) argument
172 #define bfin_write_TIMER2_CONFIG(val) bfin_write16(TIMER2_CONFIG,val) argument
174 #define bfin_write_TIMER2_COUNTER(val) bfin_write32(TIMER2_COUNTER,val) argument
176 #define bfin_write_TIMER2_PERIOD(val) bfin_write32(TIMER2_PERIOD,val) argument
178 #define bfin_write_TIMER2_WIDTH(val) bfin_write32(TIMER2_WIDTH,val) argument
180 #define bfin_write_TIMER3_CONFIG(val) bfin_write16(TIMER3_CONFIG,val) argument
182 #define bfin_write_TIMER3_COUNTER(val) bfin_write32(TIMER3_COUNTER,val) argument
184 #define bfin_write_TIMER3_PERIOD(val) bfin_write32(TIMER3_PERIOD,val) argument
186 #define bfin_write_TIMER3_WIDTH(val) bfin_write32(TIMER3_WIDTH,val) argument
188 #define bfin_write_TIMER4_CONFIG(val) bfin_write16(TIMER4_CONFIG,val) argument
190 #define bfin_write_TIMER4_COUNTER(val) bfin_write32(TIMER4_COUNTER,val) argument
192 #define bfin_write_TIMER4_PERIOD(val) bfin_write32(TIMER4_PERIOD,val) argument
194 #define bfin_write_TIMER4_WIDTH(val) bfin_write32(TIMER4_WIDTH,val) argument
196 #define bfin_write_TIMER5_CONFIG(val) bfin_write16(TIMER5_CONFIG,val) argument
198 #define bfin_write_TIMER5_COUNTER(val) bfin_write32(TIMER5_COUNTER,val) argument
200 #define bfin_write_TIMER5_PERIOD(val) bfin_write32(TIMER5_PERIOD,val) argument
202 #define bfin_write_TIMER5_WIDTH(val) bfin_write32(TIMER5_WIDTH,val) argument
204 #define bfin_write_TIMER6_CONFIG(val) bfin_write16(TIMER6_CONFIG,val) argument
206 #define bfin_write_TIMER6_COUNTER(val) bfin_write32(TIMER6_COUNTER,val) argument
208 #define bfin_write_TIMER6_PERIOD(val) bfin_write32(TIMER6_PERIOD,val) argument
210 #define bfin_write_TIMER6_WIDTH(val) bfin_write32(TIMER6_WIDTH,val) argument
212 #define bfin_write_TIMER7_CONFIG(val) bfin_write16(TIMER7_CONFIG,val) argument
214 #define bfin_write_TIMER7_COUNTER(val) bfin_write32(TIMER7_COUNTER,val) argument
216 #define bfin_write_TIMER7_PERIOD(val) bfin_write32(TIMER7_PERIOD,val) argument
218 #define bfin_write_TIMER7_WIDTH(val) bfin_write32(TIMER7_WIDTH,val) argument
222 #define bfin_write_TMRS8_ENABLE(val) bfin_write16(TMRS8_ENABLE,val) argument
224 #define bfin_write_TMRS8_DISABLE(val) bfin_write16(TMRS8_DISABLE,val) argument
226 #define bfin_write_TMRS8_STATUS(val) bfin_write32(TMRS8_STATUS,val) argument
228 #define bfin_write_TIMER8_CONFIG(val) bfin_write16(TIMER8_CONFIG,val) argument
230 #define bfin_write_TIMER8_COUNTER(val) bfin_write32(TIMER8_COUNTER,val) argument
232 #define bfin_write_TIMER8_PERIOD(val) bfin_write32(TIMER8_PERIOD,val) argument
234 #define bfin_write_TIMER8_WIDTH(val) bfin_write32(TIMER8_WIDTH,val) argument
236 #define bfin_write_TIMER9_CONFIG(val) bfin_write16(TIMER9_CONFIG,val) argument
238 #define bfin_write_TIMER9_COUNTER(val) bfin_write32(TIMER9_COUNTER,val) argument
240 #define bfin_write_TIMER9_PERIOD(val) bfin_write32(TIMER9_PERIOD,val) argument
242 #define bfin_write_TIMER9_WIDTH(val) bfin_write32(TIMER9_WIDTH,val) argument
244 #define bfin_write_TIMER10_CONFIG(val) bfin_write16(TIMER10_CONFIG,val) argument
246 #define bfin_write_TIMER10_COUNTER(val) bfin_write32(TIMER10_COUNTER,val) argument
248 #define bfin_write_TIMER10_PERIOD(val) bfin_write32(TIMER10_PERIOD,val) argument
250 #define bfin_write_TIMER10_WIDTH(val) bfin_write32(TIMER10_WIDTH,val) argument
252 #define bfin_write_TIMER11_CONFIG(val) bfin_write16(TIMER11_CONFIG,val) argument
254 #define bfin_write_TIMER11_COUNTER(val) bfin_write32(TIMER11_COUNTER,val) argument
256 #define bfin_write_TIMER11_PERIOD(val) bfin_write32(TIMER11_PERIOD,val) argument
258 #define bfin_write_TIMER11_WIDTH(val) bfin_write32(TIMER11_WIDTH,val) argument
260 #define bfin_write_TMRS4_ENABLE(val) bfin_write16(TMRS4_ENABLE,val) argument
262 #define bfin_write_TMRS4_DISABLE(val) bfin_write16(TMRS4_DISABLE,val) argument
264 #define bfin_write_TMRS4_STATUS(val) bfin_write32(TMRS4_STATUS,val) argument
268 #define bfin_write_FIO0_FLAG_D(val) bfin_write16(FIO0_FLAG_D,val) argument
270 #define bfin_write_FIO0_FLAG_C(val) bfin_write16(FIO0_FLAG_C,val) argument
272 #define bfin_write_FIO0_FLAG_S(val) bfin_write16(FIO0_FLAG_S,val) argument
274 #define bfin_write_FIO0_FLAG_T(val) bfin_write16(FIO0_FLAG_T,val) argument
276 #define bfin_write_FIO0_MASKA_D(val) bfin_write16(FIO0_MASKA_D,val) argument
278 #define bfin_write_FIO0_MASKA_C(val) bfin_write16(FIO0_MASKA_C,val) argument
280 #define bfin_write_FIO0_MASKA_S(val) bfin_write16(FIO0_MASKA_S,val) argument
282 #define bfin_write_FIO0_MASKA_T(val) bfin_write16(FIO0_MASKA_T,val) argument
284 #define bfin_write_FIO0_MASKB_D(val) bfin_write16(FIO0_MASKB_D,val) argument
286 #define bfin_write_FIO0_MASKB_C(val) bfin_write16(FIO0_MASKB_C,val) argument
288 #define bfin_write_FIO0_MASKB_S(val) bfin_write16(FIO0_MASKB_S,val) argument
290 #define bfin_write_FIO0_MASKB_T(val) bfin_write16(FIO0_MASKB_T,val) argument
292 #define bfin_write_FIO0_DIR(val) bfin_write16(FIO0_DIR,val) argument
294 #define bfin_write_FIO0_POLAR(val) bfin_write16(FIO0_POLAR,val) argument
296 #define bfin_write_FIO0_EDGE(val) bfin_write16(FIO0_EDGE,val) argument
298 #define bfin_write_FIO0_BOTH(val) bfin_write16(FIO0_BOTH,val) argument
300 #define bfin_write_FIO0_INEN(val) bfin_write16(FIO0_INEN,val) argument
303 #define bfin_write_FIO1_FLAG_D(val) bfin_write16(FIO1_FLAG_D,val) argument
305 #define bfin_write_FIO1_FLAG_C(val) bfin_write16(FIO1_FLAG_C,val) argument
307 #define bfin_write_FIO1_FLAG_S(val) bfin_write16(FIO1_FLAG_S,val) argument
309 #define bfin_write_FIO1_FLAG_T(val) bfin_write16(FIO1_FLAG_T,val) argument
311 #define bfin_write_FIO1_MASKA_D(val) bfin_write16(FIO1_MASKA_D,val) argument
313 #define bfin_write_FIO1_MASKA_C(val) bfin_write16(FIO1_MASKA_C,val) argument
315 #define bfin_write_FIO1_MASKA_S(val) bfin_write16(FIO1_MASKA_S,val) argument
317 #define bfin_write_FIO1_MASKA_T(val) bfin_write16(FIO1_MASKA_T,val) argument
319 #define bfin_write_FIO1_MASKB_D(val) bfin_write16(FIO1_MASKB_D,val) argument
321 #define bfin_write_FIO1_MASKB_C(val) bfin_write16(FIO1_MASKB_C,val) argument
323 #define bfin_write_FIO1_MASKB_S(val) bfin_write16(FIO1_MASKB_S,val) argument
325 #define bfin_write_FIO1_MASKB_T(val) bfin_write16(FIO1_MASKB_T,val) argument
327 #define bfin_write_FIO1_DIR(val) bfin_write16(FIO1_DIR,val) argument
329 #define bfin_write_FIO1_POLAR(val) bfin_write16(FIO1_POLAR,val) argument
331 #define bfin_write_FIO1_EDGE(val) bfin_write16(FIO1_EDGE,val) argument
333 #define bfin_write_FIO1_BOTH(val) bfin_write16(FIO1_BOTH,val) argument
335 #define bfin_write_FIO1_INEN(val) bfin_write16(FIO1_INEN,val) argument
338 #define bfin_write_FIO2_FLAG_D(val) bfin_write16(FIO2_FLAG_D,val) argument
340 #define bfin_write_FIO2_FLAG_C(val) bfin_write16(FIO2_FLAG_C,val) argument
342 #define bfin_write_FIO2_FLAG_S(val) bfin_write16(FIO2_FLAG_S,val) argument
344 #define bfin_write_FIO2_FLAG_T(val) bfin_write16(FIO2_FLAG_T,val) argument
346 #define bfin_write_FIO2_MASKA_D(val) bfin_write16(FIO2_MASKA_D,val) argument
348 #define bfin_write_FIO2_MASKA_C(val) bfin_write16(FIO2_MASKA_C,val) argument
350 #define bfin_write_FIO2_MASKA_S(val) bfin_write16(FIO2_MASKA_S,val) argument
352 #define bfin_write_FIO2_MASKA_T(val) bfin_write16(FIO2_MASKA_T,val) argument
354 #define bfin_write_FIO2_MASKB_D(val) bfin_write16(FIO2_MASKB_D,val) argument
356 #define bfin_write_FIO2_MASKB_C(val) bfin_write16(FIO2_MASKB_C,val) argument
358 #define bfin_write_FIO2_MASKB_S(val) bfin_write16(FIO2_MASKB_S,val) argument
360 #define bfin_write_FIO2_MASKB_T(val) bfin_write16(FIO2_MASKB_T,val) argument
362 #define bfin_write_FIO2_DIR(val) bfin_write16(FIO2_DIR,val) argument
364 #define bfin_write_FIO2_POLAR(val) bfin_write16(FIO2_POLAR,val) argument
366 #define bfin_write_FIO2_EDGE(val) bfin_write16(FIO2_EDGE,val) argument
368 #define bfin_write_FIO2_BOTH(val) bfin_write16(FIO2_BOTH,val) argument
370 #define bfin_write_FIO2_INEN(val) bfin_write16(FIO2_INEN,val) argument
373 #define bfin_write_SPORT0_TCR1(val) bfin_write16(SPORT0_TCR1,val) argument
375 #define bfin_write_SPORT0_TCR2(val) bfin_write16(SPORT0_TCR2,val) argument
377 #define bfin_write_SPORT0_TCLKDIV(val) bfin_write16(SPORT0_TCLKDIV,val) argument
379 #define bfin_write_SPORT0_TFSDIV(val) bfin_write16(SPORT0_TFSDIV,val) argument
381 #define bfin_write_SPORT0_TX(val) bfin_write32(SPORT0_TX,val) argument
383 #define bfin_write_SPORT0_RX(val) bfin_write32(SPORT0_RX,val) argument
385 #define bfin_write_SPORT0_TX32(val) bfin_write32(SPORT0_TX,val) argument
387 #define bfin_write_SPORT0_RX32(val) bfin_write32(SPORT0_RX,val) argument
389 #define bfin_write_SPORT0_TX16(val) bfin_write16(SPORT0_TX,val) argument
391 #define bfin_write_SPORT0_RX16(val) bfin_write16(SPORT0_RX,val) argument
393 #define bfin_write_SPORT0_RCR1(val) bfin_write16(SPORT0_RCR1,val) argument
395 #define bfin_write_SPORT0_RCR2(val) bfin_write16(SPORT0_RCR2,val) argument
397 #define bfin_write_SPORT0_RCLKDIV(val) bfin_write16(SPORT0_RCLKDIV,val) argument
399 #define bfin_write_SPORT0_RFSDIV(val) bfin_write16(SPORT0_RFSDIV,val) argument
401 #define bfin_write_SPORT0_STAT(val) bfin_write16(SPORT0_STAT,val) argument
403 #define bfin_write_SPORT0_CHNL(val) bfin_write16(SPORT0_CHNL,val) argument
405 #define bfin_write_SPORT0_MCMC1(val) bfin_write16(SPORT0_MCMC1,val) argument
407 #define bfin_write_SPORT0_MCMC2(val) bfin_write16(SPORT0_MCMC2,val) argument
409 #define bfin_write_SPORT0_MTCS0(val) bfin_write32(SPORT0_MTCS0,val) argument
411 #define bfin_write_SPORT0_MTCS1(val) bfin_write32(SPORT0_MTCS1,val) argument
413 #define bfin_write_SPORT0_MTCS2(val) bfin_write32(SPORT0_MTCS2,val) argument
415 #define bfin_write_SPORT0_MTCS3(val) bfin_write32(SPORT0_MTCS3,val) argument
417 #define bfin_write_SPORT0_MRCS0(val) bfin_write32(SPORT0_MRCS0,val) argument
419 #define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1,val) argument
421 #define bfin_write_SPORT0_MRCS2(val) bfin_write32(SPORT0_MRCS2,val) argument
423 #define bfin_write_SPORT0_MRCS3(val) bfin_write32(SPORT0_MRCS3,val) argument
426 #define bfin_write_SPORT1_TCR1(val) bfin_write16(SPORT1_TCR1,val) argument
428 #define bfin_write_SPORT1_TCR2(val) bfin_write16(SPORT1_TCR2,val) argument
430 #define bfin_write_SPORT1_TCLKDIV(val) bfin_write16(SPORT1_TCLKDIV,val) argument
432 #define bfin_write_SPORT1_TFSDIV(val) bfin_write16(SPORT1_TFSDIV,val) argument
434 #define bfin_write_SPORT1_TX(val) bfin_write32(SPORT1_TX,val) argument
436 #define bfin_write_SPORT1_RX(val) bfin_write32(SPORT1_RX,val) argument
438 #define bfin_write_SPORT1_TX32(val) bfin_write32(SPORT1_TX,val) argument
440 #define bfin_write_SPORT1_RX32(val) bfin_write32(SPORT1_RX,val) argument
442 #define bfin_write_SPORT1_TX16(val) bfin_write16(SPORT1_TX,val) argument
444 #define bfin_write_SPORT1_RX16(val) bfin_write16(SPORT1_RX,val) argument
446 #define bfin_write_SPORT1_RCR1(val) bfin_write16(SPORT1_RCR1,val) argument
448 #define bfin_write_SPORT1_RCR2(val) bfin_write16(SPORT1_RCR2,val) argument
450 #define bfin_write_SPORT1_RCLKDIV(val) bfin_write16(SPORT1_RCLKDIV,val) argument
452 #define bfin_write_SPORT1_RFSDIV(val) bfin_write16(SPORT1_RFSDIV,val) argument
454 #define bfin_write_SPORT1_STAT(val) bfin_write16(SPORT1_STAT,val) argument
456 #define bfin_write_SPORT1_CHNL(val) bfin_write16(SPORT1_CHNL,val) argument
458 #define bfin_write_SPORT1_MCMC1(val) bfin_write16(SPORT1_MCMC1,val) argument
460 #define bfin_write_SPORT1_MCMC2(val) bfin_write16(SPORT1_MCMC2,val) argument
462 #define bfin_write_SPORT1_MTCS0(val) bfin_write32(SPORT1_MTCS0,val) argument
464 #define bfin_write_SPORT1_MTCS1(val) bfin_write32(SPORT1_MTCS1,val) argument
466 #define bfin_write_SPORT1_MTCS2(val) bfin_write32(SPORT1_MTCS2,val) argument
468 #define bfin_write_SPORT1_MTCS3(val) bfin_write32(SPORT1_MTCS3,val) argument
470 #define bfin_write_SPORT1_MRCS0(val) bfin_write32(SPORT1_MRCS0,val) argument
472 #define bfin_write_SPORT1_MRCS1(val) bfin_write32(SPORT1_MRCS1,val) argument
474 #define bfin_write_SPORT1_MRCS2(val) bfin_write32(SPORT1_MRCS2,val) argument
476 #define bfin_write_SPORT1_MRCS3(val) bfin_write32(SPORT1_MRCS3,val) argument
479 #define bfin_write_EBIU_AMGCTL(val) bfin_write16(EBIU_AMGCTL,val) argument
481 #define bfin_write_EBIU_AMBCTL0(val) bfin_write32(EBIU_AMBCTL0,val) argument
483 #define bfin_write_EBIU_AMBCTL1(val) bfin_write32(EBIU_AMBCTL1,val) argument
486 #define bfin_write_EBIU_SDGCTL(val) bfin_write32(EBIU_SDGCTL,val) argument
488 #define bfin_write_EBIU_SDBCTL(val) bfin_write32(EBIU_SDBCTL,val) argument
490 #define bfin_write_EBIU_SDRRC(val) bfin_write16(EBIU_SDRRC,val) argument
492 #define bfin_write_EBIU_SDSTAT(val) bfin_write16(EBIU_SDSTAT,val) argument
495 #define bfin_write_PPI0_CONTROL(val) bfin_write16(PPI0_CONTROL,val) argument
497 #define bfin_write_PPI0_STATUS(val) bfin_write16(PPI0_STATUS,val) argument
500 #define bfin_write_PPI0_COUNT(val) bfin_write16(PPI0_COUNT,val) argument
502 #define bfin_write_PPI0_DELAY(val) bfin_write16(PPI0_DELAY,val) argument
504 #define bfin_write_PPI0_FRAME(val) bfin_write16(PPI0_FRAME,val) argument
507 #define bfin_write_PPI1_CONTROL(val) bfin_write16(PPI1_CONTROL,val) argument
509 #define bfin_write_PPI1_STATUS(val) bfin_write16(PPI1_STATUS,val) argument
512 #define bfin_write_PPI1_COUNT(val) bfin_write16(PPI1_COUNT,val) argument
514 #define bfin_write_PPI1_DELAY(val) bfin_write16(PPI1_DELAY,val) argument
516 #define bfin_write_PPI1_FRAME(val) bfin_write16(PPI1_FRAME,val) argument
519 #define bfin_write_DMAC0_TC_PER(val) bfin_write16(DMAC0_TC_PER,val) argument
521 #define bfin_write_DMAC0_TC_CNT(val) bfin_write16(DMAC0_TC_CNT,val) argument
523 #define bfin_write_DMAC1_TC_PER(val) bfin_write16(DMAC1_TC_PER,val) argument
525 #define bfin_write_DMAC1_TC_CNT(val) bfin_write16(DMAC1_TC_CNT,val) argument
528 #define bfin_write_DMA1_0_CONFIG(val) bfin_write16(DMA1_0_CONFIG,val) argument
530 #define bfin_write_DMA1_0_NEXT_DESC_PTR(val) bfin_write32(DMA1_0_NEXT_DESC_PTR,val) argument
532 #define bfin_write_DMA1_0_START_ADDR(val) bfin_write32(DMA1_0_START_ADDR,val) argument
534 #define bfin_write_DMA1_0_X_COUNT(val) bfin_write16(DMA1_0_X_COUNT,val) argument
536 #define bfin_write_DMA1_0_Y_COUNT(val) bfin_write16(DMA1_0_Y_COUNT,val) argument
538 #define bfin_write_DMA1_0_X_MODIFY(val) bfin_write16(DMA1_0_X_MODIFY,val) argument
540 #define bfin_write_DMA1_0_Y_MODIFY(val) bfin_write16(DMA1_0_Y_MODIFY,val) argument
542 #define bfin_write_DMA1_0_CURR_DESC_PTR(val) bfin_write32(DMA1_0_CURR_DESC_PTR,val) argument
544 #define bfin_write_DMA1_0_CURR_ADDR(val) bfin_write32(DMA1_0_CURR_ADDR,val) argument
546 #define bfin_write_DMA1_0_CURR_X_COUNT(val) bfin_write16(DMA1_0_CURR_X_COUNT,val) argument
548 #define bfin_write_DMA1_0_CURR_Y_COUNT(val) bfin_write16(DMA1_0_CURR_Y_COUNT,val) argument
550 #define bfin_write_DMA1_0_IRQ_STATUS(val) bfin_write16(DMA1_0_IRQ_STATUS,val) argument
552 #define bfin_write_DMA1_0_PERIPHERAL_MAP(val) bfin_write16(DMA1_0_PERIPHERAL_MAP,val) argument
554 #define bfin_write_DMA1_1_CONFIG(val) bfin_write16(DMA1_1_CONFIG,val) argument
556 #define bfin_write_DMA1_1_NEXT_DESC_PTR(val) bfin_write32(DMA1_1_NEXT_DESC_PTR,val) argument
558 #define bfin_write_DMA1_1_START_ADDR(val) bfin_write32(DMA1_1_START_ADDR,val) argument
560 #define bfin_write_DMA1_1_X_COUNT(val) bfin_write16(DMA1_1_X_COUNT,val) argument
562 #define bfin_write_DMA1_1_Y_COUNT(val) bfin_write16(DMA1_1_Y_COUNT,val) argument
564 #define bfin_write_DMA1_1_X_MODIFY(val) bfin_write16(DMA1_1_X_MODIFY,val) argument
566 #define bfin_write_DMA1_1_Y_MODIFY(val) bfin_write16(DMA1_1_Y_MODIFY,val) argument
568 #define bfin_write_DMA1_1_CURR_DESC_PTR(val) bfin_write32(DMA1_1_CURR_DESC_PTR,val) argument
570 #define bfin_write_DMA1_1_CURR_ADDR(val) bfin_write32(DMA1_1_CURR_ADDR,val) argument
572 #define bfin_write_DMA1_1_CURR_X_COUNT(val) bfin_write16(DMA1_1_CURR_X_COUNT,val) argument
574 #define bfin_write_DMA1_1_CURR_Y_COUNT(val) bfin_write16(DMA1_1_CURR_Y_COUNT,val) argument
576 #define bfin_write_DMA1_1_IRQ_STATUS(val) bfin_write16(DMA1_1_IRQ_STATUS,val) argument
578 #define bfin_write_DMA1_1_PERIPHERAL_MAP(val) bfin_write16(DMA1_1_PERIPHERAL_MAP,val) argument
580 #define bfin_write_DMA1_2_CONFIG(val) bfin_write16(DMA1_2_CONFIG,val) argument
582 #define bfin_write_DMA1_2_NEXT_DESC_PTR(val) bfin_write32(DMA1_2_NEXT_DESC_PTR,val) argument
584 #define bfin_write_DMA1_2_START_ADDR(val) bfin_write32(DMA1_2_START_ADDR,val) argument
586 #define bfin_write_DMA1_2_X_COUNT(val) bfin_write16(DMA1_2_X_COUNT,val) argument
588 #define bfin_write_DMA1_2_Y_COUNT(val) bfin_write16(DMA1_2_Y_COUNT,val) argument
590 #define bfin_write_DMA1_2_X_MODIFY(val) bfin_write16(DMA1_2_X_MODIFY,val) argument
592 #define bfin_write_DMA1_2_Y_MODIFY(val) bfin_write16(DMA1_2_Y_MODIFY,val) argument
594 #define bfin_write_DMA1_2_CURR_DESC_PTR(val) bfin_write32(DMA1_2_CURR_DESC_PTR,val) argument
596 #define bfin_write_DMA1_2_CURR_ADDR(val) bfin_write32(DMA1_2_CURR_ADDR,val) argument
598 #define bfin_write_DMA1_2_CURR_X_COUNT(val) bfin_write16(DMA1_2_CURR_X_COUNT,val) argument
600 #define bfin_write_DMA1_2_CURR_Y_COUNT(val) bfin_write16(DMA1_2_CURR_Y_COUNT,val) argument
602 #define bfin_write_DMA1_2_IRQ_STATUS(val) bfin_write16(DMA1_2_IRQ_STATUS,val) argument
604 #define bfin_write_DMA1_2_PERIPHERAL_MAP(val) bfin_write16(DMA1_2_PERIPHERAL_MAP,val) argument
606 #define bfin_write_DMA1_3_CONFIG(val) bfin_write16(DMA1_3_CONFIG,val) argument
608 #define bfin_write_DMA1_3_NEXT_DESC_PTR(val) bfin_write32(DMA1_3_NEXT_DESC_PTR,val) argument
610 #define bfin_write_DMA1_3_START_ADDR(val) bfin_write32(DMA1_3_START_ADDR,val) argument
612 #define bfin_write_DMA1_3_X_COUNT(val) bfin_write16(DMA1_3_X_COUNT,val) argument
614 #define bfin_write_DMA1_3_Y_COUNT(val) bfin_write16(DMA1_3_Y_COUNT,val) argument
616 #define bfin_write_DMA1_3_X_MODIFY(val) bfin_write16(DMA1_3_X_MODIFY,val) argument
618 #define bfin_write_DMA1_3_Y_MODIFY(val) bfin_write16(DMA1_3_Y_MODIFY,val) argument
620 #define bfin_write_DMA1_3_CURR_DESC_PTR(val) bfin_write32(DMA1_3_CURR_DESC_PTR,val) argument
622 #define bfin_write_DMA1_3_CURR_ADDR(val) bfin_write32(DMA1_3_CURR_ADDR,val) argument
624 #define bfin_write_DMA1_3_CURR_X_COUNT(val) bfin_write16(DMA1_3_CURR_X_COUNT,val) argument
626 #define bfin_write_DMA1_3_CURR_Y_COUNT(val) bfin_write16(DMA1_3_CURR_Y_COUNT,val) argument
628 #define bfin_write_DMA1_3_IRQ_STATUS(val) bfin_write16(DMA1_3_IRQ_STATUS,val) argument
630 #define bfin_write_DMA1_3_PERIPHERAL_MAP(val) bfin_write16(DMA1_3_PERIPHERAL_MAP,val) argument
632 #define bfin_write_DMA1_4_CONFIG(val) bfin_write16(DMA1_4_CONFIG,val) argument
634 #define bfin_write_DMA1_4_NEXT_DESC_PTR(val) bfin_write32(DMA1_4_NEXT_DESC_PTR,val) argument
636 #define bfin_write_DMA1_4_START_ADDR(val) bfin_write32(DMA1_4_START_ADDR,val) argument
638 #define bfin_write_DMA1_4_X_COUNT(val) bfin_write16(DMA1_4_X_COUNT,val) argument
640 #define bfin_write_DMA1_4_Y_COUNT(val) bfin_write16(DMA1_4_Y_COUNT,val) argument
642 #define bfin_write_DMA1_4_X_MODIFY(val) bfin_write16(DMA1_4_X_MODIFY,val) argument
644 #define bfin_write_DMA1_4_Y_MODIFY(val) bfin_write16(DMA1_4_Y_MODIFY,val) argument
646 #define bfin_write_DMA1_4_CURR_DESC_PTR(val) bfin_write32(DMA1_4_CURR_DESC_PTR,val) argument
648 #define bfin_write_DMA1_4_CURR_ADDR(val) bfin_write32(DMA1_4_CURR_ADDR,val) argument
650 #define bfin_write_DMA1_4_CURR_X_COUNT(val) bfin_write16(DMA1_4_CURR_X_COUNT,val) argument
652 #define bfin_write_DMA1_4_CURR_Y_COUNT(val) bfin_write16(DMA1_4_CURR_Y_COUNT,val) argument
654 #define bfin_write_DMA1_4_IRQ_STATUS(val) bfin_write16(DMA1_4_IRQ_STATUS,val) argument
656 #define bfin_write_DMA1_4_PERIPHERAL_MAP(val) bfin_write16(DMA1_4_PERIPHERAL_MAP,val) argument
658 #define bfin_write_DMA1_5_CONFIG(val) bfin_write16(DMA1_5_CONFIG,val) argument
660 #define bfin_write_DMA1_5_NEXT_DESC_PTR(val) bfin_write32(DMA1_5_NEXT_DESC_PTR,val) argument
662 #define bfin_write_DMA1_5_START_ADDR(val) bfin_write32(DMA1_5_START_ADDR,val) argument
664 #define bfin_write_DMA1_5_X_COUNT(val) bfin_write16(DMA1_5_X_COUNT,val) argument
666 #define bfin_write_DMA1_5_Y_COUNT(val) bfin_write16(DMA1_5_Y_COUNT,val) argument
668 #define bfin_write_DMA1_5_X_MODIFY(val) bfin_write16(DMA1_5_X_MODIFY,val) argument
670 #define bfin_write_DMA1_5_Y_MODIFY(val) bfin_write16(DMA1_5_Y_MODIFY,val) argument
672 #define bfin_write_DMA1_5_CURR_DESC_PTR(val) bfin_write32(DMA1_5_CURR_DESC_PTR,val) argument
674 #define bfin_write_DMA1_5_CURR_ADDR(val) bfin_write32(DMA1_5_CURR_ADDR,val) argument
676 #define bfin_write_DMA1_5_CURR_X_COUNT(val) bfin_write16(DMA1_5_CURR_X_COUNT,val) argument
678 #define bfin_write_DMA1_5_CURR_Y_COUNT(val) bfin_write16(DMA1_5_CURR_Y_COUNT,val) argument
680 #define bfin_write_DMA1_5_IRQ_STATUS(val) bfin_write16(DMA1_5_IRQ_STATUS,val) argument
682 #define bfin_write_DMA1_5_PERIPHERAL_MAP(val) bfin_write16(DMA1_5_PERIPHERAL_MAP,val) argument
684 #define bfin_write_DMA1_6_CONFIG(val) bfin_write16(DMA1_6_CONFIG,val) argument
686 #define bfin_write_DMA1_6_NEXT_DESC_PTR(val) bfin_write32(DMA1_6_NEXT_DESC_PTR,val) argument
688 #define bfin_write_DMA1_6_START_ADDR(val) bfin_write32(DMA1_6_START_ADDR,val) argument
690 #define bfin_write_DMA1_6_X_COUNT(val) bfin_write16(DMA1_6_X_COUNT,val) argument
692 #define bfin_write_DMA1_6_Y_COUNT(val) bfin_write16(DMA1_6_Y_COUNT,val) argument
694 #define bfin_write_DMA1_6_X_MODIFY(val) bfin_write16(DMA1_6_X_MODIFY,val) argument
696 #define bfin_write_DMA1_6_Y_MODIFY(val) bfin_write16(DMA1_6_Y_MODIFY,val) argument
698 #define bfin_write_DMA1_6_CURR_DESC_PTR(val) bfin_write32(DMA1_6_CURR_DESC_PTR,val) argument
700 #define bfin_write_DMA1_6_CURR_ADDR(val) bfin_write32(DMA1_6_CURR_ADDR,val) argument
702 #define bfin_write_DMA1_6_CURR_X_COUNT(val) bfin_write16(DMA1_6_CURR_X_COUNT,val) argument
704 #define bfin_write_DMA1_6_CURR_Y_COUNT(val) bfin_write16(DMA1_6_CURR_Y_COUNT,val) argument
706 #define bfin_write_DMA1_6_IRQ_STATUS(val) bfin_write16(DMA1_6_IRQ_STATUS,val) argument
708 #define bfin_write_DMA1_6_PERIPHERAL_MAP(val) bfin_write16(DMA1_6_PERIPHERAL_MAP,val) argument
710 #define bfin_write_DMA1_7_CONFIG(val) bfin_write16(DMA1_7_CONFIG,val) argument
712 #define bfin_write_DMA1_7_NEXT_DESC_PTR(val) bfin_write32(DMA1_7_NEXT_DESC_PTR,val) argument
714 #define bfin_write_DMA1_7_START_ADDR(val) bfin_write32(DMA1_7_START_ADDR,val) argument
716 #define bfin_write_DMA1_7_X_COUNT(val) bfin_write16(DMA1_7_X_COUNT,val) argument
718 #define bfin_write_DMA1_7_Y_COUNT(val) bfin_write16(DMA1_7_Y_COUNT,val) argument
720 #define bfin_write_DMA1_7_X_MODIFY(val) bfin_write16(DMA1_7_X_MODIFY,val) argument
722 #define bfin_write_DMA1_7_Y_MODIFY(val) bfin_write16(DMA1_7_Y_MODIFY,val) argument
724 #define bfin_write_DMA1_7_CURR_DESC_PTR(val) bfin_write32(DMA1_7_CURR_DESC_PTR,val) argument
726 #define bfin_write_DMA1_7_CURR_ADDR(val) bfin_write32(DMA1_7_CURR_ADDR,val) argument
728 #define bfin_write_DMA1_7_CURR_X_COUNT(val) bfin_write16(DMA1_7_CURR_X_COUNT,val) argument
730 #define bfin_write_DMA1_7_CURR_Y_COUNT(val) bfin_write16(DMA1_7_CURR_Y_COUNT,val) argument
732 #define bfin_write_DMA1_7_IRQ_STATUS(val) bfin_write16(DMA1_7_IRQ_STATUS,val) argument
734 #define bfin_write_DMA1_7_PERIPHERAL_MAP(val) bfin_write16(DMA1_7_PERIPHERAL_MAP,val) argument
736 #define bfin_write_DMA1_8_CONFIG(val) bfin_write16(DMA1_8_CONFIG,val) argument
738 #define bfin_write_DMA1_8_NEXT_DESC_PTR(val) bfin_write32(DMA1_8_NEXT_DESC_PTR,val) argument
740 #define bfin_write_DMA1_8_START_ADDR(val) bfin_write32(DMA1_8_START_ADDR,val) argument
742 #define bfin_write_DMA1_8_X_COUNT(val) bfin_write16(DMA1_8_X_COUNT,val) argument
744 #define bfin_write_DMA1_8_Y_COUNT(val) bfin_write16(DMA1_8_Y_COUNT,val) argument
746 #define bfin_write_DMA1_8_X_MODIFY(val) bfin_write16(DMA1_8_X_MODIFY,val) argument
748 #define bfin_write_DMA1_8_Y_MODIFY(val) bfin_write16(DMA1_8_Y_MODIFY,val) argument
750 #define bfin_write_DMA1_8_CURR_DESC_PTR(val) bfin_write32(DMA1_8_CURR_DESC_PTR,val) argument
752 #define bfin_write_DMA1_8_CURR_ADDR(val) bfin_write32(DMA1_8_CURR_ADDR,val) argument
754 #define bfin_write_DMA1_8_CURR_X_COUNT(val) bfin_write16(DMA1_8_CURR_X_COUNT,val) argument
756 #define bfin_write_DMA1_8_CURR_Y_COUNT(val) bfin_write16(DMA1_8_CURR_Y_COUNT,val) argument
758 #define bfin_write_DMA1_8_IRQ_STATUS(val) bfin_write16(DMA1_8_IRQ_STATUS,val) argument
760 #define bfin_write_DMA1_8_PERIPHERAL_MAP(val) bfin_write16(DMA1_8_PERIPHERAL_MAP,val) argument
762 #define bfin_write_DMA1_9_CONFIG(val) bfin_write16(DMA1_9_CONFIG,val) argument
764 #define bfin_write_DMA1_9_NEXT_DESC_PTR(val) bfin_write32(DMA1_9_NEXT_DESC_PTR,val) argument
766 #define bfin_write_DMA1_9_START_ADDR(val) bfin_write32(DMA1_9_START_ADDR,val) argument
768 #define bfin_write_DMA1_9_X_COUNT(val) bfin_write16(DMA1_9_X_COUNT,val) argument
770 #define bfin_write_DMA1_9_Y_COUNT(val) bfin_write16(DMA1_9_Y_COUNT,val) argument
772 #define bfin_write_DMA1_9_X_MODIFY(val) bfin_write16(DMA1_9_X_MODIFY,val) argument
774 #define bfin_write_DMA1_9_Y_MODIFY(val) bfin_write16(DMA1_9_Y_MODIFY,val) argument
776 #define bfin_write_DMA1_9_CURR_DESC_PTR(val) bfin_write32(DMA1_9_CURR_DESC_PTR,val) argument
778 #define bfin_write_DMA1_9_CURR_ADDR(val) bfin_write32(DMA1_9_CURR_ADDR,val) argument
780 #define bfin_write_DMA1_9_CURR_X_COUNT(val) bfin_write16(DMA1_9_CURR_X_COUNT,val) argument
782 #define bfin_write_DMA1_9_CURR_Y_COUNT(val) bfin_write16(DMA1_9_CURR_Y_COUNT,val) argument
784 #define bfin_write_DMA1_9_IRQ_STATUS(val) bfin_write16(DMA1_9_IRQ_STATUS,val) argument
786 #define bfin_write_DMA1_9_PERIPHERAL_MAP(val) bfin_write16(DMA1_9_PERIPHERAL_MAP,val) argument
788 #define bfin_write_DMA1_10_CONFIG(val) bfin_write16(DMA1_10_CONFIG,val) argument
790 #define bfin_write_DMA1_10_NEXT_DESC_PTR(val) bfin_write32(DMA1_10_NEXT_DESC_PTR,val) argument
792 #define bfin_write_DMA1_10_START_ADDR(val) bfin_write32(DMA1_10_START_ADDR,val) argument
794 #define bfin_write_DMA1_10_X_COUNT(val) bfin_write16(DMA1_10_X_COUNT,val) argument
796 #define bfin_write_DMA1_10_Y_COUNT(val) bfin_write16(DMA1_10_Y_COUNT,val) argument
798 #define bfin_write_DMA1_10_X_MODIFY(val) bfin_write16(DMA1_10_X_MODIFY,val) argument
800 #define bfin_write_DMA1_10_Y_MODIFY(val) bfin_write16(DMA1_10_Y_MODIFY,val) argument
802 #define bfin_write_DMA1_10_CURR_DESC_PTR(val) bfin_write32(DMA1_10_CURR_DESC_PTR,val) argument
804 #define bfin_write_DMA1_10_CURR_ADDR(val) bfin_write32(DMA1_10_CURR_ADDR,val) argument
806 #define bfin_write_DMA1_10_CURR_X_COUNT(val) bfin_write16(DMA1_10_CURR_X_COUNT,val) argument
808 #define bfin_write_DMA1_10_CURR_Y_COUNT(val) bfin_write16(DMA1_10_CURR_Y_COUNT,val) argument
810 #define bfin_write_DMA1_10_IRQ_STATUS(val) bfin_write16(DMA1_10_IRQ_STATUS,val) argument
812 #define bfin_write_DMA1_10_PERIPHERAL_MAP(val) bfin_write16(DMA1_10_PERIPHERAL_MAP,val) argument
814 #define bfin_write_DMA1_11_CONFIG(val) bfin_write16(DMA1_11_CONFIG,val) argument
816 #define bfin_write_DMA1_11_NEXT_DESC_PTR(val) bfin_write32(DMA1_11_NEXT_DESC_PTR,val) argument
818 #define bfin_write_DMA1_11_START_ADDR(val) bfin_write32(DMA1_11_START_ADDR,val) argument
820 #define bfin_write_DMA1_11_X_COUNT(val) bfin_write16(DMA1_11_X_COUNT,val) argument
822 #define bfin_write_DMA1_11_Y_COUNT(val) bfin_write16(DMA1_11_Y_COUNT,val) argument
824 #define bfin_write_DMA1_11_X_MODIFY(val) bfin_write16(DMA1_11_X_MODIFY,val) argument
826 #define bfin_write_DMA1_11_Y_MODIFY(val) bfin_write16(DMA1_11_Y_MODIFY,val) argument
828 #define bfin_write_DMA1_11_CURR_DESC_PTR(val) bfin_write32(DMA1_11_CURR_DESC_PTR,val) argument
830 #define bfin_write_DMA1_11_CURR_ADDR(val) bfin_write32(DMA1_11_CURR_ADDR,val) argument
832 #define bfin_write_DMA1_11_CURR_X_COUNT(val) bfin_write16(DMA1_11_CURR_X_COUNT,val) argument
834 #define bfin_write_DMA1_11_CURR_Y_COUNT(val) bfin_write16(DMA1_11_CURR_Y_COUNT,val) argument
836 #define bfin_write_DMA1_11_IRQ_STATUS(val) bfin_write16(DMA1_11_IRQ_STATUS,val) argument
838 #define bfin_write_DMA1_11_PERIPHERAL_MAP(val) bfin_write16(DMA1_11_PERIPHERAL_MAP,val) argument
841 #define bfin_write_MDMA_D2_CONFIG(val) bfin_write16(MDMA_D2_CONFIG,val) argument
843 #define bfin_write_MDMA_D2_NEXT_DESC_PTR(val) bfin_write32(MDMA_D2_NEXT_DESC_PTR,val) argument
845 #define bfin_write_MDMA_D2_START_ADDR(val) bfin_write32(MDMA_D2_START_ADDR,val) argument
847 #define bfin_write_MDMA_D2_X_COUNT(val) bfin_write16(MDMA_D2_X_COUNT,val) argument
849 #define bfin_write_MDMA_D2_Y_COUNT(val) bfin_write16(MDMA_D2_Y_COUNT,val) argument
851 #define bfin_write_MDMA_D2_X_MODIFY(val) bfin_write16(MDMA_D2_X_MODIFY,val) argument
853 #define bfin_write_MDMA_D2_Y_MODIFY(val) bfin_write16(MDMA_D2_Y_MODIFY,val) argument
855 #define bfin_write_MDMA_D2_CURR_DESC_PTR(val) bfin_write32(MDMA_D2_CURR_DESC_PTR,val) argument
857 #define bfin_write_MDMA_D2_CURR_ADDR(val) bfin_write32(MDMA_D2_CURR_ADDR,val) argument
859 #define bfin_write_MDMA_D2_CURR_X_COUNT(val) bfin_write16(MDMA_D2_CURR_X_COUNT,val) argument
861 #define bfin_write_MDMA_D2_CURR_Y_COUNT(val) bfin_write16(MDMA_D2_CURR_Y_COUNT,val) argument
863 #define bfin_write_MDMA_D2_IRQ_STATUS(val) bfin_write16(MDMA_D2_IRQ_STATUS,val) argument
865 #define bfin_write_MDMA_D2_PERIPHERAL_MAP(val) bfin_write16(MDMA_D2_PERIPHERAL_MAP,val) argument
867 #define bfin_write_MDMA_S2_CONFIG(val) bfin_write16(MDMA_S2_CONFIG,val) argument
869 #define bfin_write_MDMA_S2_NEXT_DESC_PTR(val) bfin_write32(MDMA_S2_NEXT_DESC_PTR,val) argument
871 #define bfin_write_MDMA_S2_START_ADDR(val) bfin_write32(MDMA_S2_START_ADDR,val) argument
873 #define bfin_write_MDMA_S2_X_COUNT(val) bfin_write16(MDMA_S2_X_COUNT,val) argument
875 #define bfin_write_MDMA_S2_Y_COUNT(val) bfin_write16(MDMA_S2_Y_COUNT,val) argument
877 #define bfin_write_MDMA_S2_X_MODIFY(val) bfin_write16(MDMA_S2_X_MODIFY,val) argument
879 #define bfin_write_MDMA_S2_Y_MODIFY(val) bfin_write16(MDMA_S2_Y_MODIFY,val) argument
881 #define bfin_write_MDMA_S2_CURR_DESC_PTR(val) bfin_write32(MDMA_S2_CURR_DESC_PTR,val) argument
883 #define bfin_write_MDMA_S2_CURR_ADDR(val) bfin_write32(MDMA_S2_CURR_ADDR,val) argument
885 #define bfin_write_MDMA_S2_CURR_X_COUNT(val) bfin_write16(MDMA_S2_CURR_X_COUNT,val) argument
887 #define bfin_write_MDMA_S2_CURR_Y_COUNT(val) bfin_write16(MDMA_S2_CURR_Y_COUNT,val) argument
889 #define bfin_write_MDMA_S2_IRQ_STATUS(val) bfin_write16(MDMA_S2_IRQ_STATUS,val) argument
891 #define bfin_write_MDMA_S2_PERIPHERAL_MAP(val) bfin_write16(MDMA_S2_PERIPHERAL_MAP,val) argument
893 #define bfin_write_MDMA_D3_CONFIG(val) bfin_write16(MDMA_D3_CONFIG,val) argument
895 #define bfin_write_MDMA_D3_NEXT_DESC_PTR(val) bfin_write32(MDMA_D3_NEXT_DESC_PTR,val) argument
897 #define bfin_write_MDMA_D3_START_ADDR(val) bfin_write32(MDMA_D3_START_ADDR,val) argument
899 #define bfin_write_MDMA_D3_X_COUNT(val) bfin_write16(MDMA_D3_X_COUNT,val) argument
901 #define bfin_write_MDMA_D3_Y_COUNT(val) bfin_write16(MDMA_D3_Y_COUNT,val) argument
903 #define bfin_write_MDMA_D3_X_MODIFY(val) bfin_write16(MDMA_D3_X_MODIFY,val) argument
905 #define bfin_write_MDMA_D3_Y_MODIFY(val) bfin_write16(MDMA_D3_Y_MODIFY,val) argument
907 #define bfin_write_MDMA_D3_CURR_DESC_PTR(val) bfin_write32(MDMA_D3_CURR_DESC_PTR,val) argument
909 #define bfin_write_MDMA_D3_CURR_ADDR(val) bfin_write32(MDMA_D3_CURR_ADDR,val) argument
911 #define bfin_write_MDMA_D3_CURR_X_COUNT(val) bfin_write16(MDMA_D3_CURR_X_COUNT,val) argument
913 #define bfin_write_MDMA_D3_CURR_Y_COUNT(val) bfin_write16(MDMA_D3_CURR_Y_COUNT,val) argument
915 #define bfin_write_MDMA_D3_IRQ_STATUS(val) bfin_write16(MDMA_D3_IRQ_STATUS,val) argument
917 #define bfin_write_MDMA_D3_PERIPHERAL_MAP(val) bfin_write16(MDMA_D3_PERIPHERAL_MAP,val) argument
919 #define bfin_write_MDMA_S3_CONFIG(val) bfin_write16(MDMA_S3_CONFIG,val) argument
921 #define bfin_write_MDMA_S3_NEXT_DESC_PTR(val) bfin_write32(MDMA_S3_NEXT_DESC_PTR,val) argument
923 #define bfin_write_MDMA_S3_START_ADDR(val) bfin_write32(MDMA_S3_START_ADDR,val) argument
925 #define bfin_write_MDMA_S3_X_COUNT(val) bfin_write16(MDMA_S3_X_COUNT,val) argument
927 #define bfin_write_MDMA_S3_Y_COUNT(val) bfin_write16(MDMA_S3_Y_COUNT,val) argument
929 #define bfin_write_MDMA_S3_X_MODIFY(val) bfin_write16(MDMA_S3_X_MODIFY,val) argument
931 #define bfin_write_MDMA_S3_Y_MODIFY(val) bfin_write16(MDMA_S3_Y_MODIFY,val) argument
933 #define bfin_write_MDMA_S3_CURR_DESC_PTR(val) bfin_write32(MDMA_S3_CURR_DESC_PTR,val) argument
935 #define bfin_write_MDMA_S3_CURR_ADDR(val) bfin_write32(MDMA_S3_CURR_ADDR,val) argument
937 #define bfin_write_MDMA_S3_CURR_X_COUNT(val) bfin_write16(MDMA_S3_CURR_X_COUNT,val) argument
939 #define bfin_write_MDMA_S3_CURR_Y_COUNT(val) bfin_write16(MDMA_S3_CURR_Y_COUNT,val) argument
941 #define bfin_write_MDMA_S3_IRQ_STATUS(val) bfin_write16(MDMA_S3_IRQ_STATUS,val) argument
943 #define bfin_write_MDMA_S3_PERIPHERAL_MAP(val) bfin_write16(MDMA_S3_PERIPHERAL_MAP,val) argument
946 #define bfin_write_DMA2_0_CONFIG(val) bfin_write16(DMA2_0_CONFIG,val) argument
948 #define bfin_write_DMA2_0_NEXT_DESC_PTR(val) bfin_write32(DMA2_0_NEXT_DESC_PTR,val) argument
950 #define bfin_write_DMA2_0_START_ADDR(val) bfin_write32(DMA2_0_START_ADDR,val) argument
952 #define bfin_write_DMA2_0_X_COUNT(val) bfin_write16(DMA2_0_X_COUNT,val) argument
954 #define bfin_write_DMA2_0_Y_COUNT(val) bfin_write16(DMA2_0_Y_COUNT,val) argument
956 #define bfin_write_DMA2_0_X_MODIFY(val) bfin_write16(DMA2_0_X_MODIFY,val) argument
958 #define bfin_write_DMA2_0_Y_MODIFY(val) bfin_write16(DMA2_0_Y_MODIFY,val) argument
960 #define bfin_write_DMA2_0_CURR_DESC_PTR(val) bfin_write32(DMA2_0_CURR_DESC_PTR,val) argument
962 #define bfin_write_DMA2_0_CURR_ADDR(val) bfin_write32(DMA2_0_CURR_ADDR,val) argument
964 #define bfin_write_DMA2_0_CURR_X_COUNT(val) bfin_write16(DMA2_0_CURR_X_COUNT,val) argument
966 #define bfin_write_DMA2_0_CURR_Y_COUNT(val) bfin_write16(DMA2_0_CURR_Y_COUNT,val) argument
968 #define bfin_write_DMA2_0_IRQ_STATUS(val) bfin_write16(DMA2_0_IRQ_STATUS,val) argument
970 #define bfin_write_DMA2_0_PERIPHERAL_MAP(val) bfin_write16(DMA2_0_PERIPHERAL_MAP,val) argument
972 #define bfin_write_DMA2_1_CONFIG(val) bfin_write16(DMA2_1_CONFIG,val) argument
974 #define bfin_write_DMA2_1_NEXT_DESC_PTR(val) bfin_write32(DMA2_1_NEXT_DESC_PTR,val) argument
976 #define bfin_write_DMA2_1_START_ADDR(val) bfin_write32(DMA2_1_START_ADDR,val) argument
978 #define bfin_write_DMA2_1_X_COUNT(val) bfin_write16(DMA2_1_X_COUNT,val) argument
980 #define bfin_write_DMA2_1_Y_COUNT(val) bfin_write16(DMA2_1_Y_COUNT,val) argument
982 #define bfin_write_DMA2_1_X_MODIFY(val) bfin_write16(DMA2_1_X_MODIFY,val) argument
984 #define bfin_write_DMA2_1_Y_MODIFY(val) bfin_write16(DMA2_1_Y_MODIFY,val) argument
986 #define bfin_write_DMA2_1_CURR_DESC_PTR(val) bfin_write32(DMA2_1_CURR_DESC_PTR,val) argument
988 #define bfin_write_DMA2_1_CURR_ADDR(val) bfin_write32(DMA2_1_CURR_ADDR,val) argument
990 #define bfin_write_DMA2_1_CURR_X_COUNT(val) bfin_write16(DMA2_1_CURR_X_COUNT,val) argument
992 #define bfin_write_DMA2_1_CURR_Y_COUNT(val) bfin_write16(DMA2_1_CURR_Y_COUNT,val) argument
994 #define bfin_write_DMA2_1_IRQ_STATUS(val) bfin_write16(DMA2_1_IRQ_STATUS,val) argument
996 #define bfin_write_DMA2_1_PERIPHERAL_MAP(val) bfin_write16(DMA2_1_PERIPHERAL_MAP,val) argument
998 #define bfin_write_DMA2_2_CONFIG(val) bfin_write16(DMA2_2_CONFIG,val) argument
1000 #define bfin_write_DMA2_2_NEXT_DESC_PTR(val) bfin_write32(DMA2_2_NEXT_DESC_PTR,val) argument
1002 #define bfin_write_DMA2_2_START_ADDR(val) bfin_write32(DMA2_2_START_ADDR,val) argument
1004 #define bfin_write_DMA2_2_X_COUNT(val) bfin_write16(DMA2_2_X_COUNT,val) argument
1006 #define bfin_write_DMA2_2_Y_COUNT(val) bfin_write16(DMA2_2_Y_COUNT,val) argument
1008 #define bfin_write_DMA2_2_X_MODIFY(val) bfin_write16(DMA2_2_X_MODIFY,val) argument
1010 #define bfin_write_DMA2_2_Y_MODIFY(val) bfin_write16(DMA2_2_Y_MODIFY,val) argument
1012 #define bfin_write_DMA2_2_CURR_DESC_PTR(val) bfin_write32(DMA2_2_CURR_DESC_PTR,val) argument
1014 #define bfin_write_DMA2_2_CURR_ADDR(val) bfin_write32(DMA2_2_CURR_ADDR,val) argument
1016 #define bfin_write_DMA2_2_CURR_X_COUNT(val) bfin_write16(DMA2_2_CURR_X_COUNT,val) argument
1018 #define bfin_write_DMA2_2_CURR_Y_COUNT(val) bfin_write16(DMA2_2_CURR_Y_COUNT,val) argument
1020 #define bfin_write_DMA2_2_IRQ_STATUS(val) bfin_write16(DMA2_2_IRQ_STATUS,val) argument
1022 #define bfin_write_DMA2_2_PERIPHERAL_MAP(val) bfin_write16(DMA2_2_PERIPHERAL_MAP,val) argument
1024 #define bfin_write_DMA2_3_CONFIG(val) bfin_write16(DMA2_3_CONFIG,val) argument
1026 #define bfin_write_DMA2_3_NEXT_DESC_PTR(val) bfin_write32(DMA2_3_NEXT_DESC_PTR,val) argument
1028 #define bfin_write_DMA2_3_START_ADDR(val) bfin_write32(DMA2_3_START_ADDR,val) argument
1030 #define bfin_write_DMA2_3_X_COUNT(val) bfin_write16(DMA2_3_X_COUNT,val) argument
1032 #define bfin_write_DMA2_3_Y_COUNT(val) bfin_write16(DMA2_3_Y_COUNT,val) argument
1034 #define bfin_write_DMA2_3_X_MODIFY(val) bfin_write16(DMA2_3_X_MODIFY,val) argument
1036 #define bfin_write_DMA2_3_Y_MODIFY(val) bfin_write16(DMA2_3_Y_MODIFY,val) argument
1038 #define bfin_write_DMA2_3_CURR_DESC_PTR(val) bfin_write32(DMA2_3_CURR_DESC_PTR,val) argument
1040 #define bfin_write_DMA2_3_CURR_ADDR(val) bfin_write32(DMA2_3_CURR_ADDR,val) argument
1042 #define bfin_write_DMA2_3_CURR_X_COUNT(val) bfin_write16(DMA2_3_CURR_X_COUNT,val) argument
1044 #define bfin_write_DMA2_3_CURR_Y_COUNT(val) bfin_write16(DMA2_3_CURR_Y_COUNT,val) argument
1046 #define bfin_write_DMA2_3_IRQ_STATUS(val) bfin_write16(DMA2_3_IRQ_STATUS,val) argument
1048 #define bfin_write_DMA2_3_PERIPHERAL_MAP(val) bfin_write16(DMA2_3_PERIPHERAL_MAP,val) argument
1050 #define bfin_write_DMA2_4_CONFIG(val) bfin_write16(DMA2_4_CONFIG,val) argument
1052 #define bfin_write_DMA2_4_NEXT_DESC_PTR(val) bfin_write32(DMA2_4_NEXT_DESC_PTR,val) argument
1054 #define bfin_write_DMA2_4_START_ADDR(val) bfin_write32(DMA2_4_START_ADDR,val) argument
1056 #define bfin_write_DMA2_4_X_COUNT(val) bfin_write16(DMA2_4_X_COUNT,val) argument
1058 #define bfin_write_DMA2_4_Y_COUNT(val) bfin_write16(DMA2_4_Y_COUNT,val) argument
1060 #define bfin_write_DMA2_4_X_MODIFY(val) bfin_write16(DMA2_4_X_MODIFY,val) argument
1062 #define bfin_write_DMA2_4_Y_MODIFY(val) bfin_write16(DMA2_4_Y_MODIFY,val) argument
1064 #define bfin_write_DMA2_4_CURR_DESC_PTR(val) bfin_write32(DMA2_4_CURR_DESC_PTR,val) argument
1066 #define bfin_write_DMA2_4_CURR_ADDR(val) bfin_write32(DMA2_4_CURR_ADDR,val) argument
1068 #define bfin_write_DMA2_4_CURR_X_COUNT(val) bfin_write16(DMA2_4_CURR_X_COUNT,val) argument
1070 #define bfin_write_DMA2_4_CURR_Y_COUNT(val) bfin_write16(DMA2_4_CURR_Y_COUNT,val) argument
1072 #define bfin_write_DMA2_4_IRQ_STATUS(val) bfin_write16(DMA2_4_IRQ_STATUS,val) argument
1074 #define bfin_write_DMA2_4_PERIPHERAL_MAP(val) bfin_write16(DMA2_4_PERIPHERAL_MAP,val) argument
1076 #define bfin_write_DMA2_5_CONFIG(val) bfin_write16(DMA2_5_CONFIG,val) argument
1078 #define bfin_write_DMA2_5_NEXT_DESC_PTR(val) bfin_write32(DMA2_5_NEXT_DESC_PTR,val) argument
1080 #define bfin_write_DMA2_5_START_ADDR(val) bfin_write32(DMA2_5_START_ADDR,val) argument
1082 #define bfin_write_DMA2_5_X_COUNT(val) bfin_write16(DMA2_5_X_COUNT,val) argument
1084 #define bfin_write_DMA2_5_Y_COUNT(val) bfin_write16(DMA2_5_Y_COUNT,val) argument
1086 #define bfin_write_DMA2_5_X_MODIFY(val) bfin_write16(DMA2_5_X_MODIFY,val) argument
1088 #define bfin_write_DMA2_5_Y_MODIFY(val) bfin_write16(DMA2_5_Y_MODIFY,val) argument
1090 #define bfin_write_DMA2_5_CURR_DESC_PTR(val) bfin_write32(DMA2_5_CURR_DESC_PTR,val) argument
1092 #define bfin_write_DMA2_5_CURR_ADDR(val) bfin_write32(DMA2_5_CURR_ADDR,val) argument
1094 #define bfin_write_DMA2_5_CURR_X_COUNT(val) bfin_write16(DMA2_5_CURR_X_COUNT,val) argument
1096 #define bfin_write_DMA2_5_CURR_Y_COUNT(val) bfin_write16(DMA2_5_CURR_Y_COUNT,val) argument
1098 #define bfin_write_DMA2_5_IRQ_STATUS(val) bfin_write16(DMA2_5_IRQ_STATUS,val) argument
1100 #define bfin_write_DMA2_5_PERIPHERAL_MAP(val) bfin_write16(DMA2_5_PERIPHERAL_MAP,val) argument
1102 #define bfin_write_DMA2_6_CONFIG(val) bfin_write16(DMA2_6_CONFIG,val) argument
1104 #define bfin_write_DMA2_6_NEXT_DESC_PTR(val) bfin_write32(DMA2_6_NEXT_DESC_PTR,val) argument
1106 #define bfin_write_DMA2_6_START_ADDR(val) bfin_write32(DMA2_6_START_ADDR,val) argument
1108 #define bfin_write_DMA2_6_X_COUNT(val) bfin_write16(DMA2_6_X_COUNT,val) argument
1110 #define bfin_write_DMA2_6_Y_COUNT(val) bfin_write16(DMA2_6_Y_COUNT,val) argument
1112 #define bfin_write_DMA2_6_X_MODIFY(val) bfin_write16(DMA2_6_X_MODIFY,val) argument
1114 #define bfin_write_DMA2_6_Y_MODIFY(val) bfin_write16(DMA2_6_Y_MODIFY,val) argument
1116 #define bfin_write_DMA2_6_CURR_DESC_PTR(val) bfin_write32(DMA2_6_CURR_DESC_PTR,val) argument
1118 #define bfin_write_DMA2_6_CURR_ADDR(val) bfin_write32(DMA2_6_CURR_ADDR,val) argument
1120 #define bfin_write_DMA2_6_CURR_X_COUNT(val) bfin_write16(DMA2_6_CURR_X_COUNT,val) argument
1122 #define bfin_write_DMA2_6_CURR_Y_COUNT(val) bfin_write16(DMA2_6_CURR_Y_COUNT,val) argument
1124 #define bfin_write_DMA2_6_IRQ_STATUS(val) bfin_write16(DMA2_6_IRQ_STATUS,val) argument
1126 #define bfin_write_DMA2_6_PERIPHERAL_MAP(val) bfin_write16(DMA2_6_PERIPHERAL_MAP,val) argument
1128 #define bfin_write_DMA2_7_CONFIG(val) bfin_write16(DMA2_7_CONFIG,val) argument
1130 #define bfin_write_DMA2_7_NEXT_DESC_PTR(val) bfin_write32(DMA2_7_NEXT_DESC_PTR,val) argument
1132 #define bfin_write_DMA2_7_START_ADDR(val) bfin_write32(DMA2_7_START_ADDR,val) argument
1134 #define bfin_write_DMA2_7_X_COUNT(val) bfin_write16(DMA2_7_X_COUNT,val) argument
1136 #define bfin_write_DMA2_7_Y_COUNT(val) bfin_write16(DMA2_7_Y_COUNT,val) argument
1138 #define bfin_write_DMA2_7_X_MODIFY(val) bfin_write16(DMA2_7_X_MODIFY,val) argument
1140 #define bfin_write_DMA2_7_Y_MODIFY(val) bfin_write16(DMA2_7_Y_MODIFY,val) argument
1142 #define bfin_write_DMA2_7_CURR_DESC_PTR(val) bfin_write32(DMA2_7_CURR_DESC_PTR,val) argument
1144 #define bfin_write_DMA2_7_CURR_ADDR(val) bfin_write32(DMA2_7_CURR_ADDR,val) argument
1146 #define bfin_write_DMA2_7_CURR_X_COUNT(val) bfin_write16(DMA2_7_CURR_X_COUNT,val) argument
1148 #define bfin_write_DMA2_7_CURR_Y_COUNT(val) bfin_write16(DMA2_7_CURR_Y_COUNT,val) argument
1150 #define bfin_write_DMA2_7_IRQ_STATUS(val) bfin_write16(DMA2_7_IRQ_STATUS,val) argument
1152 #define bfin_write_DMA2_7_PERIPHERAL_MAP(val) bfin_write16(DMA2_7_PERIPHERAL_MAP,val) argument
1154 #define bfin_write_DMA2_8_CONFIG(val) bfin_write16(DMA2_8_CONFIG,val) argument
1156 #define bfin_write_DMA2_8_NEXT_DESC_PTR(val) bfin_write32(DMA2_8_NEXT_DESC_PTR,val) argument
1158 #define bfin_write_DMA2_8_START_ADDR(val) bfin_write32(DMA2_8_START_ADDR,val) argument
1160 #define bfin_write_DMA2_8_X_COUNT(val) bfin_write16(DMA2_8_X_COUNT,val) argument
1162 #define bfin_write_DMA2_8_Y_COUNT(val) bfin_write16(DMA2_8_Y_COUNT,val) argument
1164 #define bfin_write_DMA2_8_X_MODIFY(val) bfin_write16(DMA2_8_X_MODIFY,val) argument
1166 #define bfin_write_DMA2_8_Y_MODIFY(val) bfin_write16(DMA2_8_Y_MODIFY,val) argument
1168 #define bfin_write_DMA2_8_CURR_DESC_PTR(val) bfin_write32(DMA2_8_CURR_DESC_PTR,val) argument
1170 #define bfin_write_DMA2_8_CURR_ADDR(val) bfin_write32(DMA2_8_CURR_ADDR,val) argument
1172 #define bfin_write_DMA2_8_CURR_X_COUNT(val) bfin_write16(DMA2_8_CURR_X_COUNT,val) argument
1174 #define bfin_write_DMA2_8_CURR_Y_COUNT(val) bfin_write16(DMA2_8_CURR_Y_COUNT,val) argument
1176 #define bfin_write_DMA2_8_IRQ_STATUS(val) bfin_write16(DMA2_8_IRQ_STATUS,val) argument
1178 #define bfin_write_DMA2_8_PERIPHERAL_MAP(val) bfin_write16(DMA2_8_PERIPHERAL_MAP,val) argument
1180 #define bfin_write_DMA2_9_CONFIG(val) bfin_write16(DMA2_9_CONFIG,val) argument
1182 #define bfin_write_DMA2_9_NEXT_DESC_PTR(val) bfin_write32(DMA2_9_NEXT_DESC_PTR,val) argument
1184 #define bfin_write_DMA2_9_START_ADDR(val) bfin_write32(DMA2_9_START_ADDR,val) argument
1186 #define bfin_write_DMA2_9_X_COUNT(val) bfin_write16(DMA2_9_X_COUNT,val) argument
1188 #define bfin_write_DMA2_9_Y_COUNT(val) bfin_write16(DMA2_9_Y_COUNT,val) argument
1190 #define bfin_write_DMA2_9_X_MODIFY(val) bfin_write16(DMA2_9_X_MODIFY,val) argument
1192 #define bfin_write_DMA2_9_Y_MODIFY(val) bfin_write16(DMA2_9_Y_MODIFY,val) argument
1194 #define bfin_write_DMA2_9_CURR_DESC_PTR(val) bfin_write32(DMA2_9_CURR_DESC_PTR,val) argument
1196 #define bfin_write_DMA2_9_CURR_ADDR(val) bfin_write32(DMA2_9_CURR_ADDR,val) argument
1198 #define bfin_write_DMA2_9_CURR_X_COUNT(val) bfin_write16(DMA2_9_CURR_X_COUNT,val) argument
1200 #define bfin_write_DMA2_9_CURR_Y_COUNT(val) bfin_write16(DMA2_9_CURR_Y_COUNT,val) argument
1202 #define bfin_write_DMA2_9_IRQ_STATUS(val) bfin_write16(DMA2_9_IRQ_STATUS,val) argument
1204 #define bfin_write_DMA2_9_PERIPHERAL_MAP(val) bfin_write16(DMA2_9_PERIPHERAL_MAP,val) argument
1206 #define bfin_write_DMA2_10_CONFIG(val) bfin_write16(DMA2_10_CONFIG,val) argument
1208 #define bfin_write_DMA2_10_NEXT_DESC_PTR(val) bfin_write32(DMA2_10_NEXT_DESC_PTR,val) argument
1210 #define bfin_write_DMA2_10_START_ADDR(val) bfin_write32(DMA2_10_START_ADDR,val) argument
1212 #define bfin_write_DMA2_10_X_COUNT(val) bfin_write16(DMA2_10_X_COUNT,val) argument
1214 #define bfin_write_DMA2_10_Y_COUNT(val) bfin_write16(DMA2_10_Y_COUNT,val) argument
1216 #define bfin_write_DMA2_10_X_MODIFY(val) bfin_write16(DMA2_10_X_MODIFY,val) argument
1218 #define bfin_write_DMA2_10_Y_MODIFY(val) bfin_write16(DMA2_10_Y_MODIFY,val) argument
1220 #define bfin_write_DMA2_10_CURR_DESC_PTR(val) bfin_write32(DMA2_10_CURR_DESC_PTR,val) argument
1222 #define bfin_write_DMA2_10_CURR_ADDR(val) bfin_write32(DMA2_10_CURR_ADDR,val) argument
1224 #define bfin_write_DMA2_10_CURR_X_COUNT(val) bfin_write16(DMA2_10_CURR_X_COUNT,val) argument
1226 #define bfin_write_DMA2_10_CURR_Y_COUNT(val) bfin_write16(DMA2_10_CURR_Y_COUNT,val) argument
1228 #define bfin_write_DMA2_10_IRQ_STATUS(val) bfin_write16(DMA2_10_IRQ_STATUS,val) argument
1230 #define bfin_write_DMA2_10_PERIPHERAL_MAP(val) bfin_write16(DMA2_10_PERIPHERAL_MAP,val) argument
1232 #define bfin_write_DMA2_11_CONFIG(val) bfin_write16(DMA2_11_CONFIG,val) argument
1234 #define bfin_write_DMA2_11_NEXT_DESC_PTR(val) bfin_write32(DMA2_11_NEXT_DESC_PTR,val) argument
1236 #define bfin_write_DMA2_11_START_ADDR(val) bfin_write32(DMA2_11_START_ADDR,val) argument
1238 #define bfin_write_DMA2_11_X_COUNT(val) bfin_write16(DMA2_11_X_COUNT,val) argument
1240 #define bfin_write_DMA2_11_Y_COUNT(val) bfin_write16(DMA2_11_Y_COUNT,val) argument
1242 #define bfin_write_DMA2_11_X_MODIFY(val) bfin_write16(DMA2_11_X_MODIFY,val) argument
1244 #define bfin_write_DMA2_11_Y_MODIFY(val) bfin_write16(DMA2_11_Y_MODIFY,val) argument
1246 #define bfin_write_DMA2_11_CURR_DESC_PTR(val) bfin_write32(DMA2_11_CURR_DESC_PTR,val) argument
1248 #define bfin_write_DMA2_11_CURR_ADDR(val) bfin_write32(DMA2_11_CURR_ADDR,val) argument
1250 #define bfin_write_DMA2_11_CURR_X_COUNT(val) bfin_write16(DMA2_11_CURR_X_COUNT,val) argument
1252 #define bfin_write_DMA2_11_CURR_Y_COUNT(val) bfin_write16(DMA2_11_CURR_Y_COUNT,val) argument
1254 #define bfin_write_DMA2_11_IRQ_STATUS(val) bfin_write16(DMA2_11_IRQ_STATUS,val) argument
1256 #define bfin_write_DMA2_11_PERIPHERAL_MAP(val) bfin_write16(DMA2_11_PERIPHERAL_MAP,val) argument
1259 #define bfin_write_MDMA_D0_CONFIG(val) bfin_write16(MDMA_D0_CONFIG,val) argument
1261 #define bfin_write_MDMA_D0_NEXT_DESC_PTR(val) bfin_write32(MDMA_D0_NEXT_DESC_PTR,val) argument
1263 #define bfin_write_MDMA_D0_START_ADDR(val) bfin_write32(MDMA_D0_START_ADDR,val) argument
1265 #define bfin_write_MDMA_D0_X_COUNT(val) bfin_write16(MDMA_D0_X_COUNT,val) argument
1267 #define bfin_write_MDMA_D0_Y_COUNT(val) bfin_write16(MDMA_D0_Y_COUNT,val) argument
1269 #define bfin_write_MDMA_D0_X_MODIFY(val) bfin_write16(MDMA_D0_X_MODIFY,val) argument
1271 #define bfin_write_MDMA_D0_Y_MODIFY(val) bfin_write16(MDMA_D0_Y_MODIFY,val) argument
1273 #define bfin_write_MDMA_D0_CURR_DESC_PTR(val) bfin_write32(MDMA_D0_CURR_DESC_PTR,val) argument
1275 #define bfin_write_MDMA_D0_CURR_ADDR(val) bfin_write32(MDMA_D0_CURR_ADDR,val) argument
1277 #define bfin_write_MDMA_D0_CURR_X_COUNT(val) bfin_write16(MDMA_D0_CURR_X_COUNT,val) argument
1279 #define bfin_write_MDMA_D0_CURR_Y_COUNT(val) bfin_write16(MDMA_D0_CURR_Y_COUNT,val) argument
1281 #define bfin_write_MDMA_D0_IRQ_STATUS(val) bfin_write16(MDMA_D0_IRQ_STATUS,val) argument
1283 #define bfin_write_MDMA_D0_PERIPHERAL_MAP(val) bfin_write16(MDMA_D0_PERIPHERAL_MAP,val) argument
1285 #define bfin_write_MDMA_S0_CONFIG(val) bfin_write16(MDMA_S0_CONFIG,val) argument
1287 #define bfin_write_MDMA_S0_NEXT_DESC_PTR(val) bfin_write32(MDMA_S0_NEXT_DESC_PTR,val) argument
1289 #define bfin_write_MDMA_S0_START_ADDR(val) bfin_write32(MDMA_S0_START_ADDR,val) argument
1291 #define bfin_write_MDMA_S0_X_COUNT(val) bfin_write16(MDMA_S0_X_COUNT,val) argument
1293 #define bfin_write_MDMA_S0_Y_COUNT(val) bfin_write16(MDMA_S0_Y_COUNT,val) argument
1295 #define bfin_write_MDMA_S0_X_MODIFY(val) bfin_write16(MDMA_S0_X_MODIFY,val) argument
1297 #define bfin_write_MDMA_S0_Y_MODIFY(val) bfin_write16(MDMA_S0_Y_MODIFY,val) argument
1299 #define bfin_write_MDMA_S0_CURR_DESC_PTR(val) bfin_write32(MDMA_S0_CURR_DESC_PTR,val) argument
1301 #define bfin_write_MDMA_S0_CURR_ADDR(val) bfin_write32(MDMA_S0_CURR_ADDR,val) argument
1303 #define bfin_write_MDMA_S0_CURR_X_COUNT(val) bfin_write16(MDMA_S0_CURR_X_COUNT,val) argument
1305 #define bfin_write_MDMA_S0_CURR_Y_COUNT(val) bfin_write16(MDMA_S0_CURR_Y_COUNT,val) argument
1307 #define bfin_write_MDMA_S0_IRQ_STATUS(val) bfin_write16(MDMA_S0_IRQ_STATUS,val) argument
1309 #define bfin_write_MDMA_S0_PERIPHERAL_MAP(val) bfin_write16(MDMA_S0_PERIPHERAL_MAP,val) argument
1311 #define bfin_write_MDMA_D1_CONFIG(val) bfin_write16(MDMA_D1_CONFIG,val) argument
1313 #define bfin_write_MDMA_D1_NEXT_DESC_PTR(val) bfin_write32(MDMA_D1_NEXT_DESC_PTR,val) argument
1315 #define bfin_write_MDMA_D1_START_ADDR(val) bfin_write32(MDMA_D1_START_ADDR,val) argument
1317 #define bfin_write_MDMA_D1_X_COUNT(val) bfin_write16(MDMA_D1_X_COUNT,val) argument
1319 #define bfin_write_MDMA_D1_Y_COUNT(val) bfin_write16(MDMA_D1_Y_COUNT,val) argument
1321 #define bfin_write_MDMA_D1_X_MODIFY(val) bfin_write16(MDMA_D1_X_MODIFY,val) argument
1323 #define bfin_write_MDMA_D1_Y_MODIFY(val) bfin_write16(MDMA_D1_Y_MODIFY,val) argument
1325 #define bfin_write_MDMA_D1_CURR_DESC_PTR(val) bfin_write32(MDMA_D1_CURR_DESC_PTR,val) argument
1327 #define bfin_write_MDMA_D1_CURR_ADDR(val) bfin_write32(MDMA_D1_CURR_ADDR,val) argument
1329 #define bfin_write_MDMA_D1_CURR_X_COUNT(val) bfin_write16(MDMA_D1_CURR_X_COUNT,val) argument
1331 #define bfin_write_MDMA_D1_CURR_Y_COUNT(val) bfin_write16(MDMA_D1_CURR_Y_COUNT,val) argument
1333 #define bfin_write_MDMA_D1_IRQ_STATUS(val) bfin_write16(MDMA_D1_IRQ_STATUS,val) argument
1335 #define bfin_write_MDMA_D1_PERIPHERAL_MAP(val) bfin_write16(MDMA_D1_PERIPHERAL_MAP,val) argument
1337 #define bfin_write_MDMA_S1_CONFIG(val) bfin_write16(MDMA_S1_CONFIG,val) argument
1339 #define bfin_write_MDMA_S1_NEXT_DESC_PTR(val) bfin_write32(MDMA_S1_NEXT_DESC_PTR,val) argument
1341 #define bfin_write_MDMA_S1_START_ADDR(val) bfin_write32(MDMA_S1_START_ADDR,val) argument
1343 #define bfin_write_MDMA_S1_X_COUNT(val) bfin_write16(MDMA_S1_X_COUNT,val) argument
1345 #define bfin_write_MDMA_S1_Y_COUNT(val) bfin_write16(MDMA_S1_Y_COUNT,val) argument
1347 #define bfin_write_MDMA_S1_X_MODIFY(val) bfin_write16(MDMA_S1_X_MODIFY,val) argument
1349 #define bfin_write_MDMA_S1_Y_MODIFY(val) bfin_write16(MDMA_S1_Y_MODIFY,val) argument
1351 #define bfin_write_MDMA_S1_CURR_DESC_PTR(val) bfin_write32(MDMA_S1_CURR_DESC_PTR,val) argument
1353 #define bfin_write_MDMA_S1_CURR_ADDR(val) bfin_write32(MDMA_S1_CURR_ADDR,val) argument
1355 #define bfin_write_MDMA_S1_CURR_X_COUNT(val) bfin_write16(MDMA_S1_CURR_X_COUNT,val) argument
1357 #define bfin_write_MDMA_S1_CURR_Y_COUNT(val) bfin_write16(MDMA_S1_CURR_Y_COUNT,val) argument
1359 #define bfin_write_MDMA_S1_IRQ_STATUS(val) bfin_write16(MDMA_S1_IRQ_STATUS,val) argument
1361 #define bfin_write_MDMA_S1_PERIPHERAL_MAP(val) bfin_write16(MDMA_S1_PERIPHERAL_MAP,val) argument
1364 #define bfin_write_IMDMA_D0_CONFIG(val) bfin_write16(IMDMA_D0_CONFIG,val) argument
1366 #define bfin_write_IMDMA_D0_NEXT_DESC_PTR(val) bfin_write32(IMDMA_D0_NEXT_DESC_PTR,val) argument
1368 #define bfin_write_IMDMA_D0_START_ADDR(val) bfin_write32(IMDMA_D0_START_ADDR,val) argument
1370 #define bfin_write_IMDMA_D0_X_COUNT(val) bfin_write16(IMDMA_D0_X_COUNT,val) argument
1372 #define bfin_write_IMDMA_D0_Y_COUNT(val) bfin_write16(IMDMA_D0_Y_COUNT,val) argument
1374 #define bfin_write_IMDMA_D0_X_MODIFY(val) bfin_write16(IMDMA_D0_X_MODIFY,val) argument
1376 #define bfin_write_IMDMA_D0_Y_MODIFY(val) bfin_write16(IMDMA_D0_Y_MODIFY,val) argument
1378 #define bfin_write_IMDMA_D0_CURR_DESC_PTR(val) bfin_write32(IMDMA_D0_CURR_DESC_PTR,val) argument
1380 #define bfin_write_IMDMA_D0_CURR_ADDR(val) bfin_write32(IMDMA_D0_CURR_ADDR,val) argument
1382 #define bfin_write_IMDMA_D0_CURR_X_COUNT(val) bfin_write16(IMDMA_D0_CURR_X_COUNT,val) argument
1384 #define bfin_write_IMDMA_D0_CURR_Y_COUNT(val) bfin_write16(IMDMA_D0_CURR_Y_COUNT,val) argument
1386 #define bfin_write_IMDMA_D0_IRQ_STATUS(val) bfin_write16(IMDMA_D0_IRQ_STATUS,val) argument
1388 #define bfin_write_IMDMA_S0_CONFIG(val) bfin_write16(IMDMA_S0_CONFIG,val) argument
1390 #define bfin_write_IMDMA_S0_NEXT_DESC_PTR(val) bfin_write32(IMDMA_S0_NEXT_DESC_PTR,val) argument
1392 #define bfin_write_IMDMA_S0_START_ADDR(val) bfin_write32(IMDMA_S0_START_ADDR,val) argument
1394 #define bfin_write_IMDMA_S0_X_COUNT(val) bfin_write16(IMDMA_S0_X_COUNT,val) argument
1396 #define bfin_write_IMDMA_S0_Y_COUNT(val) bfin_write16(IMDMA_S0_Y_COUNT,val) argument
1398 #define bfin_write_IMDMA_S0_X_MODIFY(val) bfin_write16(IMDMA_S0_X_MODIFY,val) argument
1400 #define bfin_write_IMDMA_S0_Y_MODIFY(val) bfin_write16(IMDMA_S0_Y_MODIFY,val) argument
1402 #define bfin_write_IMDMA_S0_CURR_DESC_PTR(val) bfin_write32(IMDMA_S0_CURR_DESC_PTR,val) argument
1404 #define bfin_write_IMDMA_S0_CURR_ADDR(val) bfin_write32(IMDMA_S0_CURR_ADDR,val) argument
1406 #define bfin_write_IMDMA_S0_CURR_X_COUNT(val) bfin_write16(IMDMA_S0_CURR_X_COUNT,val) argument
1408 #define bfin_write_IMDMA_S0_CURR_Y_COUNT(val) bfin_write16(IMDMA_S0_CURR_Y_COUNT,val) argument
1410 #define bfin_write_IMDMA_S0_IRQ_STATUS(val) bfin_write16(IMDMA_S0_IRQ_STATUS,val) argument
1412 #define bfin_write_IMDMA_D1_CONFIG(val) bfin_write16(IMDMA_D1_CONFIG,val) argument
1414 #define bfin_write_IMDMA_D1_NEXT_DESC_PTR(val) bfin_write32(IMDMA_D1_NEXT_DESC_PTR,val) argument
1416 #define bfin_write_IMDMA_D1_START_ADDR(val) bfin_write32(IMDMA_D1_START_ADDR,val) argument
1418 #define bfin_write_IMDMA_D1_X_COUNT(val) bfin_write16(IMDMA_D1_X_COUNT,val) argument
1420 #define bfin_write_IMDMA_D1_Y_COUNT(val) bfin_write16(IMDMA_D1_Y_COUNT,val) argument
1422 #define bfin_write_IMDMA_D1_X_MODIFY(val) bfin_write16(IMDMA_D1_X_MODIFY,val) argument
1424 #define bfin_write_IMDMA_D1_Y_MODIFY(val) bfin_write16(IMDMA_D1_Y_MODIFY,val) argument
1426 #define bfin_write_IMDMA_D1_CURR_DESC_PTR(val) bfin_write32(IMDMA_D1_CURR_DESC_PTR,val) argument
1428 #define bfin_write_IMDMA_D1_CURR_ADDR(val) bfin_write32(IMDMA_D1_CURR_ADDR,val) argument
1430 #define bfin_write_IMDMA_D1_CURR_X_COUNT(val) bfin_write16(IMDMA_D1_CURR_X_COUNT,val) argument
1432 #define bfin_write_IMDMA_D1_CURR_Y_COUNT(val) bfin_write16(IMDMA_D1_CURR_Y_COUNT,val) argument
1434 #define bfin_write_IMDMA_D1_IRQ_STATUS(val) bfin_write16(IMDMA_D1_IRQ_STATUS,val) argument
1436 #define bfin_write_IMDMA_S1_CONFIG(val) bfin_write16(IMDMA_S1_CONFIG,val) argument
1438 #define bfin_write_IMDMA_S1_NEXT_DESC_PTR(val) bfin_write32(IMDMA_S1_NEXT_DESC_PTR,val) argument
1440 #define bfin_write_IMDMA_S1_START_ADDR(val) bfin_write32(IMDMA_S1_START_ADDR,val) argument
1442 #define bfin_write_IMDMA_S1_X_COUNT(val) bfin_write16(IMDMA_S1_X_COUNT,val) argument
1444 #define bfin_write_IMDMA_S1_Y_COUNT(val) bfin_write16(IMDMA_S1_Y_COUNT,val) argument
1446 #define bfin_write_IMDMA_S1_X_MODIFY(val) bfin_write16(IMDMA_S1_X_MODIFY,val) argument
1448 #define bfin_write_IMDMA_S1_Y_MODIFY(val) bfin_write16(IMDMA_S1_Y_MODIFY,val) argument
1450 #define bfin_write_IMDMA_S1_CURR_DESC_PTR(val) bfin_write32(IMDMA_S1_CURR_DESC_PTR,val) argument
1452 #define bfin_write_IMDMA_S1_CURR_ADDR(val) bfin_write32(IMDMA_S1_CURR_ADDR,val) argument
1454 #define bfin_write_IMDMA_S1_CURR_X_COUNT(val) bfin_write16(IMDMA_S1_CURR_X_COUNT,val) argument
1456 #define bfin_write_IMDMA_S1_CURR_Y_COUNT(val) bfin_write16(IMDMA_S1_CURR_Y_COUNT,val) argument
1458 #define bfin_write_IMDMA_S1_IRQ_STATUS(val) bfin_write16(IMDMA_S1_IRQ_STATUS,val) argument