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Lines Matching refs:ioaddr

32 	const unsigned long	ioaddr;		/* DMA controller regs addr */  member
60 .ioaddr = 0xfe000900,
68 .ioaddr = 0xfe000980,
75 .ioaddr = 0xfe000a00,
82 .ioaddr = 0xfe000a80,
88 .ioaddr = 0xfe001000,
94 .ioaddr = 0xfe001080,
100 .ioaddr = 0xfe001100,
106 .ioaddr = 0xfe001180,
130 __get_DMAC(channel->ioaddr, CSTR), in dma_irq_handler()
262 unsigned long ioaddr = frv_dma_channels[dma].ioaddr; in frv_dma_config() local
264 ___set_DMAC(ioaddr, CCFR, ccfr); in frv_dma_config()
265 ___set_DMAC(ioaddr, CCTR, cctr); in frv_dma_config()
266 ___set_DMAC(ioaddr, APR, apr); in frv_dma_config()
281 unsigned long ioaddr = frv_dma_channels[dma].ioaddr; in frv_dma_start() local
283 ___set_DMAC(ioaddr, SBA, sba); in frv_dma_start()
284 ___set_DMAC(ioaddr, DBA, dba); in frv_dma_start()
285 ___set_DMAC(ioaddr, PIX, pix); in frv_dma_start()
286 ___set_DMAC(ioaddr, SIX, six); in frv_dma_start()
287 ___set_DMAC(ioaddr, BCL, bcl); in frv_dma_start()
288 ___set_DMAC(ioaddr, CSTR, 0); in frv_dma_start()
291 __set_DMAC(ioaddr, CCTR, __get_DMAC(ioaddr, CCTR) | DMAC_CCTRx_ACT); in frv_dma_start()
304 unsigned long ioaddr = frv_dma_channels[dma].ioaddr; in frv_dma_restart_circular() local
306 ___set_DMAC(ioaddr, SIX, six); in frv_dma_restart_circular()
307 ___set_DMAC(ioaddr, CSTR, __get_DMAC(ioaddr, CSTR) & ~DMAC_CSTRx_CE); in frv_dma_restart_circular()
310 __set_DMAC(ioaddr, CCTR, __get_DMAC(ioaddr, CCTR) | DMAC_CCTRx_ACT); in frv_dma_restart_circular()
323 unsigned long ioaddr = frv_dma_channels[dma].ioaddr; in frv_dma_stop() local
326 ___set_DMAC(ioaddr, CSTR, 0); in frv_dma_stop()
327 cctr = __get_DMAC(ioaddr, CCTR); in frv_dma_stop()
330 __set_DMAC(ioaddr, CCTR, cctr); in frv_dma_stop()
331 __set_DMAC(ioaddr, BCL, 0); in frv_dma_stop()
343 unsigned long ioaddr = frv_dma_channels[dma].ioaddr; in is_frv_dma_interrupting() local
345 return __get_DMAC(ioaddr, CSTR) & (1 << 23); in is_frv_dma_interrupting()
357 unsigned long ioaddr = frv_dma_channels[dma].ioaddr; in frv_dma_dump() local
360 cstr = __get_DMAC(ioaddr, CSTR); in frv_dma_dump()
361 pix = __get_DMAC(ioaddr, PIX); in frv_dma_dump()
362 six = __get_DMAC(ioaddr, SIX); in frv_dma_dump()
363 bcl = __get_DMAC(ioaddr, BCL); in frv_dma_dump()
380 unsigned long ioaddr; in frv_dma_pause_all() local
392 ioaddr = channel->ioaddr; in frv_dma_pause_all()
393 cctr = __get_DMAC(ioaddr, CCTR); in frv_dma_pause_all()
396 __set_DMAC(ioaddr, CCTR, cctr); in frv_dma_pause_all()
399 cstr = __get_DMAC(ioaddr, CSTR); in frv_dma_pause_all()
421 unsigned long ioaddr; in frv_dma_resume_all() local
431 ioaddr = channel->ioaddr; in frv_dma_resume_all()
432 cstr = __get_DMAC(ioaddr, CSTR); in frv_dma_resume_all()
434 __set_DMAC(ioaddr, CSTR, cstr); in frv_dma_resume_all()
436 cctr = __get_DMAC(ioaddr, CCTR); in frv_dma_resume_all()
438 __set_DMAC(ioaddr, CCTR, cctr); in frv_dma_resume_all()
456 unsigned long ioaddr = frv_dma_channels[dma].ioaddr; in frv_dma_status_clear() local
458 ___set_DMAC(ioaddr, CSTR, 0); in frv_dma_status_clear()
460 cctr = __get_DMAC(ioaddr, CCTR); in frv_dma_status_clear()