31 #define TX4938_DMA_REG(ch)	(TX4938_REG_BASE + 0xb000 + (ch) * 0x800)  argument
35 #define TX4938_TMR_REG(ch)	((TX4938_REG_BASE + 0xf000) + (ch) * 0x100)  argument
37 #define TX4938_SIO_REG(ch)	((TX4938_REG_BASE + 0xf300) + (ch) * 0x100)  argument
73 #define TX4938_IR_DMA(ch, n)	((ch ? 27 : 10) + (n)) /* 10-13, 27-30 */  argument
147 #define TX4938_PCFG_SDCLKEN(ch) (0x00800000<<(ch))  argument
149 #define TX4938_PCFG_PCICLKEN(ch)	(0x00010000<<(ch))  argument
200 #define TX4938_DMA_MCR_EIS(ch)	(0x10000000<<(ch))  argument
201 #define TX4938_DMA_MCR_DIS(ch)	(0x01000000<<(ch))  argument
203 #define TX4938_DMA_MCR_FIFUM(ch)	(0x00000008<<(ch))  argument
270 #define TX4938_SDRAMC_CR(ch)	TX4927_SDRAMC_CR(ch)  argument
271 #define TX4938_SDRAMC_BA(ch)	TX4927_SDRAMC_BA(ch)  argument
272 #define TX4938_SDRAMC_SIZE(ch)	TX4927_SDRAMC_SIZE(ch)  argument
274 #define TX4938_EBUSC_CR(ch)	TX4927_EBUSC_CR(ch)  argument
275 #define TX4938_EBUSC_BA(ch)	TX4927_EBUSC_BA(ch)  argument
276 #define TX4938_EBUSC_SIZE(ch)	TX4927_EBUSC_SIZE(ch)  argument
277 #define TX4938_EBUSC_WIDTH(ch)	TX4927_EBUSC_WIDTH(ch)  argument