Lines Matching refs:VCPU_GPR
61 stw r3, VCPU_GPR(R3)(r4)
62 stw r5, VCPU_GPR(R5)(r4)
63 stw r6, VCPU_GPR(R6)(r4)
66 stw r3, VCPU_GPR(R4)(r4)
152 stw r7, VCPU_GPR(R7)(r4)
153 stw r8, VCPU_GPR(R8)(r4)
154 stw r9, VCPU_GPR(R9)(r4)
184 stw r15, VCPU_GPR(R15)(r4)
185 stw r16, VCPU_GPR(R16)(r4)
186 stw r17, VCPU_GPR(R17)(r4)
187 stw r18, VCPU_GPR(R18)(r4)
188 stw r19, VCPU_GPR(R19)(r4)
189 stw r20, VCPU_GPR(R20)(r4)
190 stw r21, VCPU_GPR(R21)(r4)
191 stw r22, VCPU_GPR(R22)(r4)
192 stw r23, VCPU_GPR(R23)(r4)
193 stw r24, VCPU_GPR(R24)(r4)
194 stw r25, VCPU_GPR(R25)(r4)
195 stw r26, VCPU_GPR(R26)(r4)
196 stw r27, VCPU_GPR(R27)(r4)
197 stw r28, VCPU_GPR(R28)(r4)
198 stw r29, VCPU_GPR(R29)(r4)
199 stw r30, VCPU_GPR(R30)(r4)
200 stw r31, VCPU_GPR(R31)(r4)
218 stw r0, VCPU_GPR(R0)(r4)
219 stw r1, VCPU_GPR(R1)(r4)
220 stw r2, VCPU_GPR(R2)(r4)
221 stw r10, VCPU_GPR(R10)(r4)
222 stw r11, VCPU_GPR(R11)(r4)
223 stw r12, VCPU_GPR(R12)(r4)
224 stw r13, VCPU_GPR(R13)(r4)
225 stw r14, VCPU_GPR(R14)(r4) /* We need a NV GPR below. */
259 lwz r14, VCPU_GPR(R14)(r4)
264 lwz r15, VCPU_GPR(R15)(r4)
265 lwz r16, VCPU_GPR(R16)(r4)
266 lwz r17, VCPU_GPR(R17)(r4)
267 lwz r18, VCPU_GPR(R18)(r4)
268 lwz r19, VCPU_GPR(R19)(r4)
269 lwz r20, VCPU_GPR(R20)(r4)
270 lwz r21, VCPU_GPR(R21)(r4)
271 lwz r22, VCPU_GPR(R22)(r4)
272 lwz r23, VCPU_GPR(R23)(r4)
273 lwz r24, VCPU_GPR(R24)(r4)
274 lwz r25, VCPU_GPR(R25)(r4)
275 lwz r26, VCPU_GPR(R26)(r4)
276 lwz r27, VCPU_GPR(R27)(r4)
277 lwz r28, VCPU_GPR(R28)(r4)
278 lwz r29, VCPU_GPR(R29)(r4)
279 lwz r30, VCPU_GPR(R30)(r4)
280 lwz r31, VCPU_GPR(R31)(r4)
302 stw r15, VCPU_GPR(R15)(r4)
303 stw r16, VCPU_GPR(R16)(r4)
304 stw r17, VCPU_GPR(R17)(r4)
305 stw r18, VCPU_GPR(R18)(r4)
306 stw r19, VCPU_GPR(R19)(r4)
307 stw r20, VCPU_GPR(R20)(r4)
308 stw r21, VCPU_GPR(R21)(r4)
309 stw r22, VCPU_GPR(R22)(r4)
310 stw r23, VCPU_GPR(R23)(r4)
311 stw r24, VCPU_GPR(R24)(r4)
312 stw r25, VCPU_GPR(R25)(r4)
313 stw r26, VCPU_GPR(R26)(r4)
314 stw r27, VCPU_GPR(R27)(r4)
315 stw r28, VCPU_GPR(R28)(r4)
316 stw r29, VCPU_GPR(R29)(r4)
317 stw r30, VCPU_GPR(R30)(r4)
318 stw r31, VCPU_GPR(R31)(r4)
386 lwz r14, VCPU_GPR(R14)(r4)
387 lwz r15, VCPU_GPR(R15)(r4)
388 lwz r16, VCPU_GPR(R16)(r4)
389 lwz r17, VCPU_GPR(R17)(r4)
390 lwz r18, VCPU_GPR(R18)(r4)
391 lwz r19, VCPU_GPR(R19)(r4)
392 lwz r20, VCPU_GPR(R20)(r4)
393 lwz r21, VCPU_GPR(R21)(r4)
394 lwz r22, VCPU_GPR(R22)(r4)
395 lwz r23, VCPU_GPR(R23)(r4)
396 lwz r24, VCPU_GPR(R24)(r4)
397 lwz r25, VCPU_GPR(R25)(r4)
398 lwz r26, VCPU_GPR(R26)(r4)
399 lwz r27, VCPU_GPR(R27)(r4)
400 lwz r28, VCPU_GPR(R28)(r4)
401 lwz r29, VCPU_GPR(R29)(r4)
402 lwz r30, VCPU_GPR(R30)(r4)
403 lwz r31, VCPU_GPR(R31)(r4)
427 lwz r0, VCPU_GPR(R0)(r4)
428 lwz r2, VCPU_GPR(R2)(r4)
429 lwz r9, VCPU_GPR(R9)(r4)
430 lwz r10, VCPU_GPR(R10)(r4)
431 lwz r11, VCPU_GPR(R11)(r4)
432 lwz r12, VCPU_GPR(R12)(r4)
433 lwz r13, VCPU_GPR(R13)(r4)
449 lwz r1, VCPU_GPR(R1)(r4)
487 lwz r5, VCPU_GPR(R5)(r4)
488 lwz r6, VCPU_GPR(R6)(r4)
489 lwz r7, VCPU_GPR(R7)(r4)
490 lwz r8, VCPU_GPR(R8)(r4)
499 lwz r3, VCPU_GPR(R3)(r4)
500 lwz r4, VCPU_GPR(R4)(r4)