Lines Matching refs:mbase
1242 void __iomem *mbase; in ppc460sx_pciex_check_link() local
1247 mbase = ioremap(port->cfg_space.start + 0x10000000, 0x1000); in ppc460sx_pciex_check_link()
1248 if (mbase == NULL) { in ppc460sx_pciex_check_link()
1254 while (attempt && (0 == (in_le32(mbase + PECFG_460SX_DLLSTA) in ppc460sx_pciex_check_link()
1262 iounmap(mbase); in ppc460sx_pciex_check_link()
1382 void __iomem *mbase = ioremap(port->cfg_space.start + 0x10000000, in ppc_476fpe_pciex_check_link() local
1387 if (mbase == NULL) { in ppc_476fpe_pciex_check_link()
1394 val = in_le32(mbase + PECFG_TLDLP); in ppc_476fpe_pciex_check_link()
1407 iounmap(mbase); in ppc_476fpe_pciex_check_link()
1720 void __iomem *mbase, in ppc4xx_setup_one_pciex_POM() argument
1748 out_le32(mbase + PECFG_POM0LAH, pciah); in ppc4xx_setup_one_pciex_POM()
1749 out_le32(mbase + PECFG_POM0LAL, pcial); in ppc4xx_setup_one_pciex_POM()
1771 out_le32(mbase + PECFG_POM1LAH, pciah); in ppc4xx_setup_one_pciex_POM()
1772 out_le32(mbase + PECFG_POM1LAL, pcial); in ppc4xx_setup_one_pciex_POM()
1780 out_le32(mbase + PECFG_POM2LAH, pciah); in ppc4xx_setup_one_pciex_POM()
1781 out_le32(mbase + PECFG_POM2LAL, pcial); in ppc4xx_setup_one_pciex_POM()
1797 void __iomem *mbase) in ppc4xx_configure_pciex_POMs() argument
1816 if (ppc4xx_setup_one_pciex_POM(port, hose, mbase, in ppc4xx_configure_pciex_POMs()
1834 if (ppc4xx_setup_one_pciex_POM(port, hose, mbase, in ppc4xx_configure_pciex_POMs()
1844 ppc4xx_setup_one_pciex_POM(port, hose, mbase, in ppc4xx_configure_pciex_POMs()
1851 void __iomem *mbase, in ppc4xx_configure_pciex_PIMs() argument
1870 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa)); in ppc4xx_configure_pciex_PIMs()
1871 out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa) | in ppc4xx_configure_pciex_PIMs()
1875 out_le32(mbase + PECFG_BAR1MPA, 0); in ppc4xx_configure_pciex_PIMs()
1876 out_le32(mbase + PECFG_BAR2HMPA, 0); in ppc4xx_configure_pciex_PIMs()
1877 out_le32(mbase + PECFG_BAR2LMPA, 0); in ppc4xx_configure_pciex_PIMs()
1879 out_le32(mbase + PECFG_PIM01SAH, RES_TO_U32_HIGH(sa)); in ppc4xx_configure_pciex_PIMs()
1880 out_le32(mbase + PECFG_PIM01SAL, RES_TO_U32_LOW(sa)); in ppc4xx_configure_pciex_PIMs()
1882 out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(ep_addr)); in ppc4xx_configure_pciex_PIMs()
1883 out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(ep_addr)); in ppc4xx_configure_pciex_PIMs()
1897 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa)); in ppc4xx_configure_pciex_PIMs()
1898 out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa)); in ppc4xx_configure_pciex_PIMs()
1903 out_le32(mbase + PECFG_PIM0LAL, 0x00000000); in ppc4xx_configure_pciex_PIMs()
1904 out_le32(mbase + PECFG_PIM0LAH, 0x00000000); in ppc4xx_configure_pciex_PIMs()
1905 out_le32(mbase + PECFG_PIM1LAL, 0x00000000); in ppc4xx_configure_pciex_PIMs()
1906 out_le32(mbase + PECFG_PIM1LAH, 0x00000000); in ppc4xx_configure_pciex_PIMs()
1907 out_le32(mbase + PECFG_PIM01SAH, 0xffff0000); in ppc4xx_configure_pciex_PIMs()
1908 out_le32(mbase + PECFG_PIM01SAL, 0x00000000); in ppc4xx_configure_pciex_PIMs()
1910 out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(res->start)); in ppc4xx_configure_pciex_PIMs()
1911 out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(res->start)); in ppc4xx_configure_pciex_PIMs()
1915 out_le32(mbase + PECFG_PIMEN, 0x1); in ppc4xx_configure_pciex_PIMs()
1918 out_le16(mbase + PCI_COMMAND, in ppc4xx_configure_pciex_PIMs()
1919 in_le16(mbase + PCI_COMMAND) | in ppc4xx_configure_pciex_PIMs()
1929 void __iomem *mbase = NULL, *cfg_data = NULL; in ppc4xx_pciex_port_setup_hose() local
1983 mbase = ioremap(port->cfg_space.start + 0x10000000, 0x1000); in ppc4xx_pciex_port_setup_hose()
1984 if (mbase == NULL) { in ppc4xx_pciex_port_setup_hose()
1989 hose->cfg_addr = mbase; in ppc4xx_pciex_port_setup_hose()
1999 mbase = (void __iomem *)hose->cfg_addr; in ppc4xx_pciex_port_setup_hose()
2005 out_8(mbase + PCI_PRIMARY_BUS, hose->first_busno); in ppc4xx_pciex_port_setup_hose()
2006 out_8(mbase + PCI_SECONDARY_BUS, hose->first_busno + 1); in ppc4xx_pciex_port_setup_hose()
2007 out_8(mbase + PCI_SUBORDINATE_BUS, hose->last_busno); in ppc4xx_pciex_port_setup_hose()
2013 out_le32(mbase + PECFG_PIMEN, 0); in ppc4xx_pciex_port_setup_hose()
2019 if (ppc4xx_parse_dma_ranges(hose, mbase, &dma_window) != 0) in ppc4xx_pciex_port_setup_hose()
2023 ppc4xx_configure_pciex_POMs(port, hose, mbase); in ppc4xx_pciex_port_setup_hose()
2026 ppc4xx_configure_pciex_PIMs(port, hose, mbase, &dma_window); in ppc4xx_pciex_port_setup_hose()
2045 out_le16(mbase + 0x200, val); in ppc4xx_pciex_port_setup_hose()
2056 out_le16(mbase + 0x202, val); in ppc4xx_pciex_port_setup_hose()
2060 out_le16(mbase + 0x204, 0x7); in ppc4xx_pciex_port_setup_hose()
2064 out_le32(mbase + 0x208, 0x06040001); in ppc4xx_pciex_port_setup_hose()
2070 out_le32(mbase + 0x208, 0x0b200001); in ppc4xx_pciex_port_setup_hose()
2082 if (mbase) in ppc4xx_pciex_port_setup_hose()
2083 iounmap(mbase); in ppc4xx_pciex_port_setup_hose()