79 static inline void apic_set_reg(struct kvm_lapic *apic, int reg_off, u32 val)  in apic_set_reg()  function
220 	apic_set_reg(apic, APIC_SPIV, val);  in apic_set_spiv()
234 	apic_set_reg(apic, APIC_ID, id << 24);  in kvm_apic_set_id()
240 	apic_set_reg(apic, APIC_LDR, id);  in kvm_apic_set_ldr()
248 	apic_set_reg(apic, APIC_ID, id << 24);  in kvm_apic_set_x2apic_id()
249 	apic_set_reg(apic, APIC_LDR, ldr);  in kvm_apic_set_x2apic_id()
303 	apic_set_reg(apic, APIC_LVR, v);  in kvm_apic_set_version()
586 		apic_set_reg(apic, APIC_PROCPRI, ppr);  in apic_update_ppr()
594 	apic_set_reg(apic, APIC_TASKPRI, tpr);  in apic_set_tpr()
1394 			apic_set_reg(apic, APIC_DFR, val | 0x0FFFFFFF);  in apic_reg_write()
1412 				apic_set_reg(apic, APIC_LVTT + 0x10 * i,  in apic_reg_write()
1423 		apic_set_reg(apic, APIC_ICR, val & ~(1 << 12));  in apic_reg_write()
1430 		apic_set_reg(apic, APIC_ICR2, val);  in apic_reg_write()
1450 		apic_set_reg(apic, reg, val);  in apic_reg_write()
1458 		apic_set_reg(apic, APIC_LVTT, val);  in apic_reg_write()
1467 		apic_set_reg(apic, APIC_TMICT, val);  in apic_reg_write()
1474 		apic_set_reg(apic, APIC_TDCR, val);  in apic_reg_write()
1691 		apic_set_reg(apic, APIC_LVTT + 0x10 * i, APIC_LVT_MASKED);  in kvm_lapic_reset()
1694 		apic_set_reg(apic, APIC_LVT0,  in kvm_lapic_reset()
1698 	apic_set_reg(apic, APIC_DFR, 0xffffffffU);  in kvm_lapic_reset()
1700 	apic_set_reg(apic, APIC_TASKPRI, 0);  in kvm_lapic_reset()
1703 	apic_set_reg(apic, APIC_ESR, 0);  in kvm_lapic_reset()
1704 	apic_set_reg(apic, APIC_ICR, 0);  in kvm_lapic_reset()
1705 	apic_set_reg(apic, APIC_ICR2, 0);  in kvm_lapic_reset()
1706 	apic_set_reg(apic, APIC_TDCR, 0);  in kvm_lapic_reset()
1707 	apic_set_reg(apic, APIC_TMICT, 0);  in kvm_lapic_reset()
1709 		apic_set_reg(apic, APIC_IRR + 0x10 * i, 0);  in kvm_lapic_reset()
1710 		apic_set_reg(apic, APIC_ISR + 0x10 * i, 0);  in kvm_lapic_reset()
1711 		apic_set_reg(apic, APIC_TMR + 0x10 * i, 0);  in kvm_lapic_reset()