Lines Matching refs:con0
401 u32 con0, con1; in samsung_pll45xx_set_rate() local
412 con0 = __raw_readl(pll->con_reg); in samsung_pll45xx_set_rate()
415 if (!(samsung_pll45xx_mp_change(con0, con1, rate))) { in samsung_pll45xx_set_rate()
417 con0 &= ~(PLL45XX_SDIV_MASK << PLL45XX_SDIV_SHIFT); in samsung_pll45xx_set_rate()
418 con0 |= rate->sdiv << PLL45XX_SDIV_SHIFT; in samsung_pll45xx_set_rate()
419 __raw_writel(con0, pll->con_reg); in samsung_pll45xx_set_rate()
425 con0 &= ~((PLL45XX_MDIV_MASK << PLL45XX_MDIV_SHIFT) | in samsung_pll45xx_set_rate()
428 con0 |= (rate->mdiv << PLL45XX_MDIV_SHIFT) | in samsung_pll45xx_set_rate()
451 __raw_writel(con0, pll->con_reg); in samsung_pll45xx_set_rate()
552 u32 con0, con1, lock; in samsung_pll46xx_set_rate() local
563 con0 = __raw_readl(pll->con_reg); in samsung_pll46xx_set_rate()
566 if (!(samsung_pll46xx_mpk_change(con0, con1, rate))) { in samsung_pll46xx_set_rate()
568 con0 &= ~(PLL46XX_SDIV_MASK << PLL46XX_SDIV_SHIFT); in samsung_pll46xx_set_rate()
569 con0 |= rate->sdiv << PLL46XX_SDIV_SHIFT; in samsung_pll46xx_set_rate()
570 __raw_writel(con0, pll->con_reg); in samsung_pll46xx_set_rate()
583 con0 &= ~((PLL1460X_MDIV_MASK << PLL46XX_MDIV_SHIFT) | in samsung_pll46xx_set_rate()
587 con0 &= ~((PLL46XX_MDIV_MASK << PLL46XX_MDIV_SHIFT) | in samsung_pll46xx_set_rate()
591 con0 |= rate->vsel << PLL46XX_VSEL_SHIFT; in samsung_pll46xx_set_rate()
594 con0 |= (rate->mdiv << PLL46XX_MDIV_SHIFT) | in samsung_pll46xx_set_rate()
609 __raw_writel(con0, pll->con_reg); in samsung_pll46xx_set_rate()