Lines Matching refs:ch
239 static inline unsigned long sh_cmt_read_cmstr(struct sh_cmt_channel *ch) in sh_cmt_read_cmstr() argument
241 if (ch->iostart) in sh_cmt_read_cmstr()
242 return ch->cmt->info->read_control(ch->iostart, 0); in sh_cmt_read_cmstr()
244 return ch->cmt->info->read_control(ch->cmt->mapbase, 0); in sh_cmt_read_cmstr()
247 static inline void sh_cmt_write_cmstr(struct sh_cmt_channel *ch, in sh_cmt_write_cmstr() argument
250 if (ch->iostart) in sh_cmt_write_cmstr()
251 ch->cmt->info->write_control(ch->iostart, 0, value); in sh_cmt_write_cmstr()
253 ch->cmt->info->write_control(ch->cmt->mapbase, 0, value); in sh_cmt_write_cmstr()
256 static inline unsigned long sh_cmt_read_cmcsr(struct sh_cmt_channel *ch) in sh_cmt_read_cmcsr() argument
258 return ch->cmt->info->read_control(ch->ioctrl, CMCSR); in sh_cmt_read_cmcsr()
261 static inline void sh_cmt_write_cmcsr(struct sh_cmt_channel *ch, in sh_cmt_write_cmcsr() argument
264 ch->cmt->info->write_control(ch->ioctrl, CMCSR, value); in sh_cmt_write_cmcsr()
267 static inline unsigned long sh_cmt_read_cmcnt(struct sh_cmt_channel *ch) in sh_cmt_read_cmcnt() argument
269 return ch->cmt->info->read_count(ch->ioctrl, CMCNT); in sh_cmt_read_cmcnt()
272 static inline void sh_cmt_write_cmcnt(struct sh_cmt_channel *ch, in sh_cmt_write_cmcnt() argument
275 ch->cmt->info->write_count(ch->ioctrl, CMCNT, value); in sh_cmt_write_cmcnt()
278 static inline void sh_cmt_write_cmcor(struct sh_cmt_channel *ch, in sh_cmt_write_cmcor() argument
281 ch->cmt->info->write_count(ch->ioctrl, CMCOR, value); in sh_cmt_write_cmcor()
284 static unsigned long sh_cmt_get_counter(struct sh_cmt_channel *ch, in sh_cmt_get_counter() argument
290 o1 = sh_cmt_read_cmcsr(ch) & ch->cmt->info->overflow_bit; in sh_cmt_get_counter()
295 v1 = sh_cmt_read_cmcnt(ch); in sh_cmt_get_counter()
296 v2 = sh_cmt_read_cmcnt(ch); in sh_cmt_get_counter()
297 v3 = sh_cmt_read_cmcnt(ch); in sh_cmt_get_counter()
298 o1 = sh_cmt_read_cmcsr(ch) & ch->cmt->info->overflow_bit; in sh_cmt_get_counter()
306 static void sh_cmt_start_stop_ch(struct sh_cmt_channel *ch, int start) in sh_cmt_start_stop_ch() argument
311 raw_spin_lock_irqsave(&ch->cmt->lock, flags); in sh_cmt_start_stop_ch()
312 value = sh_cmt_read_cmstr(ch); in sh_cmt_start_stop_ch()
315 value |= 1 << ch->timer_bit; in sh_cmt_start_stop_ch()
317 value &= ~(1 << ch->timer_bit); in sh_cmt_start_stop_ch()
319 sh_cmt_write_cmstr(ch, value); in sh_cmt_start_stop_ch()
320 raw_spin_unlock_irqrestore(&ch->cmt->lock, flags); in sh_cmt_start_stop_ch()
323 static int sh_cmt_enable(struct sh_cmt_channel *ch, unsigned long *rate) in sh_cmt_enable() argument
327 pm_runtime_get_sync(&ch->cmt->pdev->dev); in sh_cmt_enable()
328 dev_pm_syscore_device(&ch->cmt->pdev->dev, true); in sh_cmt_enable()
331 ret = clk_enable(ch->cmt->clk); in sh_cmt_enable()
333 dev_err(&ch->cmt->pdev->dev, "ch%u: cannot enable clock\n", in sh_cmt_enable()
334 ch->index); in sh_cmt_enable()
339 sh_cmt_start_stop_ch(ch, 0); in sh_cmt_enable()
342 if (ch->cmt->info->width == 16) { in sh_cmt_enable()
343 *rate = clk_get_rate(ch->cmt->clk) / 512; in sh_cmt_enable()
344 sh_cmt_write_cmcsr(ch, SH_CMT16_CMCSR_CMIE | in sh_cmt_enable()
347 *rate = clk_get_rate(ch->cmt->clk) / 8; in sh_cmt_enable()
348 sh_cmt_write_cmcsr(ch, SH_CMT32_CMCSR_CMM | in sh_cmt_enable()
354 sh_cmt_write_cmcor(ch, 0xffffffff); in sh_cmt_enable()
355 sh_cmt_write_cmcnt(ch, 0); in sh_cmt_enable()
369 if (!sh_cmt_read_cmcnt(ch)) in sh_cmt_enable()
374 if (sh_cmt_read_cmcnt(ch)) { in sh_cmt_enable()
375 dev_err(&ch->cmt->pdev->dev, "ch%u: cannot clear CMCNT\n", in sh_cmt_enable()
376 ch->index); in sh_cmt_enable()
382 sh_cmt_start_stop_ch(ch, 1); in sh_cmt_enable()
386 clk_disable(ch->cmt->clk); in sh_cmt_enable()
392 static void sh_cmt_disable(struct sh_cmt_channel *ch) in sh_cmt_disable() argument
395 sh_cmt_start_stop_ch(ch, 0); in sh_cmt_disable()
398 sh_cmt_write_cmcsr(ch, 0); in sh_cmt_disable()
401 clk_disable(ch->cmt->clk); in sh_cmt_disable()
403 dev_pm_syscore_device(&ch->cmt->pdev->dev, false); in sh_cmt_disable()
404 pm_runtime_put(&ch->cmt->pdev->dev); in sh_cmt_disable()
414 static void sh_cmt_clock_event_program_verify(struct sh_cmt_channel *ch, in sh_cmt_clock_event_program_verify() argument
418 unsigned long value = ch->next_match_value; in sh_cmt_clock_event_program_verify()
423 now = sh_cmt_get_counter(ch, &has_wrapped); in sh_cmt_clock_event_program_verify()
424 ch->flags |= FLAG_REPROGRAM; /* force reprogram */ in sh_cmt_clock_event_program_verify()
431 ch->flags |= FLAG_SKIPEVENT; in sh_cmt_clock_event_program_verify()
443 if (new_match > ch->max_match_value) in sh_cmt_clock_event_program_verify()
444 new_match = ch->max_match_value; in sh_cmt_clock_event_program_verify()
446 sh_cmt_write_cmcor(ch, new_match); in sh_cmt_clock_event_program_verify()
448 now = sh_cmt_get_counter(ch, &has_wrapped); in sh_cmt_clock_event_program_verify()
449 if (has_wrapped && (new_match > ch->match_value)) { in sh_cmt_clock_event_program_verify()
456 ch->flags |= FLAG_SKIPEVENT; in sh_cmt_clock_event_program_verify()
467 ch->match_value = new_match; in sh_cmt_clock_event_program_verify()
478 ch->match_value = new_match; in sh_cmt_clock_event_program_verify()
494 dev_warn(&ch->cmt->pdev->dev, "ch%u: too long delay\n", in sh_cmt_clock_event_program_verify()
495 ch->index); in sh_cmt_clock_event_program_verify()
500 static void __sh_cmt_set_next(struct sh_cmt_channel *ch, unsigned long delta) in __sh_cmt_set_next() argument
502 if (delta > ch->max_match_value) in __sh_cmt_set_next()
503 dev_warn(&ch->cmt->pdev->dev, "ch%u: delta out of range\n", in __sh_cmt_set_next()
504 ch->index); in __sh_cmt_set_next()
506 ch->next_match_value = delta; in __sh_cmt_set_next()
507 sh_cmt_clock_event_program_verify(ch, 0); in __sh_cmt_set_next()
510 static void sh_cmt_set_next(struct sh_cmt_channel *ch, unsigned long delta) in sh_cmt_set_next() argument
514 raw_spin_lock_irqsave(&ch->lock, flags); in sh_cmt_set_next()
515 __sh_cmt_set_next(ch, delta); in sh_cmt_set_next()
516 raw_spin_unlock_irqrestore(&ch->lock, flags); in sh_cmt_set_next()
521 struct sh_cmt_channel *ch = dev_id; in sh_cmt_interrupt() local
524 sh_cmt_write_cmcsr(ch, sh_cmt_read_cmcsr(ch) & in sh_cmt_interrupt()
525 ch->cmt->info->clear_bits); in sh_cmt_interrupt()
531 if (ch->flags & FLAG_CLOCKSOURCE) in sh_cmt_interrupt()
532 ch->total_cycles += ch->match_value + 1; in sh_cmt_interrupt()
534 if (!(ch->flags & FLAG_REPROGRAM)) in sh_cmt_interrupt()
535 ch->next_match_value = ch->max_match_value; in sh_cmt_interrupt()
537 ch->flags |= FLAG_IRQCONTEXT; in sh_cmt_interrupt()
539 if (ch->flags & FLAG_CLOCKEVENT) { in sh_cmt_interrupt()
540 if (!(ch->flags & FLAG_SKIPEVENT)) { in sh_cmt_interrupt()
541 if (clockevent_state_oneshot(&ch->ced)) { in sh_cmt_interrupt()
542 ch->next_match_value = ch->max_match_value; in sh_cmt_interrupt()
543 ch->flags |= FLAG_REPROGRAM; in sh_cmt_interrupt()
546 ch->ced.event_handler(&ch->ced); in sh_cmt_interrupt()
550 ch->flags &= ~FLAG_SKIPEVENT; in sh_cmt_interrupt()
552 if (ch->flags & FLAG_REPROGRAM) { in sh_cmt_interrupt()
553 ch->flags &= ~FLAG_REPROGRAM; in sh_cmt_interrupt()
554 sh_cmt_clock_event_program_verify(ch, 1); in sh_cmt_interrupt()
556 if (ch->flags & FLAG_CLOCKEVENT) in sh_cmt_interrupt()
557 if ((clockevent_state_shutdown(&ch->ced)) in sh_cmt_interrupt()
558 || (ch->match_value == ch->next_match_value)) in sh_cmt_interrupt()
559 ch->flags &= ~FLAG_REPROGRAM; in sh_cmt_interrupt()
562 ch->flags &= ~FLAG_IRQCONTEXT; in sh_cmt_interrupt()
567 static int sh_cmt_start(struct sh_cmt_channel *ch, unsigned long flag) in sh_cmt_start() argument
572 raw_spin_lock_irqsave(&ch->lock, flags); in sh_cmt_start()
574 if (!(ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE))) in sh_cmt_start()
575 ret = sh_cmt_enable(ch, &ch->rate); in sh_cmt_start()
579 ch->flags |= flag; in sh_cmt_start()
582 if ((flag == FLAG_CLOCKSOURCE) && (!(ch->flags & FLAG_CLOCKEVENT))) in sh_cmt_start()
583 __sh_cmt_set_next(ch, ch->max_match_value); in sh_cmt_start()
585 raw_spin_unlock_irqrestore(&ch->lock, flags); in sh_cmt_start()
590 static void sh_cmt_stop(struct sh_cmt_channel *ch, unsigned long flag) in sh_cmt_stop() argument
595 raw_spin_lock_irqsave(&ch->lock, flags); in sh_cmt_stop()
597 f = ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE); in sh_cmt_stop()
598 ch->flags &= ~flag; in sh_cmt_stop()
600 if (f && !(ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE))) in sh_cmt_stop()
601 sh_cmt_disable(ch); in sh_cmt_stop()
604 if ((flag == FLAG_CLOCKEVENT) && (ch->flags & FLAG_CLOCKSOURCE)) in sh_cmt_stop()
605 __sh_cmt_set_next(ch, ch->max_match_value); in sh_cmt_stop()
607 raw_spin_unlock_irqrestore(&ch->lock, flags); in sh_cmt_stop()
617 struct sh_cmt_channel *ch = cs_to_sh_cmt(cs); in sh_cmt_clocksource_read() local
622 raw_spin_lock_irqsave(&ch->lock, flags); in sh_cmt_clocksource_read()
623 value = ch->total_cycles; in sh_cmt_clocksource_read()
624 raw = sh_cmt_get_counter(ch, &has_wrapped); in sh_cmt_clocksource_read()
627 raw += ch->match_value + 1; in sh_cmt_clocksource_read()
628 raw_spin_unlock_irqrestore(&ch->lock, flags); in sh_cmt_clocksource_read()
636 struct sh_cmt_channel *ch = cs_to_sh_cmt(cs); in sh_cmt_clocksource_enable() local
638 WARN_ON(ch->cs_enabled); in sh_cmt_clocksource_enable()
640 ch->total_cycles = 0; in sh_cmt_clocksource_enable()
642 ret = sh_cmt_start(ch, FLAG_CLOCKSOURCE); in sh_cmt_clocksource_enable()
644 __clocksource_update_freq_hz(cs, ch->rate); in sh_cmt_clocksource_enable()
645 ch->cs_enabled = true; in sh_cmt_clocksource_enable()
652 struct sh_cmt_channel *ch = cs_to_sh_cmt(cs); in sh_cmt_clocksource_disable() local
654 WARN_ON(!ch->cs_enabled); in sh_cmt_clocksource_disable()
656 sh_cmt_stop(ch, FLAG_CLOCKSOURCE); in sh_cmt_clocksource_disable()
657 ch->cs_enabled = false; in sh_cmt_clocksource_disable()
662 struct sh_cmt_channel *ch = cs_to_sh_cmt(cs); in sh_cmt_clocksource_suspend() local
664 if (!ch->cs_enabled) in sh_cmt_clocksource_suspend()
667 sh_cmt_stop(ch, FLAG_CLOCKSOURCE); in sh_cmt_clocksource_suspend()
668 pm_genpd_syscore_poweroff(&ch->cmt->pdev->dev); in sh_cmt_clocksource_suspend()
673 struct sh_cmt_channel *ch = cs_to_sh_cmt(cs); in sh_cmt_clocksource_resume() local
675 if (!ch->cs_enabled) in sh_cmt_clocksource_resume()
678 pm_genpd_syscore_poweron(&ch->cmt->pdev->dev); in sh_cmt_clocksource_resume()
679 sh_cmt_start(ch, FLAG_CLOCKSOURCE); in sh_cmt_clocksource_resume()
682 static int sh_cmt_register_clocksource(struct sh_cmt_channel *ch, in sh_cmt_register_clocksource() argument
685 struct clocksource *cs = &ch->cs; in sh_cmt_register_clocksource()
697 dev_info(&ch->cmt->pdev->dev, "ch%u: used as clock source\n", in sh_cmt_register_clocksource()
698 ch->index); in sh_cmt_register_clocksource()
710 static void sh_cmt_clock_event_start(struct sh_cmt_channel *ch, int periodic) in sh_cmt_clock_event_start() argument
712 struct clock_event_device *ced = &ch->ced; in sh_cmt_clock_event_start()
714 sh_cmt_start(ch, FLAG_CLOCKEVENT); in sh_cmt_clock_event_start()
719 ced->mult = div_sc(ch->rate, NSEC_PER_SEC, ced->shift); in sh_cmt_clock_event_start()
720 ced->max_delta_ns = clockevent_delta2ns(ch->max_match_value, ced); in sh_cmt_clock_event_start()
724 sh_cmt_set_next(ch, ((ch->rate + HZ/2) / HZ) - 1); in sh_cmt_clock_event_start()
726 sh_cmt_set_next(ch, ch->max_match_value); in sh_cmt_clock_event_start()
731 struct sh_cmt_channel *ch = ced_to_sh_cmt(ced); in sh_cmt_clock_event_shutdown() local
733 sh_cmt_stop(ch, FLAG_CLOCKEVENT); in sh_cmt_clock_event_shutdown()
740 struct sh_cmt_channel *ch = ced_to_sh_cmt(ced); in sh_cmt_clock_event_set_state() local
744 sh_cmt_stop(ch, FLAG_CLOCKEVENT); in sh_cmt_clock_event_set_state()
746 dev_info(&ch->cmt->pdev->dev, "ch%u: used for %s clock events\n", in sh_cmt_clock_event_set_state()
747 ch->index, periodic ? "periodic" : "oneshot"); in sh_cmt_clock_event_set_state()
748 sh_cmt_clock_event_start(ch, periodic); in sh_cmt_clock_event_set_state()
765 struct sh_cmt_channel *ch = ced_to_sh_cmt(ced); in sh_cmt_clock_event_next() local
768 if (likely(ch->flags & FLAG_IRQCONTEXT)) in sh_cmt_clock_event_next()
769 ch->next_match_value = delta - 1; in sh_cmt_clock_event_next()
771 sh_cmt_set_next(ch, delta - 1); in sh_cmt_clock_event_next()
778 struct sh_cmt_channel *ch = ced_to_sh_cmt(ced); in sh_cmt_clock_event_suspend() local
780 pm_genpd_syscore_poweroff(&ch->cmt->pdev->dev); in sh_cmt_clock_event_suspend()
781 clk_unprepare(ch->cmt->clk); in sh_cmt_clock_event_suspend()
786 struct sh_cmt_channel *ch = ced_to_sh_cmt(ced); in sh_cmt_clock_event_resume() local
788 clk_prepare(ch->cmt->clk); in sh_cmt_clock_event_resume()
789 pm_genpd_syscore_poweron(&ch->cmt->pdev->dev); in sh_cmt_clock_event_resume()
792 static int sh_cmt_register_clockevent(struct sh_cmt_channel *ch, in sh_cmt_register_clockevent() argument
795 struct clock_event_device *ced = &ch->ced; in sh_cmt_register_clockevent()
799 irq = platform_get_irq(ch->cmt->pdev, ch->index); in sh_cmt_register_clockevent()
801 dev_err(&ch->cmt->pdev->dev, "ch%u: failed to get irq\n", in sh_cmt_register_clockevent()
802 ch->index); in sh_cmt_register_clockevent()
808 dev_name(&ch->cmt->pdev->dev), ch); in sh_cmt_register_clockevent()
810 dev_err(&ch->cmt->pdev->dev, "ch%u: failed to request irq %d\n", in sh_cmt_register_clockevent()
811 ch->index, irq); in sh_cmt_register_clockevent()
827 dev_info(&ch->cmt->pdev->dev, "ch%u: used for clock events\n", in sh_cmt_register_clockevent()
828 ch->index); in sh_cmt_register_clockevent()
834 static int sh_cmt_register(struct sh_cmt_channel *ch, const char *name, in sh_cmt_register() argument
840 ch->cmt->has_clockevent = true; in sh_cmt_register()
841 ret = sh_cmt_register_clockevent(ch, name); in sh_cmt_register()
847 ch->cmt->has_clocksource = true; in sh_cmt_register()
848 sh_cmt_register_clocksource(ch, name); in sh_cmt_register()
854 static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index, in sh_cmt_setup_channel() argument
864 ch->cmt = cmt; in sh_cmt_setup_channel()
865 ch->index = index; in sh_cmt_setup_channel()
866 ch->hwidx = hwidx; in sh_cmt_setup_channel()
875 ch->ioctrl = cmt->mapbase + 2 + ch->hwidx * 6; in sh_cmt_setup_channel()
879 ch->ioctrl = cmt->mapbase + 0x10 + ch->hwidx * 0x10; in sh_cmt_setup_channel()
886 ch->ioctrl = cmt->mapbase + 0x40; in sh_cmt_setup_channel()
889 ch->iostart = cmt->mapbase + ch->hwidx * 0x100; in sh_cmt_setup_channel()
890 ch->ioctrl = ch->iostart + 0x10; in sh_cmt_setup_channel()
894 if (cmt->info->width == (sizeof(ch->max_match_value) * 8)) in sh_cmt_setup_channel()
895 ch->max_match_value = ~0; in sh_cmt_setup_channel()
897 ch->max_match_value = (1 << cmt->info->width) - 1; in sh_cmt_setup_channel()
899 ch->match_value = ch->max_match_value; in sh_cmt_setup_channel()
900 raw_spin_lock_init(&ch->lock); in sh_cmt_setup_channel()
902 ch->timer_bit = cmt->info->model == SH_CMT_48BIT_GEN2 ? 0 : ch->hwidx; in sh_cmt_setup_channel()
904 ret = sh_cmt_register(ch, dev_name(&cmt->pdev->dev), in sh_cmt_setup_channel()
908 ch->index); in sh_cmt_setup_channel()
911 ch->cs_enabled = false; in sh_cmt_setup_channel()