200 	ctllo = desc->lli.ctllo | DWC_CTLL_INT_EN;  in dwc_do_single_block()
202 	channel_writel(dwc, SAR, desc->lli.sar);  in dwc_do_single_block()
203 	channel_writel(dwc, DAR, desc->lli.dar);  in dwc_do_single_block()
205 	channel_writel(dwc, CTL_HI, desc->lli.ctlhi);  in dwc_do_single_block()
423 		if (desc->lli.llp == llp) {  in dwc_scan_descriptors()
432 			if (child->lli.llp == llp) {  in dwc_scan_descriptors()
460 static inline void dwc_dump_lli(struct dw_dma_chan *dwc, struct dw_lli *lli)  in dwc_dump_lli()  argument
463 		 lli->sar, lli->dar, lli->llp, lli->ctlhi, lli->ctllo);  in dwc_dump_lli()
499 	dwc_dump_lli(dwc, &bad_desc->lli);  in dwc_handle_error()
501 		dwc_dump_lli(dwc, &child->lli);  in dwc_handle_error()
574 			dwc_dump_lli(dwc, &dwc->cdesc->desc[i]->lli);  in dwc_handle_cyclic()
729 		desc->lli.sar = src + offset;  in dwc_prep_dma_memcpy()
730 		desc->lli.dar = dest + offset;  in dwc_prep_dma_memcpy()
731 		desc->lli.ctllo = ctllo;  in dwc_prep_dma_memcpy()
732 		desc->lli.ctlhi = xfer_count;  in dwc_prep_dma_memcpy()
738 			prev->lli.llp = desc->txd.phys;  in dwc_prep_dma_memcpy()
747 		prev->lli.ctllo |= DWC_CTLL_INT_EN;  in dwc_prep_dma_memcpy()
749 	prev->lli.llp = 0;  in dwc_prep_dma_memcpy()
817 			desc->lli.sar = mem;  in dwc_prep_slave_sg()
818 			desc->lli.dar = reg;  in dwc_prep_slave_sg()
819 			desc->lli.ctllo = ctllo | DWC_CTLL_SRC_WIDTH(mem_width);  in dwc_prep_slave_sg()
829 			desc->lli.ctlhi = dlen >> mem_width;  in dwc_prep_slave_sg()
835 				prev->lli.llp = desc->txd.phys;  in dwc_prep_slave_sg()
874 			desc->lli.sar = reg;  in dwc_prep_slave_sg()
875 			desc->lli.dar = mem;  in dwc_prep_slave_sg()
876 			desc->lli.ctllo = ctllo | DWC_CTLL_DST_WIDTH(mem_width);  in dwc_prep_slave_sg()
885 			desc->lli.ctlhi = dlen >> reg_width;  in dwc_prep_slave_sg()
891 				prev->lli.llp = desc->txd.phys;  in dwc_prep_slave_sg()
908 		prev->lli.ctllo |= DWC_CTLL_INT_EN;  in dwc_prep_slave_sg()
910 	prev->lli.llp = 0;  in dwc_prep_slave_sg()
1395 			desc->lli.dar = sconfig->dst_addr;  in dw_dma_cyclic_prep()
1396 			desc->lli.sar = buf_addr + (period_len * i);  in dw_dma_cyclic_prep()
1397 			desc->lli.ctllo = (DWC_DEFAULT_CTLLO(chan)  in dw_dma_cyclic_prep()
1404 			desc->lli.ctllo |= sconfig->device_fc ?  in dw_dma_cyclic_prep()
1410 			desc->lli.dar = buf_addr + (period_len * i);  in dw_dma_cyclic_prep()
1411 			desc->lli.sar = sconfig->src_addr;  in dw_dma_cyclic_prep()
1412 			desc->lli.ctllo = (DWC_DEFAULT_CTLLO(chan)  in dw_dma_cyclic_prep()
1419 			desc->lli.ctllo |= sconfig->device_fc ?  in dw_dma_cyclic_prep()
1428 		desc->lli.ctlhi = (period_len >> reg_width);  in dw_dma_cyclic_prep()
1432 			last->lli.llp = desc->txd.phys;  in dw_dma_cyclic_prep()
1438 	last->lli.llp = cdesc->desc[0]->txd.phys;  in dw_dma_cyclic_prep()