348 	u32 ctrl_reg;  in socfpga_fpga_cfg_mode_set()  local
357 	ctrl_reg = socfpga_fpga_readl(priv, SOCFPGA_FPGMGR_CTL_OFST);  in socfpga_fpga_cfg_mode_set()
358 	ctrl_reg &= ~SOCFPGA_FPGMGR_CTL_CDRATIO_MASK;  in socfpga_fpga_cfg_mode_set()
359 	ctrl_reg &= ~SOCFPGA_FPGMGR_CTL_CFGWDTH_MASK;  in socfpga_fpga_cfg_mode_set()
360 	ctrl_reg |= cfgmgr_modes[mode].ctrl;  in socfpga_fpga_cfg_mode_set()
363 	ctrl_reg &= ~SOCFPGA_FPGMGR_CTL_NCE;  in socfpga_fpga_cfg_mode_set()
364 	socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_CTL_OFST, ctrl_reg);  in socfpga_fpga_cfg_mode_set()
372 	u32 ctrl_reg, status;  in socfpga_fpga_reset()  local
389 	ctrl_reg = socfpga_fpga_readl(priv, SOCFPGA_FPGMGR_CTL_OFST);  in socfpga_fpga_reset()
390 	ctrl_reg |= SOCFPGA_FPGMGR_CTL_NCFGPULL;  in socfpga_fpga_reset()
391 	socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_CTL_OFST, ctrl_reg);  in socfpga_fpga_reset()
397 	ctrl_reg &= ~SOCFPGA_FPGMGR_CTL_NCFGPULL;  in socfpga_fpga_reset()
398 	socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_CTL_OFST, ctrl_reg);  in socfpga_fpga_reset()