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Lines Matching refs:mm_gc

53 	struct of_mm_gpio_chip *mm_gc;  in altera_gpio_irq_unmask()  local
58 mm_gc = &altera_gc->mmchip; in altera_gpio_irq_unmask()
61 intmask = readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK); in altera_gpio_irq_unmask()
64 writel(intmask, mm_gc->regs + ALTERA_GPIO_IRQ_MASK); in altera_gpio_irq_unmask()
71 struct of_mm_gpio_chip *mm_gc; in altera_gpio_irq_mask() local
76 mm_gc = &altera_gc->mmchip; in altera_gpio_irq_mask()
79 intmask = readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK); in altera_gpio_irq_mask()
82 writel(intmask, mm_gc->regs + ALTERA_GPIO_IRQ_MASK); in altera_gpio_irq_mask()
130 struct of_mm_gpio_chip *mm_gc; in altera_gpio_get() local
132 mm_gc = to_of_mm_gpio_chip(gc); in altera_gpio_get()
134 return !!(readl(mm_gc->regs + ALTERA_GPIO_DATA) & BIT(offset)); in altera_gpio_get()
139 struct of_mm_gpio_chip *mm_gc; in altera_gpio_set() local
144 mm_gc = to_of_mm_gpio_chip(gc); in altera_gpio_set()
145 chip = container_of(mm_gc, struct altera_gpio_chip, mmchip); in altera_gpio_set()
148 data_reg = readl(mm_gc->regs + ALTERA_GPIO_DATA); in altera_gpio_set()
153 writel(data_reg, mm_gc->regs + ALTERA_GPIO_DATA); in altera_gpio_set()
159 struct of_mm_gpio_chip *mm_gc; in altera_gpio_direction_input() local
164 mm_gc = to_of_mm_gpio_chip(gc); in altera_gpio_direction_input()
165 chip = container_of(mm_gc, struct altera_gpio_chip, mmchip); in altera_gpio_direction_input()
169 gpio_ddr = readl(mm_gc->regs + ALTERA_GPIO_DIR); in altera_gpio_direction_input()
171 writel(gpio_ddr, mm_gc->regs + ALTERA_GPIO_DIR); in altera_gpio_direction_input()
180 struct of_mm_gpio_chip *mm_gc; in altera_gpio_direction_output() local
185 mm_gc = to_of_mm_gpio_chip(gc); in altera_gpio_direction_output()
186 chip = container_of(mm_gc, struct altera_gpio_chip, mmchip); in altera_gpio_direction_output()
190 data_reg = readl(mm_gc->regs + ALTERA_GPIO_DATA); in altera_gpio_direction_output()
195 writel(data_reg, mm_gc->regs + ALTERA_GPIO_DATA); in altera_gpio_direction_output()
198 gpio_ddr = readl(mm_gc->regs + ALTERA_GPIO_DIR); in altera_gpio_direction_output()
200 writel(gpio_ddr, mm_gc->regs + ALTERA_GPIO_DIR); in altera_gpio_direction_output()
210 struct of_mm_gpio_chip *mm_gc; in altera_gpio_irq_edge_handler() local
217 mm_gc = &altera_gc->mmchip; in altera_gpio_irq_edge_handler()
223 (readl(mm_gc->regs + ALTERA_GPIO_EDGE_CAP) & in altera_gpio_irq_edge_handler()
224 readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK)))) { in altera_gpio_irq_edge_handler()
225 writel(status, mm_gc->regs + ALTERA_GPIO_EDGE_CAP); in altera_gpio_irq_edge_handler()
226 for_each_set_bit(i, &status, mm_gc->gc.ngpio) { in altera_gpio_irq_edge_handler()
238 struct of_mm_gpio_chip *mm_gc; in altera_gpio_irq_leveL_high_handler() local
245 mm_gc = &altera_gc->mmchip; in altera_gpio_irq_leveL_high_handler()
250 status = readl(mm_gc->regs + ALTERA_GPIO_DATA); in altera_gpio_irq_leveL_high_handler()
251 status &= readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK); in altera_gpio_irq_leveL_high_handler()
253 for_each_set_bit(i, &status, mm_gc->gc.ngpio) { in altera_gpio_irq_leveL_high_handler()