Lines Matching refs:chip
109 struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio); in ioh_gpio_set() local
112 spin_lock_irqsave(&chip->spinlock, flags); in ioh_gpio_set()
113 reg_val = ioread32(&chip->reg->regs[chip->ch].po); in ioh_gpio_set()
119 iowrite32(reg_val, &chip->reg->regs[chip->ch].po); in ioh_gpio_set()
120 spin_unlock_irqrestore(&chip->spinlock, flags); in ioh_gpio_set()
125 struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio); in ioh_gpio_get() local
127 return ioread32(&chip->reg->regs[chip->ch].pi) & (1 << nr); in ioh_gpio_get()
133 struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio); in ioh_gpio_direction_output() local
138 spin_lock_irqsave(&chip->spinlock, flags); in ioh_gpio_direction_output()
139 pm = ioread32(&chip->reg->regs[chip->ch].pm) & in ioh_gpio_direction_output()
140 ((1 << num_ports[chip->ch]) - 1); in ioh_gpio_direction_output()
142 iowrite32(pm, &chip->reg->regs[chip->ch].pm); in ioh_gpio_direction_output()
144 reg_val = ioread32(&chip->reg->regs[chip->ch].po); in ioh_gpio_direction_output()
149 iowrite32(reg_val, &chip->reg->regs[chip->ch].po); in ioh_gpio_direction_output()
151 spin_unlock_irqrestore(&chip->spinlock, flags); in ioh_gpio_direction_output()
158 struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio); in ioh_gpio_direction_input() local
162 spin_lock_irqsave(&chip->spinlock, flags); in ioh_gpio_direction_input()
163 pm = ioread32(&chip->reg->regs[chip->ch].pm) & in ioh_gpio_direction_input()
164 ((1 << num_ports[chip->ch]) - 1); in ioh_gpio_direction_input()
166 iowrite32(pm, &chip->reg->regs[chip->ch].pm); in ioh_gpio_direction_input()
167 spin_unlock_irqrestore(&chip->spinlock, flags); in ioh_gpio_direction_input()
176 static void ioh_gpio_save_reg_conf(struct ioh_gpio *chip) in ioh_gpio_save_reg_conf() argument
180 for (i = 0; i < 8; i ++, chip++) { in ioh_gpio_save_reg_conf()
181 chip->ioh_gpio_reg.po_reg = in ioh_gpio_save_reg_conf()
182 ioread32(&chip->reg->regs[chip->ch].po); in ioh_gpio_save_reg_conf()
183 chip->ioh_gpio_reg.pm_reg = in ioh_gpio_save_reg_conf()
184 ioread32(&chip->reg->regs[chip->ch].pm); in ioh_gpio_save_reg_conf()
185 chip->ioh_gpio_reg.ien_reg = in ioh_gpio_save_reg_conf()
186 ioread32(&chip->reg->regs[chip->ch].ien); in ioh_gpio_save_reg_conf()
187 chip->ioh_gpio_reg.imask_reg = in ioh_gpio_save_reg_conf()
188 ioread32(&chip->reg->regs[chip->ch].imask); in ioh_gpio_save_reg_conf()
189 chip->ioh_gpio_reg.im0_reg = in ioh_gpio_save_reg_conf()
190 ioread32(&chip->reg->regs[chip->ch].im_0); in ioh_gpio_save_reg_conf()
191 chip->ioh_gpio_reg.im1_reg = in ioh_gpio_save_reg_conf()
192 ioread32(&chip->reg->regs[chip->ch].im_1); in ioh_gpio_save_reg_conf()
194 chip->ioh_gpio_reg.use_sel_reg = in ioh_gpio_save_reg_conf()
195 ioread32(&chip->reg->ioh_sel_reg[i]); in ioh_gpio_save_reg_conf()
202 static void ioh_gpio_restore_reg_conf(struct ioh_gpio *chip) in ioh_gpio_restore_reg_conf() argument
206 for (i = 0; i < 8; i ++, chip++) { in ioh_gpio_restore_reg_conf()
207 iowrite32(chip->ioh_gpio_reg.po_reg, in ioh_gpio_restore_reg_conf()
208 &chip->reg->regs[chip->ch].po); in ioh_gpio_restore_reg_conf()
209 iowrite32(chip->ioh_gpio_reg.pm_reg, in ioh_gpio_restore_reg_conf()
210 &chip->reg->regs[chip->ch].pm); in ioh_gpio_restore_reg_conf()
211 iowrite32(chip->ioh_gpio_reg.ien_reg, in ioh_gpio_restore_reg_conf()
212 &chip->reg->regs[chip->ch].ien); in ioh_gpio_restore_reg_conf()
213 iowrite32(chip->ioh_gpio_reg.imask_reg, in ioh_gpio_restore_reg_conf()
214 &chip->reg->regs[chip->ch].imask); in ioh_gpio_restore_reg_conf()
215 iowrite32(chip->ioh_gpio_reg.im0_reg, in ioh_gpio_restore_reg_conf()
216 &chip->reg->regs[chip->ch].im_0); in ioh_gpio_restore_reg_conf()
217 iowrite32(chip->ioh_gpio_reg.im1_reg, in ioh_gpio_restore_reg_conf()
218 &chip->reg->regs[chip->ch].im_1); in ioh_gpio_restore_reg_conf()
220 iowrite32(chip->ioh_gpio_reg.use_sel_reg, in ioh_gpio_restore_reg_conf()
221 &chip->reg->ioh_sel_reg[i]); in ioh_gpio_restore_reg_conf()
228 struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio); in ioh_gpio_to_irq() local
229 return chip->irq_base + offset; in ioh_gpio_to_irq()
232 static void ioh_gpio_setup(struct ioh_gpio *chip, int num_port) in ioh_gpio_setup() argument
234 struct gpio_chip *gpio = &chip->gpio; in ioh_gpio_setup()
236 gpio->label = dev_name(chip->dev); in ioh_gpio_setup()
260 struct ioh_gpio *chip = gc->private; in ioh_irq_type() local
262 ch = irq - chip->irq_base; in ioh_irq_type()
263 if (irq <= chip->irq_base + 7) { in ioh_irq_type()
264 im_reg = &chip->reg->regs[chip->ch].im_0; in ioh_irq_type()
267 im_reg = &chip->reg->regs[chip->ch].im_1; in ioh_irq_type()
270 dev_dbg(chip->dev, "%s:irq=%d type=%d ch=%d pos=%d type=%d\n", in ioh_irq_type()
273 spin_lock_irqsave(&chip->spinlock, flags); in ioh_irq_type()
294 dev_warn(chip->dev, "%s: unknown type(%dd)", in ioh_irq_type()
304 iowrite32(BIT(ch), &chip->reg->regs[chip->ch].iclr); in ioh_irq_type()
307 iowrite32(BIT(ch), &chip->reg->regs[chip->ch].imaskclr); in ioh_irq_type()
310 ien = ioread32(&chip->reg->regs[chip->ch].ien); in ioh_irq_type()
311 iowrite32(ien | BIT(ch), &chip->reg->regs[chip->ch].ien); in ioh_irq_type()
313 spin_unlock_irqrestore(&chip->spinlock, flags); in ioh_irq_type()
321 struct ioh_gpio *chip = gc->private; in ioh_irq_unmask() local
323 iowrite32(1 << (d->irq - chip->irq_base), in ioh_irq_unmask()
324 &chip->reg->regs[chip->ch].imaskclr); in ioh_irq_unmask()
330 struct ioh_gpio *chip = gc->private; in ioh_irq_mask() local
332 iowrite32(1 << (d->irq - chip->irq_base), in ioh_irq_mask()
333 &chip->reg->regs[chip->ch].imask); in ioh_irq_mask()
339 struct ioh_gpio *chip = gc->private; in ioh_irq_disable() local
343 spin_lock_irqsave(&chip->spinlock, flags); in ioh_irq_disable()
344 ien = ioread32(&chip->reg->regs[chip->ch].ien); in ioh_irq_disable()
345 ien &= ~(1 << (d->irq - chip->irq_base)); in ioh_irq_disable()
346 iowrite32(ien, &chip->reg->regs[chip->ch].ien); in ioh_irq_disable()
347 spin_unlock_irqrestore(&chip->spinlock, flags); in ioh_irq_disable()
353 struct ioh_gpio *chip = gc->private; in ioh_irq_enable() local
357 spin_lock_irqsave(&chip->spinlock, flags); in ioh_irq_enable()
358 ien = ioread32(&chip->reg->regs[chip->ch].ien); in ioh_irq_enable()
359 ien |= 1 << (d->irq - chip->irq_base); in ioh_irq_enable()
360 iowrite32(ien, &chip->reg->regs[chip->ch].ien); in ioh_irq_enable()
361 spin_unlock_irqrestore(&chip->spinlock, flags); in ioh_irq_enable()
366 struct ioh_gpio *chip = dev_id; in ioh_gpio_handler() local
371 for (i = 0; i < 8; i++, chip++) { in ioh_gpio_handler()
372 reg_val = ioread32(&chip->reg->regs[i].istatus); in ioh_gpio_handler()
375 dev_dbg(chip->dev, in ioh_gpio_handler()
379 &chip->reg->regs[chip->ch].iclr); in ioh_gpio_handler()
380 generic_handle_irq(chip->irq_base + j); in ioh_gpio_handler()
388 static void ioh_gpio_alloc_generic_chip(struct ioh_gpio *chip, in ioh_gpio_alloc_generic_chip() argument
394 gc = irq_alloc_generic_chip("ioh_gpio", 1, irq_start, chip->base, in ioh_gpio_alloc_generic_chip()
396 gc->private = chip; in ioh_gpio_alloc_generic_chip()
399 ct->chip.irq_mask = ioh_irq_mask; in ioh_gpio_alloc_generic_chip()
400 ct->chip.irq_unmask = ioh_irq_unmask; in ioh_gpio_alloc_generic_chip()
401 ct->chip.irq_set_type = ioh_irq_type; in ioh_gpio_alloc_generic_chip()
402 ct->chip.irq_disable = ioh_irq_disable; in ioh_gpio_alloc_generic_chip()
403 ct->chip.irq_enable = ioh_irq_enable; in ioh_gpio_alloc_generic_chip()
414 struct ioh_gpio *chip; in ioh_gpio_probe() local
438 chip_save = kzalloc(sizeof(*chip) * 8, GFP_KERNEL); in ioh_gpio_probe()
445 chip = chip_save; in ioh_gpio_probe()
446 for (i = 0; i < 8; i++, chip++) { in ioh_gpio_probe()
447 chip->dev = &pdev->dev; in ioh_gpio_probe()
448 chip->base = base; in ioh_gpio_probe()
449 chip->reg = chip->base; in ioh_gpio_probe()
450 chip->ch = i; in ioh_gpio_probe()
451 spin_lock_init(&chip->spinlock); in ioh_gpio_probe()
452 ioh_gpio_setup(chip, num_ports[i]); in ioh_gpio_probe()
453 ret = gpiochip_add(&chip->gpio); in ioh_gpio_probe()
460 chip = chip_save; in ioh_gpio_probe()
461 for (j = 0; j < 8; j++, chip++) { in ioh_gpio_probe()
467 chip->irq_base = -1; in ioh_gpio_probe()
471 chip->irq_base = irq_base; in ioh_gpio_probe()
472 ioh_gpio_alloc_generic_chip(chip, irq_base, num_ports[j]); in ioh_gpio_probe()
475 chip = chip_save; in ioh_gpio_probe()
477 IRQF_SHARED, KBUILD_MODNAME, chip); in ioh_gpio_probe()
484 pci_set_drvdata(pdev, chip); in ioh_gpio_probe()
489 chip = chip_save; in ioh_gpio_probe()
492 chip--; in ioh_gpio_probe()
493 irq_free_descs(chip->irq_base, num_ports[j]); in ioh_gpio_probe()
496 chip = chip_save; in ioh_gpio_probe()
498 chip = chip_save; in ioh_gpio_probe()
500 gpiochip_remove(&chip->gpio); in ioh_gpio_probe()
501 chip++; in ioh_gpio_probe()
523 struct ioh_gpio *chip = pci_get_drvdata(pdev); in ioh_gpio_remove() local
526 chip_save = chip; in ioh_gpio_remove()
528 free_irq(pdev->irq, chip); in ioh_gpio_remove()
530 for (i = 0; i < 8; i++, chip++) { in ioh_gpio_remove()
531 irq_free_descs(chip->irq_base, num_ports[i]); in ioh_gpio_remove()
532 gpiochip_remove(&chip->gpio); in ioh_gpio_remove()
535 chip = chip_save; in ioh_gpio_remove()
536 pci_iounmap(pdev, chip->base); in ioh_gpio_remove()
539 kfree(chip); in ioh_gpio_remove()
546 struct ioh_gpio *chip = pci_get_drvdata(pdev); in ioh_gpio_suspend() local
549 spin_lock_irqsave(&chip->spinlock, flags); in ioh_gpio_suspend()
550 ioh_gpio_save_reg_conf(chip); in ioh_gpio_suspend()
551 spin_unlock_irqrestore(&chip->spinlock, flags); in ioh_gpio_suspend()
570 struct ioh_gpio *chip = pci_get_drvdata(pdev); in ioh_gpio_resume() local
583 spin_lock_irqsave(&chip->spinlock, flags); in ioh_gpio_resume()
584 iowrite32(0x01, &chip->reg->srst); in ioh_gpio_resume()
585 iowrite32(0x00, &chip->reg->srst); in ioh_gpio_resume()
586 ioh_gpio_restore_reg_conf(chip); in ioh_gpio_resume()
587 spin_unlock_irqrestore(&chip->spinlock, flags); in ioh_gpio_resume()