318 static struct ci_ps *ci_get_ps(struct amdgpu_ps *rps)  in ci_get_ps()  argument
320 	struct ci_ps *ps = rps->ps_priv;  in ci_get_ps()
910 					struct amdgpu_ps *rps)  in ci_apply_state_adjust_rules()  argument
912 	struct ci_ps *ps = ci_get_ps(rps);  in ci_apply_state_adjust_rules()
919 	if (rps->vce_active) {  in ci_apply_state_adjust_rules()
920 		rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk;  in ci_apply_state_adjust_rules()
921 		rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk;  in ci_apply_state_adjust_rules()
923 		rps->evclk = 0;  in ci_apply_state_adjust_rules()
924 		rps->ecclk = 0;  in ci_apply_state_adjust_rules()
933 	if ((rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) == ATOM_PPLIB_CLASSIFICATION_UI_BATTERY)  in ci_apply_state_adjust_rules()
962 	if (rps->vce_active) {  in ci_apply_state_adjust_rules()
5233 				 struct amdgpu_ps *rps)  in ci_update_current_ps()  argument
5235 	struct ci_ps *new_ps = ci_get_ps(rps);  in ci_update_current_ps()
5238 	pi->current_rps = *rps;  in ci_update_current_ps()
5244 				   struct amdgpu_ps *rps)  in ci_update_requested_ps()  argument
5246 	struct ci_ps *new_ps = ci_get_ps(rps);  in ci_update_requested_ps()
5249 	pi->requested_rps = *rps;  in ci_update_requested_ps()
5569 					  struct amdgpu_ps *rps,  in ci_parse_pplib_non_clock_info()  argument
5573 	rps->caps = le32_to_cpu(non_clock_info->ulCapsAndSettings);  in ci_parse_pplib_non_clock_info()
5574 	rps->class = le16_to_cpu(non_clock_info->usClassification);  in ci_parse_pplib_non_clock_info()
5575 	rps->class2 = le16_to_cpu(non_clock_info->usClassification2);  in ci_parse_pplib_non_clock_info()
5578 		rps->vclk = le32_to_cpu(non_clock_info->ulVCLK);  in ci_parse_pplib_non_clock_info()
5579 		rps->dclk = le32_to_cpu(non_clock_info->ulDCLK);  in ci_parse_pplib_non_clock_info()
5581 		rps->vclk = 0;  in ci_parse_pplib_non_clock_info()
5582 		rps->dclk = 0;  in ci_parse_pplib_non_clock_info()
5585 	if (rps->class & ATOM_PPLIB_CLASSIFICATION_BOOT)  in ci_parse_pplib_non_clock_info()
5586 		adev->pm.dpm.boot_ps = rps;  in ci_parse_pplib_non_clock_info()
5587 	if (rps->class & ATOM_PPLIB_CLASSIFICATION_UVDSTATE)  in ci_parse_pplib_non_clock_info()
5588 		adev->pm.dpm.uvd_ps = rps;  in ci_parse_pplib_non_clock_info()
5592 				      struct amdgpu_ps *rps, int index,  in ci_parse_pplib_clock_info()  argument
5596 	struct ci_ps *ps = ci_get_ps(rps);  in ci_parse_pplib_clock_info()
5614 	if (rps->class & ATOM_PPLIB_CLASSIFICATION_ACPI) {  in ci_parse_pplib_clock_info()
5618 	if (rps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) {  in ci_parse_pplib_clock_info()
5625 	if (rps->class & ATOM_PPLIB_CLASSIFICATION_BOOT) {  in ci_parse_pplib_clock_info()
5632 	switch (rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) {  in ci_parse_pplib_clock_info()
6090 	struct amdgpu_ps *rps = &pi->current_rps;  in ci_dpm_debugfs_print_current_performance_level()  local
6095 	seq_printf(m, "vce %sabled\n", rps->vce_active ? "en" : "dis");  in ci_dpm_debugfs_print_current_performance_level()
6101 				     struct amdgpu_ps *rps)  in ci_dpm_print_power_state()  argument
6103 	struct ci_ps *ps = ci_get_ps(rps);  in ci_dpm_print_power_state()
6107 	amdgpu_dpm_print_class_info(rps->class, rps->class2);  in ci_dpm_print_power_state()
6108 	amdgpu_dpm_print_cap_info(rps->caps);  in ci_dpm_print_power_state()
6109 	printk("\tuvd    vclk: %d dclk: %d\n", rps->vclk, rps->dclk);  in ci_dpm_print_power_state()
6115 	amdgpu_dpm_print_ps_status(adev, rps);  in ci_dpm_print_power_state()