667 				u32 index, u32 sclk)  in kv_set_divider_value()  argument
674 						 sclk, false, &dividers);  in kv_set_divider_value()
679 	pi->graphics_level[index].SclkFrequency = cpu_to_be32(sclk);  in kv_set_divider_value()
812 			if (table->entries[i].clk == pi->boot_pl.sclk)  in kv_program_bootup_state()
826 			if (table->entries[i].sclk_frequency == pi->boot_pl.sclk)  in kv_program_bootup_state()
1812 			if ((table->entries[i].clk >= new_ps->levels[0].sclk) ||  in kv_set_valid_clock_range()
1820 			if (table->entries[i].clk <= new_ps->levels[new_ps->num_levels - 1].sclk)  in kv_set_valid_clock_range()
1826 			if ((new_ps->levels[0].sclk - table->entries[pi->highest_valid].clk) >  in kv_set_valid_clock_range()
1827 			    (table->entries[pi->lowest_valid].clk - new_ps->levels[new_ps->num_levels - 1].sclk))  in kv_set_valid_clock_range()
1837 			if (table->entries[i].sclk_frequency >= new_ps->levels[0].sclk ||  in kv_set_valid_clock_range()
1846 			    new_ps->levels[new_ps->num_levels - 1].sclk)  in kv_set_valid_clock_range()
1852 			if ((new_ps->levels[0].sclk -  in kv_set_valid_clock_range()
1855 			     new_ps->levels[new_ps->num_levels -1].sclk))  in kv_set_valid_clock_range()
2067 		table->sclk =  in kv_construct_max_power_limits_table()
2123 	pi->boot_pl.sclk = pi->sys_info.bootup_sclk;  in kv_construct_boot_state()
2174 					     u32 sclk, u32 min_sclk_in_sr)  in kv_get_sleep_divider_id_from_clock()  argument
2182 	if (sclk < min)  in kv_get_sleep_divider_id_from_clock()
2189 		temp = sclk / sumo_get_sleep_divider_from_id(i);  in kv_get_sleep_divider_id_from_clock()
2238 	u32 sclk, mclk = 0;  in kv_apply_state_adjust_rules()  local
2256 	sclk = min_sclk;  in kv_apply_state_adjust_rules()
2259 		stable_p_state_sclk = (max_limits->sclk * 75) / 100;  in kv_apply_state_adjust_rules()
2271 		sclk = stable_p_state_sclk;  in kv_apply_state_adjust_rules()
2275 		if (sclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk)  in kv_apply_state_adjust_rules()
2276 			sclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk;  in kv_apply_state_adjust_rules()
2282 		if (ps->levels[i].sclk < sclk)  in kv_apply_state_adjust_rules()
2283 			ps->levels[i].sclk = sclk;  in kv_apply_state_adjust_rules()
2292 				ps->levels[i].sclk = table->entries[limit].clk;  in kv_apply_state_adjust_rules()
2304 				ps->levels[i].sclk = table->entries[limit].sclk_frequency;  in kv_apply_state_adjust_rules()
2311 			ps->levels[i].sclk = stable_p_state_sclk;  in kv_apply_state_adjust_rules()
2713 	u32 sclk;  in kv_parse_pplib_clock_info()  local
2715 	sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow);  in kv_parse_pplib_clock_info()
2716 	sclk |= clock_info->sumo.ucEngineClockHigh << 16;  in kv_parse_pplib_clock_info()
2717 	pl->sclk = sclk;  in kv_parse_pplib_clock_info()
2804 		u32 sclk;  in kv_parse_power_table()  local
2808 		sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow);  in kv_parse_power_table()
2809 		sclk |= clock_info->sumo.ucEngineClockHigh << 16;  in kv_parse_power_table()
2810 		adev->pm.dpm.vce_states[i].sclk = sclk;  in kv_parse_power_table()
2894 	u32 sclk, tmp;  in kv_dpm_debugfs_print_current_performance_level()  local
2900 		sclk = be32_to_cpu(pi->graphics_level[current_index].SclkFrequency);  in kv_dpm_debugfs_print_current_performance_level()
2908 			   current_index, sclk, vddc);  in kv_dpm_debugfs_print_current_performance_level()
2925 		       i, pl->sclk,  in kv_dpm_print_power_state()
2954 		return requested_state->levels[0].sclk;  in kv_dpm_get_sclk()
2956 		return requested_state->levels[requested_state->num_levels - 1].sclk;  in kv_dpm_get_sclk()