Lines Matching refs:rb_cntl
373 u32 rb_cntl, ib_cntl; in sdma_v2_4_gfx_stop() local
381 rb_cntl = RREG32(mmSDMA0_GFX_RB_CNTL + sdma_offsets[i]); in sdma_v2_4_gfx_stop()
382 rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_ENABLE, 0); in sdma_v2_4_gfx_stop()
383 WREG32(mmSDMA0_GFX_RB_CNTL + sdma_offsets[i], rb_cntl); in sdma_v2_4_gfx_stop()
443 u32 rb_cntl, ib_cntl; in sdma_v2_4_gfx_resume() local
466 rb_cntl = RREG32(mmSDMA0_GFX_RB_CNTL + sdma_offsets[i]); in sdma_v2_4_gfx_resume()
467 rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_SIZE, rb_bufsz); in sdma_v2_4_gfx_resume()
469 rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_SWAP_ENABLE, 1); in sdma_v2_4_gfx_resume()
470 rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, in sdma_v2_4_gfx_resume()
473 WREG32(mmSDMA0_GFX_RB_CNTL + sdma_offsets[i], rb_cntl); in sdma_v2_4_gfx_resume()
485 rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RPTR_WRITEBACK_ENABLE, 1); in sdma_v2_4_gfx_resume()
494 rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_ENABLE, 1); in sdma_v2_4_gfx_resume()
495 WREG32(mmSDMA0_GFX_RB_CNTL + sdma_offsets[i], rb_cntl); in sdma_v2_4_gfx_resume()