79 	const struct intel_device_info *info = INTEL_INFO(dev);  in i915_capabilities()
617 			if (INTEL_INFO(dev)->gen >= 4)  in i915_gem_pageflip_info()
814 	} else if (INTEL_INFO(dev)->gen >= 8) {  in i915_interrupt_info()
935 		if (INTEL_INFO(dev)->gen >= 6) {  in i915_interrupt_info()
1604 	else if (INTEL_INFO(dev)->gen >= 6)  in i915_drpc_info()
1645 	if (INTEL_INFO(dev_priv)->gen >= 7)  in i915_fbc_status()
1661 	if (INTEL_INFO(dev)->gen < 7 || !HAS_FBC(dev))  in i915_fbc_fc_get()
1675 	if (INTEL_INFO(dev)->gen < 7 || !HAS_FBC(dev))  in i915_fbc_fc_set()
1711 	if (INTEL_INFO(dev)->gen >= 8) {  in i915_ips_status()
2179 	} else if (INTEL_INFO(dev)->gen >= 6) {  in i915_swizzle_info()
2188 		if (INTEL_INFO(dev)->gen >= 8)  in i915_swizzle_info()
2255 	if (INTEL_INFO(dev)->gen == 6)  in gen6_ppgtt_info()
2260 		if (INTEL_INFO(dev)->gen == 7)  in gen6_ppgtt_info()
2290 	if (INTEL_INFO(dev)->gen >= 8)  in i915_ppgtt_info()
2292 	else if (INTEL_INFO(dev)->gen >= 6)  in i915_ppgtt_info()
2634 	if (INTEL_INFO(dev)->gen < 6)  in i915_energy_uJ()
3006 	int num_rings = hweight32(INTEL_INFO(dev)->ring_mask);  in i915_semaphore_status()
3143 	if (INTEL_INFO(dev)->gen < 9)  in i915_ddb_info()
3315 	if (info->pipe >= INTEL_INFO(info->dev)->num_pipes)  in i915_pipe_crc_open()
3893 	else if (INTEL_INFO(dev)->gen < 5)  in pipe_crc_set_source()
4354 		if (INTEL_INFO(dev)->gen >= 9 || IS_VALLEYVIEW(dev))  in wm_latency_show()
4372 	if (INTEL_INFO(dev)->gen >= 9)  in pri_wm_latency_show()
4388 	if (INTEL_INFO(dev)->gen >= 9)  in spr_wm_latency_show()
4404 	if (INTEL_INFO(dev)->gen >= 9)  in cur_wm_latency_show()
4418 	if (INTEL_INFO(dev)->gen < 5)  in pri_wm_latency_open()
4495 	if (INTEL_INFO(dev)->gen >= 9)  in pri_wm_latency_write()
4511 	if (INTEL_INFO(dev)->gen >= 9)  in spr_wm_latency_write()
4527 	if (INTEL_INFO(dev)->gen >= 9)  in cur_wm_latency_write()
4767 	if (INTEL_INFO(dev)->gen < 6)  in i915_max_freq_get()
4790 	if (INTEL_INFO(dev)->gen < 6)  in i915_max_freq_set()
4834 	if (INTEL_INFO(dev)->gen < 6)  in i915_min_freq_get()
4857 	if (INTEL_INFO(dev)->gen < 6)  in i915_min_freq_set()
5029 			ss_cnt = INTEL_INFO(dev)->subslice_per_slice;  in gen9_sseu_device_status()
5065 		stat->subslice_per_slice = INTEL_INFO(dev)->subslice_per_slice;  in broadwell_sseu_device_status()
5068 		stat->eu_per_subslice = INTEL_INFO(dev)->eu_per_subslice;  in broadwell_sseu_device_status()
5073 			u8 subslice_7eu = INTEL_INFO(dev)->subslice_7eu[s];  in broadwell_sseu_device_status()
5086 	if (INTEL_INFO(dev)->gen < 8)  in i915_sseu_status()
5091 		   INTEL_INFO(dev)->slice_total);  in i915_sseu_status()
5093 		   INTEL_INFO(dev)->subslice_total);  in i915_sseu_status()
5095 		   INTEL_INFO(dev)->subslice_per_slice);  in i915_sseu_status()
5097 		   INTEL_INFO(dev)->eu_total);  in i915_sseu_status()
5099 		   INTEL_INFO(dev)->eu_per_subslice);  in i915_sseu_status()
5101 		   yesno(INTEL_INFO(dev)->has_slice_pg));  in i915_sseu_status()
5103 		   yesno(INTEL_INFO(dev)->has_subslice_pg));  in i915_sseu_status()
5105 		   yesno(INTEL_INFO(dev)->has_eu_pg));  in i915_sseu_status()
5113 	} else if (INTEL_INFO(dev)->gen >= 9) {  in i915_sseu_status()
5135 	if (INTEL_INFO(dev)->gen < 6)  in i915_forcewake_open()
5149 	if (INTEL_INFO(dev)->gen < 6)  in i915_forcewake_release()