Lines Matching refs:mipi_mmio_base
7758 #define _MIPIA_DEVICE_READY (dev_priv->mipi_mmio_base + 0xb000)
7759 #define _MIPIC_DEVICE_READY (dev_priv->mipi_mmio_base + 0xb800)
7769 #define _MIPIA_INTR_STAT (dev_priv->mipi_mmio_base + 0xb004)
7770 #define _MIPIC_INTR_STAT (dev_priv->mipi_mmio_base + 0xb804)
7773 #define _MIPIA_INTR_EN (dev_priv->mipi_mmio_base + 0xb008)
7774 #define _MIPIC_INTR_EN (dev_priv->mipi_mmio_base + 0xb808)
7810 #define _MIPIA_DSI_FUNC_PRG (dev_priv->mipi_mmio_base + 0xb00c)
7811 #define _MIPIC_DSI_FUNC_PRG (dev_priv->mipi_mmio_base + 0xb80c)
7834 #define _MIPIA_HS_TX_TIMEOUT (dev_priv->mipi_mmio_base + 0xb010)
7835 #define _MIPIC_HS_TX_TIMEOUT (dev_priv->mipi_mmio_base + 0xb810)
7840 #define _MIPIA_LP_RX_TIMEOUT (dev_priv->mipi_mmio_base + 0xb014)
7841 #define _MIPIC_LP_RX_TIMEOUT (dev_priv->mipi_mmio_base + 0xb814)
7846 #define _MIPIA_TURN_AROUND_TIMEOUT (dev_priv->mipi_mmio_base + 0xb018)
7847 #define _MIPIC_TURN_AROUND_TIMEOUT (dev_priv->mipi_mmio_base + 0xb818)
7852 #define _MIPIA_DEVICE_RESET_TIMER (dev_priv->mipi_mmio_base + 0xb01c)
7853 #define _MIPIC_DEVICE_RESET_TIMER (dev_priv->mipi_mmio_base + 0xb81c)
7858 #define _MIPIA_DPI_RESOLUTION (dev_priv->mipi_mmio_base + 0xb020)
7859 #define _MIPIC_DPI_RESOLUTION (dev_priv->mipi_mmio_base + 0xb820)
7867 #define _MIPIA_DBI_FIFO_THROTTLE (dev_priv->mipi_mmio_base + 0xb024)
7868 #define _MIPIC_DBI_FIFO_THROTTLE (dev_priv->mipi_mmio_base + 0xb824)
7876 #define _MIPIA_HSYNC_PADDING_COUNT (dev_priv->mipi_mmio_base + 0xb028)
7877 #define _MIPIC_HSYNC_PADDING_COUNT (dev_priv->mipi_mmio_base + 0xb828)
7881 #define _MIPIA_HBP_COUNT (dev_priv->mipi_mmio_base + 0xb02c)
7882 #define _MIPIC_HBP_COUNT (dev_priv->mipi_mmio_base + 0xb82c)
7886 #define _MIPIA_HFP_COUNT (dev_priv->mipi_mmio_base + 0xb030)
7887 #define _MIPIC_HFP_COUNT (dev_priv->mipi_mmio_base + 0xb830)
7891 #define _MIPIA_HACTIVE_AREA_COUNT (dev_priv->mipi_mmio_base + 0xb034)
7892 #define _MIPIC_HACTIVE_AREA_COUNT (dev_priv->mipi_mmio_base + 0xb834)
7896 #define _MIPIA_VSYNC_PADDING_COUNT (dev_priv->mipi_mmio_base + 0xb038)
7897 #define _MIPIC_VSYNC_PADDING_COUNT (dev_priv->mipi_mmio_base + 0xb838)
7901 #define _MIPIA_VBP_COUNT (dev_priv->mipi_mmio_base + 0xb03c)
7902 #define _MIPIC_VBP_COUNT (dev_priv->mipi_mmio_base + 0xb83c)
7906 #define _MIPIA_VFP_COUNT (dev_priv->mipi_mmio_base + 0xb040)
7907 #define _MIPIC_VFP_COUNT (dev_priv->mipi_mmio_base + 0xb840)
7911 #define _MIPIA_HIGH_LOW_SWITCH_COUNT (dev_priv->mipi_mmio_base + 0xb044)
7912 #define _MIPIC_HIGH_LOW_SWITCH_COUNT (dev_priv->mipi_mmio_base + 0xb844)
7918 #define _MIPIA_DPI_CONTROL (dev_priv->mipi_mmio_base + 0xb048)
7919 #define _MIPIC_DPI_CONTROL (dev_priv->mipi_mmio_base + 0xb848)
7930 #define _MIPIA_DPI_DATA (dev_priv->mipi_mmio_base + 0xb04c)
7931 #define _MIPIC_DPI_DATA (dev_priv->mipi_mmio_base + 0xb84c)
7937 #define _MIPIA_INIT_COUNT (dev_priv->mipi_mmio_base + 0xb050)
7938 #define _MIPIC_INIT_COUNT (dev_priv->mipi_mmio_base + 0xb850)
7944 #define _MIPIA_MAX_RETURN_PKT_SIZE (dev_priv->mipi_mmio_base + 0xb054)
7945 #define _MIPIC_MAX_RETURN_PKT_SIZE (dev_priv->mipi_mmio_base + 0xb854)
7951 #define _MIPIA_VIDEO_MODE_FORMAT (dev_priv->mipi_mmio_base + 0xb058)
7952 #define _MIPIC_VIDEO_MODE_FORMAT (dev_priv->mipi_mmio_base + 0xb858)
7962 #define _MIPIA_EOT_DISABLE (dev_priv->mipi_mmio_base + 0xb05c)
7963 #define _MIPIC_EOT_DISABLE (dev_priv->mipi_mmio_base + 0xb85c)
7975 #define _MIPIA_LP_BYTECLK (dev_priv->mipi_mmio_base + 0xb060)
7976 #define _MIPIC_LP_BYTECLK (dev_priv->mipi_mmio_base + 0xb860)
7983 #define _MIPIA_LP_GEN_DATA (dev_priv->mipi_mmio_base + 0xb064)
7984 #define _MIPIC_LP_GEN_DATA (dev_priv->mipi_mmio_base + 0xb864)
7989 #define _MIPIA_HS_GEN_DATA (dev_priv->mipi_mmio_base + 0xb068)
7990 #define _MIPIC_HS_GEN_DATA (dev_priv->mipi_mmio_base + 0xb868)
7994 #define _MIPIA_LP_GEN_CTRL (dev_priv->mipi_mmio_base + 0xb06c)
7995 #define _MIPIC_LP_GEN_CTRL (dev_priv->mipi_mmio_base + 0xb86c)
7998 #define _MIPIA_HS_GEN_CTRL (dev_priv->mipi_mmio_base + 0xb070)
7999 #define _MIPIC_HS_GEN_CTRL (dev_priv->mipi_mmio_base + 0xb870)
8012 #define _MIPIA_GEN_FIFO_STAT (dev_priv->mipi_mmio_base + 0xb074)
8013 #define _MIPIC_GEN_FIFO_STAT (dev_priv->mipi_mmio_base + 0xb874)
8031 #define _MIPIA_HS_LS_DBI_ENABLE (dev_priv->mipi_mmio_base + 0xb078)
8032 #define _MIPIC_HS_LS_DBI_ENABLE (dev_priv->mipi_mmio_base + 0xb878)
8039 #define _MIPIA_DPHY_PARAM (dev_priv->mipi_mmio_base + 0xb080)
8040 #define _MIPIC_DPHY_PARAM (dev_priv->mipi_mmio_base + 0xb880)
8053 #define _MIPIA_DBI_BW_CTRL (dev_priv->mipi_mmio_base + 0xb084)
8054 #define _MIPIC_DBI_BW_CTRL (dev_priv->mipi_mmio_base + 0xb884)
8058 #define _MIPIA_CLK_LANE_SWITCH_TIME_CNT (dev_priv->mipi_mmio_base \
8060 #define _MIPIC_CLK_LANE_SWITCH_TIME_CNT (dev_priv->mipi_mmio_base \
8069 #define _MIPIA_STOP_STATE_STALL (dev_priv->mipi_mmio_base + 0xb08c)
8070 #define _MIPIC_STOP_STATE_STALL (dev_priv->mipi_mmio_base + 0xb88c)
8076 #define _MIPIA_INTR_STAT_REG_1 (dev_priv->mipi_mmio_base + 0xb090)
8077 #define _MIPIC_INTR_STAT_REG_1 (dev_priv->mipi_mmio_base + 0xb890)
8080 #define _MIPIA_INTR_EN_REG_1 (dev_priv->mipi_mmio_base + 0xb094)
8081 #define _MIPIC_INTR_EN_REG_1 (dev_priv->mipi_mmio_base + 0xb894)
8087 #define MIPIA_DBI_TYPEC_CTRL (dev_priv->mipi_mmio_base + 0xb100)
8101 #define _MIPIA_CTRL (dev_priv->mipi_mmio_base + 0xb104)
8102 #define _MIPIC_CTRL (dev_priv->mipi_mmio_base + 0xb904)
8121 #define _MIPIA_DATA_ADDRESS (dev_priv->mipi_mmio_base + 0xb108)
8122 #define _MIPIC_DATA_ADDRESS (dev_priv->mipi_mmio_base + 0xb908)
8129 #define _MIPIA_DATA_LENGTH (dev_priv->mipi_mmio_base + 0xb10c)
8130 #define _MIPIC_DATA_LENGTH (dev_priv->mipi_mmio_base + 0xb90c)
8136 #define _MIPIA_COMMAND_ADDRESS (dev_priv->mipi_mmio_base + 0xb110)
8137 #define _MIPIC_COMMAND_ADDRESS (dev_priv->mipi_mmio_base + 0xb910)
8146 #define _MIPIA_COMMAND_LENGTH (dev_priv->mipi_mmio_base + 0xb114)
8147 #define _MIPIC_COMMAND_LENGTH (dev_priv->mipi_mmio_base + 0xb914)
8153 #define _MIPIA_READ_DATA_RETURN0 (dev_priv->mipi_mmio_base + 0xb118)
8154 #define _MIPIC_READ_DATA_RETURN0 (dev_priv->mipi_mmio_base + 0xb918)
8159 #define _MIPIA_READ_DATA_VALID (dev_priv->mipi_mmio_base + 0xb138)
8160 #define _MIPIC_READ_DATA_VALID (dev_priv->mipi_mmio_base + 0xb938)