Lines Matching defs:intel_crtc_state

337 struct intel_crtc_state {  struct
338 	struct drm_crtc_state base;
349 	unsigned long quirks;
351 	bool update_pipe;
356 	int pipe_src_w, pipe_src_h;
360 	bool has_pch_encoder;
363 	bool has_infoframe;
367 	enum transcoder cpu_transcoder;
373 	bool limited_color_range;
377 	bool has_dp_encoder;
380 	bool has_hdmi_sink;
384 	bool has_audio;
390 	bool dither;
393 	bool clock_set;
397 	bool sdvo_tv_clock;
404 	bool bw_constrained;
408 	struct dpll dpll;
411 	enum intel_dpll_id shared_dpll;
417 	uint32_t ddi_pll_sel;
420 	struct intel_dpll_hw_state dpll_hw_state;
422 	int pipe_bpp;
423 	struct intel_link_m_n dp_m_n;
426 	struct intel_link_m_n dp_m2_n2;
427 	bool has_drrs;
434 	int port_clock;
437 	unsigned pixel_multiplier;
439 	uint8_t lane_count;
442 	struct {
446 	} gmch_pfit;
449 	struct {
454 	} pch_pfit;
457 	int fdi_lanes;
458 	struct intel_link_m_n fdi_m_n;
460 	bool ips_enabled;
462 	bool double_wide;
464 	bool dp_encoder_is_mst;
465 	int pbn;
467 	struct intel_crtc_scaler_state scaler_state;
470 	enum pipe hsw_workaround_pipe;