151 	I915_WRITE(VIDEO_DIP_CTL, val);  in g4x_write_infoframe()
155 		I915_WRITE(VIDEO_DIP_DATA, *data);  in g4x_write_infoframe()
160 		I915_WRITE(VIDEO_DIP_DATA, 0);  in g4x_write_infoframe()
167 	I915_WRITE(VIDEO_DIP_CTL, val);  in g4x_write_infoframe()
206 	I915_WRITE(reg, val);  in ibx_write_infoframe()
210 		I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data);  in ibx_write_infoframe()
215 		I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0);  in ibx_write_infoframe()
222 	I915_WRITE(reg, val);  in ibx_write_infoframe()
267 	I915_WRITE(reg, val);  in cpt_write_infoframe()
271 		I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data);  in cpt_write_infoframe()
276 		I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0);  in cpt_write_infoframe()
283 	I915_WRITE(reg, val);  in cpt_write_infoframe()
321 	I915_WRITE(reg, val);  in vlv_write_infoframe()
325 		I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), *data);  in vlv_write_infoframe()
330 		I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), 0);  in vlv_write_infoframe()
337 	I915_WRITE(reg, val);  in vlv_write_infoframe()
380 	I915_WRITE(ctl_reg, val);  in hsw_write_infoframe()
384 		I915_WRITE(hsw_dip_data_reg(dev_priv, cpu_transcoder,  in hsw_write_infoframe()
390 		I915_WRITE(hsw_dip_data_reg(dev_priv, cpu_transcoder,  in hsw_write_infoframe()
395 	I915_WRITE(ctl_reg, val);  in hsw_write_infoframe()
543 		I915_WRITE(reg, val);  in g4x_set_infoframes()
562 	I915_WRITE(reg, val);  in g4x_set_infoframes()
656 	I915_WRITE(reg, val);  in intel_hdmi_set_gcp_infoframe()
684 		I915_WRITE(reg, val);  in ibx_set_infoframes()
705 	I915_WRITE(reg, val);  in ibx_set_infoframes()
734 		I915_WRITE(reg, val);  in cpt_set_infoframes()
747 	I915_WRITE(reg, val);  in cpt_set_infoframes()
778 		I915_WRITE(reg, val);  in vlv_set_infoframes()
799 	I915_WRITE(reg, val);  in vlv_set_infoframes()
824 		I915_WRITE(reg, val);  in hsw_set_infoframes()
832 	I915_WRITE(reg, val);  in hsw_set_infoframes()
872 	I915_WRITE(intel_hdmi->hdmi_reg, hdmi_val);  in intel_hdmi_prepare()
978 	I915_WRITE(intel_hdmi->hdmi_reg, temp);  in g4x_enable_hdmi()
1003 	I915_WRITE(intel_hdmi->hdmi_reg, temp);  in ibx_enable_hdmi()
1005 	I915_WRITE(intel_hdmi->hdmi_reg, temp);  in ibx_enable_hdmi()
1017 		I915_WRITE(intel_hdmi->hdmi_reg, temp & ~SDVO_ENABLE);  in ibx_enable_hdmi()
1024 		I915_WRITE(intel_hdmi->hdmi_reg, temp);  in ibx_enable_hdmi()
1026 		I915_WRITE(intel_hdmi->hdmi_reg, temp);  in ibx_enable_hdmi()
1060 		I915_WRITE(TRANS_CHICKEN1(pipe),  in cpt_enable_hdmi()
1068 	I915_WRITE(intel_hdmi->hdmi_reg, temp);  in cpt_enable_hdmi()
1075 		I915_WRITE(intel_hdmi->hdmi_reg, temp);  in cpt_enable_hdmi()
1078 		I915_WRITE(TRANS_CHICKEN1(pipe),  in cpt_enable_hdmi()
1102 	I915_WRITE(intel_hdmi->hdmi_reg, temp);  in intel_disable_hdmi()
1117 		I915_WRITE(intel_hdmi->hdmi_reg, temp);  in intel_disable_hdmi()
1119 		I915_WRITE(intel_hdmi->hdmi_reg, temp);  in intel_disable_hdmi()
1123 		I915_WRITE(intel_hdmi->hdmi_reg, temp);  in intel_disable_hdmi()
2132 		I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);  in intel_hdmi_init_connector()