1047 		const int sr_fifo_size = INTEL_INFO(dev)->num_pipes * 512 - 1;  in vlv_invert_wms()
1079 	int sr_fifo_size = INTEL_INFO(dev)->num_pipes * 512 - 1;  in vlv_compute_wm()
1831 	if (INTEL_INFO(dev)->gen >= 8)  in ilk_display_fifo_size()
1833 	else if (INTEL_INFO(dev)->gen >= 7)  in ilk_display_fifo_size()
1842 	if (INTEL_INFO(dev)->gen >= 8)  in ilk_plane_wm_reg_max()
1845 	else if (INTEL_INFO(dev)->gen >= 7)  in ilk_plane_wm_reg_max()
1859 	if (INTEL_INFO(dev)->gen >= 7)  in ilk_cursor_wm_reg_max()
1867 	if (INTEL_INFO(dev)->gen >= 8)  in ilk_fbc_wm_reg_max()
1888 		fifo_size /= INTEL_INFO(dev)->num_pipes;  in ilk_plane_wm_max()
1895 		if (INTEL_INFO(dev)->gen <= 6)  in ilk_plane_wm_max()
2146 	} else if (INTEL_INFO(dev)->gen >= 6) {  in intel_read_wm_latency()
2153 	} else if (INTEL_INFO(dev)->gen >= 5) {  in intel_read_wm_latency()
2166 	if (INTEL_INFO(dev)->gen == 5)  in intel_fixup_spr_wm_latency()
2173 	if (INTEL_INFO(dev)->gen == 5)  in intel_fixup_cur_wm_latency()
2184 	if (INTEL_INFO(dev)->gen >= 9)  in ilk_wm_max_level()
2188 	else if (INTEL_INFO(dev)->gen >= 6)  in ilk_wm_max_level()
2343 	if (INTEL_INFO(dev)->gen <= 6 && sprstate->visible)  in intel_compute_pipe_wm()
2429 	if ((INTEL_INFO(dev)->gen <= 6 || IS_IVYBRIDGE(dev)) &&  in ilk_wm_merge()
2434 	merged->fbc_wm_enabled = INTEL_INFO(dev)->gen >= 6;  in ilk_wm_merge()
2523 		if (INTEL_INFO(dev)->gen >= 8)  in ilk_compute_wm_results()
2534 		if (INTEL_INFO(dev)->gen <= 6 && r->spr_val) {  in ilk_compute_wm_results()
2740 	if (INTEL_INFO(dev)->gen >= 7) {  in ilk_write_wm_values()
3732 	if (INTEL_INFO(dev)->gen >= 7 &&  in ilk_update_wm()
4095 	if (INTEL_INFO(dev)->gen >= 7) {  in ilk_wm_get_hw_state()
4672 	if (INTEL_INFO(dev)->gen < 6)  in sanitize_rc6_option()
4865 	    INTEL_INFO(dev)->gen == 9)  in gen9_enable_rc6()
5121 		} else if (INTEL_INFO(dev)->gen >= 8) {  in __gen6_update_ring_freq()
5170 	switch (INTEL_INFO(dev)->eu_total) {  in cherryview_rps_max_freq()
5753 	if (INTEL_INFO(dev)->gen != 5)  in i915_chipset_val()
5797 	if (INTEL_INFO(dev)->is_mobile)  in pvid_to_extvid()
5840 	if (INTEL_INFO(dev)->gen != 5)  in i915_update_gfx_val()
5892 	if (INTEL_INFO(dev)->gen != 5)  in i915_gfx_val()
6285 	if (INTEL_INFO(dev)->gen < 6)  in intel_suspend_gt_powersave()
6296 	if (INTEL_INFO(dev)->gen >= 9)  in __intel_disable_rc6()
6320 	if (INTEL_INFO(dev)->gen >= 9)  in intel_disable_rps()
6332 	} else if (INTEL_INFO(dev)->gen >= 6) {  in intel_disable_gt_powersave()
6361 	} else if (INTEL_INFO(dev)->gen >= 9) {  in intel_gen6_powersave_work()
6402 	} else if (INTEL_INFO(dev)->gen >= 6) {  in intel_enable_gt_powersave()
6425 	if (INTEL_INFO(dev)->gen < 6)  in intel_reset_gt_powersave()
7230 	if (INTEL_INFO(dev)->gen >= 9) {  in intel_init_pm()
7260 		else if (INTEL_INFO(dev)->gen == 8)  in intel_init_pm()
7304 		if (INTEL_INFO(dev)->num_pipes == 1) {  in intel_init_pm()
7480 	if (req == NULL || INTEL_INFO(dev)->gen < 6)  in intel_queue_rps_boost_for_request()