Lines Matching refs:ddb
2829 struct skl_ddb_allocation *ddb /* out */) in skl_ddb_get_hw_state() argument
2835 memset(ddb, 0, sizeof(*ddb)); in skl_ddb_get_hw_state()
2843 skl_ddb_entry_init_from_hw(&ddb->plane[pipe][plane], in skl_ddb_get_hw_state()
2848 skl_ddb_entry_init_from_hw(&ddb->plane[pipe][PLANE_CURSOR], in skl_ddb_get_hw_state()
2901 struct skl_ddb_allocation *ddb /* out */) in skl_allocate_pipe_ddb() argument
2907 struct skl_ddb_entry *alloc = &ddb->pipe[pipe]; in skl_allocate_pipe_ddb()
2917 memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe])); in skl_allocate_pipe_ddb()
2918 memset(&ddb->plane[pipe][PLANE_CURSOR], 0, in skl_allocate_pipe_ddb()
2919 sizeof(ddb->plane[pipe][PLANE_CURSOR])); in skl_allocate_pipe_ddb()
2924 ddb->plane[pipe][PLANE_CURSOR].start = alloc->end - cursor_blocks; in skl_allocate_pipe_ddb()
2925 ddb->plane[pipe][PLANE_CURSOR].end = alloc->end; in skl_allocate_pipe_ddb()
2973 ddb->plane[pipe][plane].start = start; in skl_allocate_pipe_ddb()
2974 ddb->plane[pipe][plane].end = start + plane_blocks; in skl_allocate_pipe_ddb()
2987 ddb->y_plane[pipe][plane].start = start; in skl_allocate_pipe_ddb()
2988 ddb->y_plane[pipe][plane].end = start + y_plane_blocks; in skl_allocate_pipe_ddb()
3057 const struct skl_ddb_allocation *cur_ddb = &dev_priv->wm.skl_hw.ddb; in skl_ddb_allocation_changed()
3228 struct skl_ddb_allocation *ddb, in skl_compute_wm_level() argument
3239 ddb_blocks = skl_ddb_entry_size(&ddb->plane[pipe][i]); in skl_compute_wm_level()
3249 ddb_blocks = skl_ddb_entry_size(&ddb->plane[pipe][PLANE_CURSOR]); in skl_compute_wm_level()
3286 struct skl_ddb_allocation *ddb, in skl_compute_pipe_wm() argument
3296 skl_compute_wm_level(dev_priv, ddb, params, intel_crtc->pipe, in skl_compute_pipe_wm()
3403 &new->ddb.plane[pipe][i]); in skl_write_wm_values()
3406 &new->ddb.y_plane[pipe][i]); in skl_write_wm_values()
3410 &new->ddb.plane[pipe][PLANE_CURSOR]); in skl_write_wm_values()
3476 new_ddb = &new_values->ddb; in skl_flush_wm_values()
3477 cur_ddb = &dev_priv->wm.skl_hw.ddb; in skl_flush_wm_values()
3552 struct skl_ddb_allocation *ddb, /* out */ in skl_update_pipe_wm() argument
3558 skl_allocate_pipe_ddb(crtc, config, params, ddb); in skl_update_pipe_wm()
3559 skl_compute_pipe_wm(crtc, ddb, params, pipe_wm); in skl_update_pipe_wm()
3583 if (!skl_ddb_allocation_changed(&r->ddb, this_crtc)) in skl_update_other_pipe_wm()
3604 &r->ddb, &pipe_wm); in skl_update_other_pipe_wm()
3628 memset(&watermarks->ddb.pipe[pipe], 0, sizeof(struct skl_ddb_entry)); in skl_clear_wm()
3629 memset(&watermarks->ddb.plane[pipe], 0, in skl_clear_wm()
3631 memset(&watermarks->ddb.y_plane[pipe], 0, in skl_clear_wm()
3633 memset(&watermarks->ddb.plane[pipe][PLANE_CURSOR], 0, in skl_clear_wm()
3657 &results->ddb, &pipe_wm)) in skl_update_wm()
3871 struct skl_ddb_allocation *ddb = &dev_priv->wm.skl_hw.ddb; in skl_wm_get_hw_state() local
3874 skl_ddb_get_hw_state(dev_priv, ddb); in skl_wm_get_hw_state()