837 	DIG_ENCODER_CONTROL_PARAMETERS_V4 v4;  member
947 			args.v4.ucAction = action;  in atombios_dig_encoder_setup2()
948 			args.v4.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);  in atombios_dig_encoder_setup2()
950 				args.v4.ucPanelMode = panel_mode;  in atombios_dig_encoder_setup2()
952 				args.v4.ucEncoderMode = atombios_get_encoder_mode(encoder);  in atombios_dig_encoder_setup2()
954 			if (ENCODER_MODE_IS_DP(args.v4.ucEncoderMode))  in atombios_dig_encoder_setup2()
955 				args.v4.ucLaneNum = dp_lane_count;  in atombios_dig_encoder_setup2()
957 				args.v4.ucLaneNum = 8;  in atombios_dig_encoder_setup2()
959 				args.v4.ucLaneNum = 4;  in atombios_dig_encoder_setup2()
961 			if (ENCODER_MODE_IS_DP(args.v4.ucEncoderMode)) {  in atombios_dig_encoder_setup2()
973 				args.v4.acConfig.ucDigSel = enc_override;  in atombios_dig_encoder_setup2()
975 				args.v4.acConfig.ucDigSel = dig->dig_encoder;  in atombios_dig_encoder_setup2()
976 			args.v4.ucBitPerColor = radeon_atom_get_bpc(encoder);  in atombios_dig_encoder_setup2()
978 				args.v4.ucHPD_ID = 0;  in atombios_dig_encoder_setup2()
980 				args.v4.ucHPD_ID = hpd_id + 1;  in atombios_dig_encoder_setup2()
1006 	DIG_TRANSMITTER_CONTROL_PARAMETERS_V4 v4;  member
1246 			args.v4.ucAction = action;  in atombios_dig_transmitter_setup2()
1248 				args.v4.usInitInfo = cpu_to_le16(connector_object_id);  in atombios_dig_transmitter_setup2()
1250 				args.v4.asMode.ucLaneSel = lane_num;  in atombios_dig_transmitter_setup2()
1251 				args.v4.asMode.ucLaneSet = lane_set;  in atombios_dig_transmitter_setup2()
1254 					args.v4.usPixelClock = cpu_to_le16(dp_clock / 10);  in atombios_dig_transmitter_setup2()
1256 					args.v4.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10);  in atombios_dig_transmitter_setup2()
1258 					args.v4.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);  in atombios_dig_transmitter_setup2()
1262 				args.v4.ucLaneNum = dp_lane_count;  in atombios_dig_transmitter_setup2()
1264 				args.v4.ucLaneNum = 8;  in atombios_dig_transmitter_setup2()
1266 				args.v4.ucLaneNum = 4;  in atombios_dig_transmitter_setup2()
1269 				args.v4.acConfig.ucLinkSel = 1;  in atombios_dig_transmitter_setup2()
1271 				args.v4.acConfig.ucEncoderSel = 1;  in atombios_dig_transmitter_setup2()
1280 					args.v4.acConfig.ucRefClkSource = ENCODER_REFCLK_SRC_EXTCLK;  in atombios_dig_transmitter_setup2()
1282 					args.v4.acConfig.ucRefClkSource = ENCODER_REFCLK_SRC_DCPLL;  in atombios_dig_transmitter_setup2()
1284 				args.v4.acConfig.ucRefClkSource = pll_id;  in atombios_dig_transmitter_setup2()
1288 				args.v4.acConfig.ucTransmitterSel = 0;  in atombios_dig_transmitter_setup2()
1291 				args.v4.acConfig.ucTransmitterSel = 1;  in atombios_dig_transmitter_setup2()
1294 				args.v4.acConfig.ucTransmitterSel = 2;  in atombios_dig_transmitter_setup2()
1299 				args.v4.acConfig.fCoherentMode = 1; /* DP requires coherent */  in atombios_dig_transmitter_setup2()
1302 					args.v4.acConfig.fCoherentMode = 1;  in atombios_dig_transmitter_setup2()
1304 					args.v4.acConfig.fDualLinkConnector = 1;  in atombios_dig_transmitter_setup2()