8994 	struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);  in dce8_program_fmt()  local
9050 	WREG32(FMT_BIT_DEPTH_CONTROL + radeon_crtc->crtc_offset, tmp);  in dce8_program_fmt()
9067 				   struct radeon_crtc *radeon_crtc,  in dce8_line_buffer_adjust()  argument
9071 	u32 pipe_offset = radeon_crtc->crtc_id * 0x20;  in dce8_line_buffer_adjust()
9080 	if (radeon_crtc->base.enabled && mode) {  in dce8_line_buffer_adjust()
9100 	WREG32(LB_MEMORY_CTRL + radeon_crtc->crtc_offset,  in dce8_line_buffer_adjust()
9112 	if (radeon_crtc->base.enabled && mode) {  in dce8_line_buffer_adjust()
9509 				    struct radeon_crtc *radeon_crtc,  in dce8_program_watermarks()  argument
9512 	struct drm_display_mode *mode = &radeon_crtc->base.mode;  in dce8_program_watermarks()
9519 	if (radeon_crtc->base.enabled && num_heads && mode) {  in dce8_program_watermarks()
9542 		wm_high.vsc = radeon_crtc->vsc;  in dce8_program_watermarks()
9544 		if (radeon_crtc->rmx_type != RMX_OFF)  in dce8_program_watermarks()
9582 		wm_low.vsc = radeon_crtc->vsc;  in dce8_program_watermarks()
9584 		if (radeon_crtc->rmx_type != RMX_OFF)  in dce8_program_watermarks()
9604 		radeon_crtc->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay);  in dce8_program_watermarks()
9608 	wm_mask = RREG32(DPG_WATERMARK_MASK_CONTROL + radeon_crtc->crtc_offset);  in dce8_program_watermarks()
9612 	WREG32(DPG_WATERMARK_MASK_CONTROL + radeon_crtc->crtc_offset, tmp);  in dce8_program_watermarks()
9613 	WREG32(DPG_PIPE_LATENCY_CONTROL + radeon_crtc->crtc_offset,  in dce8_program_watermarks()
9617 	tmp = RREG32(DPG_WATERMARK_MASK_CONTROL + radeon_crtc->crtc_offset);  in dce8_program_watermarks()
9620 	WREG32(DPG_WATERMARK_MASK_CONTROL + radeon_crtc->crtc_offset, tmp);  in dce8_program_watermarks()
9621 	WREG32(DPG_PIPE_LATENCY_CONTROL + radeon_crtc->crtc_offset,  in dce8_program_watermarks()
9625 	WREG32(DPG_WATERMARK_MASK_CONTROL + radeon_crtc->crtc_offset, wm_mask);  in dce8_program_watermarks()
9628 	radeon_crtc->line_time = line_time;  in dce8_program_watermarks()
9629 	radeon_crtc->wm_high = latency_watermark_a;  in dce8_program_watermarks()
9630 	radeon_crtc->wm_low = latency_watermark_b;  in dce8_program_watermarks()