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Lines Matching refs:mclk

423 u8 cypress_get_strobe_mode_settings(struct radeon_device *rdev, u32 mclk)  in cypress_get_strobe_mode_settings()  argument
430 if (mclk <= pi->mclk_strobe_mode_threshold) in cypress_get_strobe_mode_settings()
432 result = cypress_get_mclk_frequency_ratio(rdev, mclk, strobe_mode); in cypress_get_strobe_mode_settings()
475 RV7XX_SMC_MCLK_VALUE *mclk, in cypress_populate_mclk_value() argument
597 mclk->mclk770.mclk_value = cpu_to_be32(memory_clock); in cypress_populate_mclk_value()
598 mclk->mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in cypress_populate_mclk_value()
599 mclk->mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in cypress_populate_mclk_value()
600 mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in cypress_populate_mclk_value()
601 mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in cypress_populate_mclk_value()
602 mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in cypress_populate_mclk_value()
603 mclk->mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl); in cypress_populate_mclk_value()
604 mclk->mclk770.vMPLL_SS = cpu_to_be32(mpll_ss1); in cypress_populate_mclk_value()
605 mclk->mclk770.vMPLL_SS2 = cpu_to_be32(mpll_ss2); in cypress_populate_mclk_value()
652 u32 mclk, in cypress_populate_mvdd_value() argument
664 if (mclk <= pi->mvdd_split_frequency) { in cypress_populate_mvdd_value()
697 (pl->mclk <= pi->mclk_stutter_mode_threshold) && in cypress_convert_power_level_to_smc()
707 if (pl->mclk > pi->mclk_edc_enable_threshold) in cypress_convert_power_level_to_smc()
710 if (pl->mclk > eg_pi->mclk_edc_wr_enable_threshold) in cypress_convert_power_level_to_smc()
713 level->strobeMode = cypress_get_strobe_mode_settings(rdev, pl->mclk); in cypress_convert_power_level_to_smc()
716 if (cypress_get_mclk_frequency_ratio(rdev, pl->mclk, true) >= in cypress_convert_power_level_to_smc()
726 pl->mclk, in cypress_convert_power_level_to_smc()
727 &level->mclk, in cypress_convert_power_level_to_smc()
733 pl->mclk, in cypress_convert_power_level_to_smc()
734 &level->mclk, in cypress_convert_power_level_to_smc()
757 ret = cypress_populate_mvdd_value(rdev, pl->mclk, &level->mvdd); in cypress_convert_power_level_to_smc()
835 if (pl->mclk <= in cypress_convert_mc_reg_table_entry_to_smc()
934 new_state->low.mclk)); in cypress_program_memory_timing_parameters()
937 new_state->medium.mclk)); in cypress_program_memory_timing_parameters()
940 new_state->high.mclk)); in cypress_program_memory_timing_parameters()
1050 range_table->mclk[i]; in cypress_retrieve_ac_timing_for_all_ranges()
1051 radeon_atom_set_ac_timing(rdev, range_table->mclk[i]); in cypress_retrieve_ac_timing_for_all_ranges()
1127 radeon_atom_set_ac_timing(rdev, boot_state->low.mclk); in cypress_force_mc_use_s1()
1146 boot_state->low.mclk); in cypress_force_mc_use_s1()
1204 boot_state->low.mclk); in cypress_force_mc_use_s0()
1243 table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL = in cypress_populate_smc_initial_state()
1245 table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 = in cypress_populate_smc_initial_state()
1247 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = in cypress_populate_smc_initial_state()
1249 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 = in cypress_populate_smc_initial_state()
1251 table->initialState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL = in cypress_populate_smc_initial_state()
1253 table->initialState.levels[0].mclk.mclk770.vDLL_CNTL = in cypress_populate_smc_initial_state()
1256 table->initialState.levels[0].mclk.mclk770.vMPLL_SS = in cypress_populate_smc_initial_state()
1258 table->initialState.levels[0].mclk.mclk770.vMPLL_SS2 = in cypress_populate_smc_initial_state()
1261 table->initialState.levels[0].mclk.mclk770.mclk_value = in cypress_populate_smc_initial_state()
1262 cpu_to_be32(initial_state->low.mclk); in cypress_populate_smc_initial_state()
1314 initial_state->low.mclk); in cypress_populate_smc_initial_state()
1316 if (initial_state->low.mclk > pi->mclk_edc_enable_threshold) in cypress_populate_smc_initial_state()
1433 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL = in cypress_populate_smc_acpi_state()
1435 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 = in cypress_populate_smc_acpi_state()
1437 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = in cypress_populate_smc_acpi_state()
1439 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 = in cypress_populate_smc_acpi_state()
1441 table->ACPIState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL = in cypress_populate_smc_acpi_state()
1443 table->ACPIState.levels[0].mclk.mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl); in cypress_populate_smc_acpi_state()
1445 table->ACPIState.levels[0].mclk.mclk770.mclk_value = 0; in cypress_populate_smc_acpi_state()