Lines Matching refs:mclk
791 u32 mclk; in ni_apply_state_adjust_rules() local
808 if (ps->performance_levels[i].mclk > max_limits->mclk) in ni_apply_state_adjust_rules()
809 ps->performance_levels[i].mclk = max_limits->mclk; in ni_apply_state_adjust_rules()
823 ps->performance_levels[0].mclk = in ni_apply_state_adjust_rules()
824 ps->performance_levels[ps->performance_level_count - 1].mclk; in ni_apply_state_adjust_rules()
829 btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, in ni_apply_state_adjust_rules()
831 &ps->performance_levels[0].mclk); in ni_apply_state_adjust_rules()
842 mclk = ps->performance_levels[0].mclk; in ni_apply_state_adjust_rules()
845 if (mclk < ps->performance_levels[i].mclk) in ni_apply_state_adjust_rules()
846 mclk = ps->performance_levels[i].mclk; in ni_apply_state_adjust_rules()
851 ps->performance_levels[i].mclk = mclk; in ni_apply_state_adjust_rules()
856 if (ps->performance_levels[i].mclk < ps->performance_levels[i - 1].mclk) in ni_apply_state_adjust_rules()
857 ps->performance_levels[i].mclk = ps->performance_levels[i - 1].mclk; in ni_apply_state_adjust_rules()
864 btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, in ni_apply_state_adjust_rules()
866 &ps->performance_levels[i].mclk); in ni_apply_state_adjust_rules()
877 ps->performance_levels[i].mclk, in ni_apply_state_adjust_rules()
880 ps->performance_levels[i].mclk, in ni_apply_state_adjust_rules()
1321 u32 mclk, in ni_populate_mvdd_value() argument
1333 if (mclk <= pi->mvdd_split_frequency) { in ni_populate_mvdd_value()
1626 pl->mclk); in ni_populate_memory_timing_parameters()
1692 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL = in ni_populate_smc_initial_state()
1694 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL_2 = in ni_populate_smc_initial_state()
1696 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL = in ni_populate_smc_initial_state()
1698 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL_2 = in ni_populate_smc_initial_state()
1700 table->initialState.levels[0].mclk.vMCLK_PWRMGT_CNTL = in ni_populate_smc_initial_state()
1702 table->initialState.levels[0].mclk.vDLL_CNTL = in ni_populate_smc_initial_state()
1704 table->initialState.levels[0].mclk.vMPLL_SS = in ni_populate_smc_initial_state()
1706 table->initialState.levels[0].mclk.vMPLL_SS2 = in ni_populate_smc_initial_state()
1708 table->initialState.levels[0].mclk.mclk_value = in ni_populate_smc_initial_state()
1709 cpu_to_be32(initial_state->performance_levels[0].mclk); in ni_populate_smc_initial_state()
1766 initial_state->performance_levels[0].mclk); in ni_populate_smc_initial_state()
1768 if (initial_state->performance_levels[0].mclk > pi->mclk_edc_enable_threshold) in ni_populate_smc_initial_state()
1905 table->ACPIState.levels[0].mclk.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in ni_populate_smc_acpi_state()
1906 table->ACPIState.levels[0].mclk.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in ni_populate_smc_acpi_state()
1907 table->ACPIState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in ni_populate_smc_acpi_state()
1908 table->ACPIState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in ni_populate_smc_acpi_state()
1909 table->ACPIState.levels[0].mclk.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in ni_populate_smc_acpi_state()
1910 table->ACPIState.levels[0].mclk.vDLL_CNTL = cpu_to_be32(dll_cntl); in ni_populate_smc_acpi_state()
1912 table->ACPIState.levels[0].mclk.mclk_value = 0; in ni_populate_smc_acpi_state()
2163 NISLANDS_SMC_MCLK_VALUE *mclk, in ni_populate_mclk_value() argument
2281 mclk->mclk_value = cpu_to_be32(memory_clock); in ni_populate_mclk_value()
2282 mclk->vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in ni_populate_mclk_value()
2283 mclk->vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in ni_populate_mclk_value()
2284 mclk->vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in ni_populate_mclk_value()
2285 mclk->vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in ni_populate_mclk_value()
2286 mclk->vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in ni_populate_mclk_value()
2287 mclk->vDLL_CNTL = cpu_to_be32(dll_cntl); in ni_populate_mclk_value()
2288 mclk->vMPLL_SS = cpu_to_be32(mpll_ss1); in ni_populate_mclk_value()
2289 mclk->vMPLL_SS2 = cpu_to_be32(mpll_ss2); in ni_populate_mclk_value()
2330 (pl->mclk <= pi->mclk_stutter_mode_threshold) && in ni_convert_power_level_to_smc()
2337 if (pl->mclk > pi->mclk_edc_enable_threshold) in ni_convert_power_level_to_smc()
2339 if (pl->mclk > eg_pi->mclk_edc_wr_enable_threshold) in ni_convert_power_level_to_smc()
2342 level->strobeMode = cypress_get_strobe_mode_settings(rdev, pl->mclk); in ni_convert_power_level_to_smc()
2345 if (cypress_get_mclk_frequency_ratio(rdev, pl->mclk, true) >= in ni_convert_power_level_to_smc()
2352 if (pl->mclk > ni_pi->mclk_rtt_mode_threshold) in ni_convert_power_level_to_smc()
2356 ret = ni_populate_mclk_value(rdev, pl->sclk, pl->mclk, in ni_convert_power_level_to_smc()
2357 &level->mclk, in ni_convert_power_level_to_smc()
2361 ret = ni_populate_mclk_value(rdev, pl->sclk, pl->mclk, &level->mclk, 1, 1); in ni_convert_power_level_to_smc()
2385 ni_populate_mvdd_value(rdev, pl->mclk, &level->mvdd); in ni_convert_power_level_to_smc()
2965 if (pl->mclk <= ni_pi->mc_reg_table.mc_reg_table_entry[i].mclk_max) in ni_convert_mc_reg_table_entry_to_smc()
3933 pl->mclk = le16_to_cpu(clock_info->evergreen.usMemoryClockLow); in ni_parse_pplib_clock_info()
3934 pl->mclk |= clock_info->evergreen.ucMemoryClockHigh << 16; in ni_parse_pplib_clock_info()
3970 pl->mclk = rdev->clock.default_mclk; in ni_parse_pplib_clock_info()
3979 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = pl->mclk; in ni_parse_pplib_clock_info()
4259 (rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk == 0)) in ni_dpm_init()
4293 i, pl->sclk, pl->mclk, pl->vddc, pl->vddci, pl->pcie_gen + 1); in ni_dpm_print_power_state()
4296 i, pl->sclk, pl->mclk, pl->vddc, pl->vddci); in ni_dpm_print_power_state()
4318 current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci); in ni_dpm_debugfs_print_current_performance_level()
4354 return pl->mclk; in ni_dpm_get_current_mclk()
4375 return requested_state->performance_levels[0].mclk; in ni_dpm_get_mclk()
4377 return requested_state->performance_levels[requested_state->performance_level_count - 1].mclk; in ni_dpm_get_mclk()