Lines Matching refs:pi
46 struct rv6xx_power_info *pi = rdev->pm.dpm.priv; in rv6xx_get_pi() local
48 return pi; in rv6xx_get_pi()
163 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_output_stepping() local
168 pi->spll_ref_div, in rv6xx_output_stepping()
184 fb_divider = ((step->vco_frequency * pi->spll_ref_div) / ref_clk) >> in rv6xx_output_stepping()
185 pi->fb_div_scale; in rv6xx_output_stepping()
188 pi->spll_ref_div - 1); in rv6xx_output_stepping()
437 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_calculate_engine_speed_stepping_parameters() local
439 pi->hw.sclks[R600_POWER_LEVEL_LOW] = in rv6xx_calculate_engine_speed_stepping_parameters()
441 pi->hw.sclks[R600_POWER_LEVEL_MEDIUM] = in rv6xx_calculate_engine_speed_stepping_parameters()
443 pi->hw.sclks[R600_POWER_LEVEL_HIGH] = in rv6xx_calculate_engine_speed_stepping_parameters()
446 pi->hw.low_sclk_index = R600_POWER_LEVEL_LOW; in rv6xx_calculate_engine_speed_stepping_parameters()
447 pi->hw.medium_sclk_index = R600_POWER_LEVEL_MEDIUM; in rv6xx_calculate_engine_speed_stepping_parameters()
448 pi->hw.high_sclk_index = R600_POWER_LEVEL_HIGH; in rv6xx_calculate_engine_speed_stepping_parameters()
454 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_calculate_memory_clock_stepping_parameters() local
456 pi->hw.mclks[R600_POWER_LEVEL_CTXSW] = in rv6xx_calculate_memory_clock_stepping_parameters()
458 pi->hw.mclks[R600_POWER_LEVEL_HIGH] = in rv6xx_calculate_memory_clock_stepping_parameters()
460 pi->hw.mclks[R600_POWER_LEVEL_MEDIUM] = in rv6xx_calculate_memory_clock_stepping_parameters()
462 pi->hw.mclks[R600_POWER_LEVEL_LOW] = in rv6xx_calculate_memory_clock_stepping_parameters()
465 pi->hw.high_mclk_index = R600_POWER_LEVEL_HIGH; in rv6xx_calculate_memory_clock_stepping_parameters()
468 pi->hw.medium_mclk_index = in rv6xx_calculate_memory_clock_stepping_parameters()
469 pi->hw.high_mclk_index; in rv6xx_calculate_memory_clock_stepping_parameters()
471 pi->hw.medium_mclk_index = R600_POWER_LEVEL_MEDIUM; in rv6xx_calculate_memory_clock_stepping_parameters()
475 pi->hw.low_mclk_index = in rv6xx_calculate_memory_clock_stepping_parameters()
476 pi->hw.medium_mclk_index; in rv6xx_calculate_memory_clock_stepping_parameters()
478 pi->hw.low_mclk_index = R600_POWER_LEVEL_LOW; in rv6xx_calculate_memory_clock_stepping_parameters()
484 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_calculate_voltage_stepping_parameters() local
486 pi->hw.vddc[R600_POWER_LEVEL_CTXSW] = state->high.vddc; in rv6xx_calculate_voltage_stepping_parameters()
487 pi->hw.vddc[R600_POWER_LEVEL_HIGH] = state->high.vddc; in rv6xx_calculate_voltage_stepping_parameters()
488 pi->hw.vddc[R600_POWER_LEVEL_MEDIUM] = state->medium.vddc; in rv6xx_calculate_voltage_stepping_parameters()
489 pi->hw.vddc[R600_POWER_LEVEL_LOW] = state->low.vddc; in rv6xx_calculate_voltage_stepping_parameters()
491 pi->hw.backbias[R600_POWER_LEVEL_CTXSW] = in rv6xx_calculate_voltage_stepping_parameters()
493 pi->hw.backbias[R600_POWER_LEVEL_HIGH] = in rv6xx_calculate_voltage_stepping_parameters()
495 pi->hw.backbias[R600_POWER_LEVEL_MEDIUM] = in rv6xx_calculate_voltage_stepping_parameters()
497 pi->hw.backbias[R600_POWER_LEVEL_LOW] = in rv6xx_calculate_voltage_stepping_parameters()
500 pi->hw.pcie_gen2[R600_POWER_LEVEL_HIGH] = in rv6xx_calculate_voltage_stepping_parameters()
502 pi->hw.pcie_gen2[R600_POWER_LEVEL_MEDIUM] = in rv6xx_calculate_voltage_stepping_parameters()
504 pi->hw.pcie_gen2[R600_POWER_LEVEL_LOW] = in rv6xx_calculate_voltage_stepping_parameters()
507 pi->hw.high_vddc_index = R600_POWER_LEVEL_HIGH; in rv6xx_calculate_voltage_stepping_parameters()
512 pi->hw.medium_vddc_index = in rv6xx_calculate_voltage_stepping_parameters()
513 pi->hw.high_vddc_index; in rv6xx_calculate_voltage_stepping_parameters()
515 pi->hw.medium_vddc_index = R600_POWER_LEVEL_MEDIUM; in rv6xx_calculate_voltage_stepping_parameters()
520 pi->hw.low_vddc_index = in rv6xx_calculate_voltage_stepping_parameters()
521 pi->hw.medium_vddc_index; in rv6xx_calculate_voltage_stepping_parameters()
523 pi->hw.medium_vddc_index = R600_POWER_LEVEL_LOW; in rv6xx_calculate_voltage_stepping_parameters()
553 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_engine_spread_spectrum() local
560 if (clock && pi->sclk_ss) { in rv6xx_program_engine_spread_spectrum()
563 pi->fb_div_scale); in rv6xx_program_engine_spread_spectrum()
571 pi->fb_div_scale); in rv6xx_program_engine_spread_spectrum()
586 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_sclk_spread_spectrum_parameters_except_lowest_entry() local
589 pi->hw.sclks[R600_POWER_LEVEL_HIGH], in rv6xx_program_sclk_spread_spectrum_parameters_except_lowest_entry()
593 pi->hw.sclks[R600_POWER_LEVEL_MEDIUM], in rv6xx_program_sclk_spread_spectrum_parameters_except_lowest_entry()
621 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_mclk_stepping_parameters_except_lowest_entry() local
625 if (pi->hw.mclks[i]) in rv6xx_program_mclk_stepping_parameters_except_lowest_entry()
627 pi->hw.mclks[i]); in rv6xx_program_mclk_stepping_parameters_except_lowest_entry()
637 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_find_memory_clock_with_highest_vco() local
644 pi->fb_div_scale); in rv6xx_find_memory_clock_with_highest_vco()
655 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_mclk_spread_spectrum_parameters() local
663 if (pi->mclk_ss) { in rv6xx_program_mclk_spread_spectrum_parameters()
665 pi->hw.mclks[pi->hw.high_mclk_index], in rv6xx_program_mclk_spread_spectrum_parameters()
671 pi->hw.mclks[pi->hw.medium_mclk_index], in rv6xx_program_mclk_spread_spectrum_parameters()
677 pi->hw.mclks[pi->hw.low_mclk_index], in rv6xx_program_mclk_spread_spectrum_parameters()
689 pi->fb_div_scale); in rv6xx_program_mclk_spread_spectrum_parameters()
721 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_voltage_stepping_parameters_except_lowest_entry() local
726 pi->hw.vddc[i]); in rv6xx_program_voltage_stepping_parameters_except_lowest_entry()
732 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_backbias_stepping_parameters_except_lowest_entry() local
734 if (pi->hw.backbias[1]) in rv6xx_program_backbias_stepping_parameters_except_lowest_entry()
739 if (pi->hw.backbias[2]) in rv6xx_program_backbias_stepping_parameters_except_lowest_entry()
747 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_sclk_spread_spectrum_parameters_lowest_entry() local
750 pi->hw.sclks[R600_POWER_LEVEL_LOW], in rv6xx_program_sclk_spread_spectrum_parameters_lowest_entry()
756 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_mclk_stepping_parameters_lowest_entry() local
758 if (pi->hw.mclks[0]) in rv6xx_program_mclk_stepping_parameters_lowest_entry()
760 pi->hw.mclks[0]); in rv6xx_program_mclk_stepping_parameters_lowest_entry()
765 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_voltage_stepping_parameters_lowest_entry() local
768 pi->hw.vddc[0]); in rv6xx_program_voltage_stepping_parameters_lowest_entry()
774 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_backbias_stepping_parameters_lowest_entry() local
776 if (pi->hw.backbias[0]) in rv6xx_program_backbias_stepping_parameters_lowest_entry()
797 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_memory_timing_parameters() local
802 if (pi->hw.sclks[R600_POWER_LEVEL_HIGH] < in rv6xx_program_memory_timing_parameters()
803 (pi->hw.sclks[R600_POWER_LEVEL_LOW] * 0xFF / 0x40)) in rv6xx_program_memory_timing_parameters()
804 high_clock = pi->hw.sclks[R600_POWER_LEVEL_HIGH]; in rv6xx_program_memory_timing_parameters()
807 pi->hw.sclks[R600_POWER_LEVEL_LOW] * 0xFF / 0x40; in rv6xx_program_memory_timing_parameters()
811 sqm_ratio = (STATE0(64 * high_clock / pi->hw.sclks[R600_POWER_LEVEL_LOW]) | in rv6xx_program_memory_timing_parameters()
812 STATE1(64 * high_clock / pi->hw.sclks[R600_POWER_LEVEL_MEDIUM]) | in rv6xx_program_memory_timing_parameters()
813 STATE2(64 * high_clock / pi->hw.sclks[R600_POWER_LEVEL_HIGH]) | in rv6xx_program_memory_timing_parameters()
814 STATE3(64 * high_clock / pi->hw.sclks[R600_POWER_LEVEL_HIGH])); in rv6xx_program_memory_timing_parameters()
819 pi->hw.sclks[R600_POWER_LEVEL_LOW])) | in rv6xx_program_memory_timing_parameters()
821 pi->hw.sclks[R600_POWER_LEVEL_MEDIUM])) | in rv6xx_program_memory_timing_parameters()
823 pi->hw.sclks[R600_POWER_LEVEL_HIGH])) | in rv6xx_program_memory_timing_parameters()
825 pi->hw.sclks[R600_POWER_LEVEL_HIGH]))); in rv6xx_program_memory_timing_parameters()
831 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_mpll_timing_parameters() local
834 pi->mpll_ref_div); in rv6xx_program_mpll_timing_parameters()
840 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_bsp() local
845 &pi->bsp, in rv6xx_program_bsp()
846 &pi->bsu); in rv6xx_program_bsp()
848 r600_set_bsp(rdev, pi->bsu, pi->bsp); in rv6xx_program_bsp()
853 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_at() local
856 (pi->hw.rp[0] * pi->bsp) / 200, in rv6xx_program_at()
857 (pi->hw.rp[1] * pi->bsp) / 200, in rv6xx_program_at()
858 (pi->hw.lp[2] * pi->bsp) / 200, in rv6xx_program_at()
859 (pi->hw.lp[1] * pi->bsp) / 200); in rv6xx_program_at()
940 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_get_master_voltage_mask() local
949 pi->hw.vddc[i], in rv6xx_get_master_voltage_mask()
1022 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_calculate_ap() local
1024 pi->hw.lp[0] = 0; in rv6xx_calculate_ap()
1025 pi->hw.rp[R600_PM_NUMBER_OF_ACTIVITY_LEVELS - 1] in rv6xx_calculate_ap()
1033 &pi->hw.lp[1], in rv6xx_calculate_ap()
1034 &pi->hw.rp[0]); in rv6xx_calculate_ap()
1041 &pi->hw.lp[2], in rv6xx_calculate_ap()
1042 &pi->hw.rp[1]); in rv6xx_calculate_ap()
1059 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_stepping_parameters_except_lowest_entry() local
1062 if (pi->voltage_control) in rv6xx_program_stepping_parameters_except_lowest_entry()
1072 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_stepping_parameters_lowest_entry() local
1075 if (pi->voltage_control) in rv6xx_program_stepping_parameters_lowest_entry()
1083 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_power_level_low() local
1086 pi->hw.low_vddc_index); in rv6xx_program_power_level_low()
1088 pi->hw.low_mclk_index); in rv6xx_program_power_level_low()
1090 pi->hw.low_sclk_index); in rv6xx_program_power_level_low()
1094 pi->hw.pcie_gen2[R600_POWER_LEVEL_LOW]); in rv6xx_program_power_level_low()
1099 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_power_level_low_to_lowest_state() local
1109 pi->hw.pcie_gen2[R600_POWER_LEVEL_LOW]); in rv6xx_program_power_level_low_to_lowest_state()
1115 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_power_level_medium() local
1118 pi->hw.medium_vddc_index); in rv6xx_program_power_level_medium()
1120 pi->hw.medium_mclk_index); in rv6xx_program_power_level_medium()
1122 pi->hw.medium_sclk_index); in rv6xx_program_power_level_medium()
1126 pi->hw.pcie_gen2[R600_POWER_LEVEL_MEDIUM]); in rv6xx_program_power_level_medium()
1131 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_power_level_medium_for_transition() local
1135 pi->hw.mclks[pi->hw.low_mclk_index]); in rv6xx_program_power_level_medium_for_transition()
1142 pi->hw.medium_sclk_index); in rv6xx_program_power_level_medium_for_transition()
1150 pi->hw.pcie_gen2[R600_POWER_LEVEL_LOW]); in rv6xx_program_power_level_medium_for_transition()
1155 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_power_level_high() local
1158 pi->hw.high_vddc_index); in rv6xx_program_power_level_high()
1160 pi->hw.high_mclk_index); in rv6xx_program_power_level_high()
1162 pi->hw.high_sclk_index); in rv6xx_program_power_level_high()
1168 pi->hw.pcie_gen2[R600_POWER_LEVEL_HIGH]); in rv6xx_program_power_level_high()
1337 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_enable_high() local
1339 if ((pi->restricted_levels < 1) || in rv6xx_enable_high()
1340 (pi->restricted_levels == 3)) in rv6xx_enable_high()
1346 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_enable_medium() local
1348 if (pi->restricted_levels < 2) in rv6xx_enable_medium()
1354 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_set_dpm_event_sources() local
1382 if (pi->thermal_protection) in rv6xx_set_dpm_event_sources()
1393 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_enable_auto_throttle_source() local
1396 if (!(pi->active_auto_throttle_sources & (1 << source))) { in rv6xx_enable_auto_throttle_source()
1397 pi->active_auto_throttle_sources |= 1 << source; in rv6xx_enable_auto_throttle_source()
1398 rv6xx_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources); in rv6xx_enable_auto_throttle_source()
1401 if (pi->active_auto_throttle_sources & (1 << source)) { in rv6xx_enable_auto_throttle_source()
1402 pi->active_auto_throttle_sources &= ~(1 << source); in rv6xx_enable_auto_throttle_source()
1403 rv6xx_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources); in rv6xx_enable_auto_throttle_source()
1412 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_enable_thermal_protection() local
1414 if (pi->active_auto_throttle_sources) in rv6xx_enable_thermal_protection()
1424 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_generate_transition_stepping() local
1429 0, &pi->hw.medium_sclk_index); in rv6xx_generate_transition_stepping()
1436 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_generate_low_step() local
1438 pi->hw.low_sclk_index = 0; in rv6xx_generate_low_step()
1446 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_invalidate_intermediate_steps() local
1449 pi->hw.medium_sclk_index); in rv6xx_invalidate_intermediate_steps()
1456 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_generate_stepping_table() local
1458 pi->hw.low_sclk_index = 0; in rv6xx_generate_stepping_table()
1464 &pi->hw.medium_sclk_index); in rv6xx_generate_stepping_table()
1468 pi->hw.medium_sclk_index, in rv6xx_generate_stepping_table()
1469 &pi->hw.high_sclk_index); in rv6xx_generate_stepping_table()
1548 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_dpm_enable() local
1557 if (pi->dynamic_ss) in rv6xx_dpm_enable()
1572 if (pi->display_gap == false) in rv6xx_dpm_enable()
1579 if (pi->voltage_control) in rv6xx_dpm_enable()
1601 if (pi->voltage_control) in rv6xx_dpm_enable()
1604 if (pi->dynamic_pcie_gen2) in rv6xx_dpm_enable()
1607 if (pi->gfx_clock_gating) in rv6xx_dpm_enable()
1615 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_dpm_disable() local
1627 if (pi->thermal_protection) in rv6xx_dpm_disable()
1639 if (pi->voltage_control) in rv6xx_dpm_disable()
1642 if (pi->dynamic_pcie_gen2) in rv6xx_dpm_disable()
1651 if (pi->gfx_clock_gating) in rv6xx_dpm_disable()
1659 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_dpm_set_power_state() local
1664 pi->restricted_levels = 0; in rv6xx_dpm_set_power_state()
1672 if (pi->thermal_protection) in rv6xx_dpm_set_power_state()
1682 if (pi->voltage_control) { in rv6xx_dpm_set_power_state()
1691 if (pi->dynamic_pcie_gen2) in rv6xx_dpm_set_power_state()
1694 if (pi->voltage_control) in rv6xx_dpm_set_power_state()
1700 if (pi->voltage_control) { in rv6xx_dpm_set_power_state()
1720 if (pi->voltage_control) { in rv6xx_dpm_set_power_state()
1732 if (pi->dynamic_pcie_gen2) in rv6xx_dpm_set_power_state()
1745 if (pi->thermal_protection) in rv6xx_dpm_set_power_state()
1936 struct rv6xx_power_info *pi; in rv6xx_dpm_init() local
1939 pi = kzalloc(sizeof(struct rv6xx_power_info), GFP_KERNEL); in rv6xx_dpm_init()
1940 if (pi == NULL) in rv6xx_dpm_init()
1942 rdev->pm.dpm.priv = pi; in rv6xx_dpm_init()
1960 pi->spll_ref_div = dividers.ref_div + 1; in rv6xx_dpm_init()
1962 pi->spll_ref_div = R600_REFERENCEDIVIDER_DFLT; in rv6xx_dpm_init()
1967 pi->mpll_ref_div = dividers.ref_div + 1; in rv6xx_dpm_init()
1969 pi->mpll_ref_div = R600_REFERENCEDIVIDER_DFLT; in rv6xx_dpm_init()
1972 pi->fb_div_scale = 1; in rv6xx_dpm_init()
1974 pi->fb_div_scale = 0; in rv6xx_dpm_init()
1976 pi->voltage_control = in rv6xx_dpm_init()
1979 pi->gfx_clock_gating = true; in rv6xx_dpm_init()
1981 pi->sclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss, in rv6xx_dpm_init()
1983 pi->mclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss, in rv6xx_dpm_init()
1987 pi->sclk_ss = false; in rv6xx_dpm_init()
1989 if (pi->sclk_ss || pi->mclk_ss) in rv6xx_dpm_init()
1990 pi->dynamic_ss = true; in rv6xx_dpm_init()
1992 pi->dynamic_ss = false; in rv6xx_dpm_init()
1994 pi->dynamic_pcie_gen2 = true; in rv6xx_dpm_init()
1996 if (pi->gfx_clock_gating && in rv6xx_dpm_init()
1998 pi->thermal_protection = true; in rv6xx_dpm_init()
2000 pi->thermal_protection = false; in rv6xx_dpm_init()
2002 pi->display_gap = true; in rv6xx_dpm_init()
2133 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_dpm_force_performance_level() local
2136 pi->restricted_levels = 3; in rv6xx_dpm_force_performance_level()
2138 pi->restricted_levels = 2; in rv6xx_dpm_force_performance_level()
2140 pi->restricted_levels = 0; in rv6xx_dpm_force_performance_level()
2151 if (pi->restricted_levels == 3) in rv6xx_dpm_force_performance_level()