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Lines Matching refs:dpm

57 	struct rv7xx_power_info *pi = rdev->pm.dpm.priv;  in rv770_get_pi()
64 struct evergreen_power_info *pi = rdev->pm.dpm.priv; in evergreen_get_pi()
1191 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_HARDWAREDC) { in rv770_init_smc_table()
1194 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_DONT_WAIT_FOR_VBLANK_ON_ALERT) in rv770_init_smc_table()
1197 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_GOTO_BOOT_ON_ALERT) in rv770_init_smc_table()
1201 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC) in rv770_init_smc_table()
1347 if (rdev->pm.dpm.new_active_crtcs & 1) { in rv770_program_display_gap()
1350 } else if (rdev->pm.dpm.new_active_crtcs & 2) { in rv770_program_display_gap()
1499 rdev->pm.dpm.forced_level = level; in rv770_dpm_force_performance_level()
1708 voltage_response_time = (u32)rdev->pm.dpm.voltage_response_time; in rv770_program_response_times()
1709 backbias_response_time = (u32)rdev->pm.dpm.backbias_response_time; in rv770_program_response_times()
1888 rdev->pm.dpm.thermal.min_temp = low_temp; in rv770_set_thermal_temperature_range()
1889 rdev->pm.dpm.thermal.max_temp = high_temp; in rv770_set_thermal_temperature_range()
1897 struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; in rv770_dpm_enable()
1926 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS) in rv770_dpm_enable()
2040 struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps; in rv770_dpm_set_power_state()
2041 struct radeon_ps *old_ps = rdev->pm.dpm.current_ps; in rv770_dpm_set_power_state()
2084 struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;
2109 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_ASPM_L0s) in rv770_dpm_setup_asic()
2111 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_ASPM_L1) in rv770_dpm_setup_asic()
2113 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_TURNOFFPLL_ASPML1) in rv770_dpm_setup_asic()
2169 rdev->pm.dpm.boot_ps = rps; in rv7xx_parse_pplib_non_clock_info()
2171 rdev->pm.dpm.uvd_ps = rps; in rv7xx_parse_pplib_non_clock_info()
2260 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk = pl->sclk; in rv7xx_parse_pplib_clock_info()
2261 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = pl->mclk; in rv7xx_parse_pplib_clock_info()
2262 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = pl->vddc; in rv7xx_parse_pplib_clock_info()
2263 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = pl->vddci; in rv7xx_parse_pplib_clock_info()
2285 rdev->pm.dpm.ps = kzalloc(sizeof(struct radeon_ps) * in rv7xx_parse_power_table()
2287 if (!rdev->pm.dpm.ps) in rv7xx_parse_power_table()
2304 kfree(rdev->pm.dpm.ps); in rv7xx_parse_power_table()
2307 rdev->pm.dpm.ps[i].ps_priv = ps; in rv7xx_parse_power_table()
2308 rv7xx_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i], in rv7xx_parse_power_table()
2318 &rdev->pm.dpm.ps[i], j, in rv7xx_parse_power_table()
2323 rdev->pm.dpm.num_ps = power_info->pplib.ucNumStates; in rv7xx_parse_power_table()
2352 rdev->pm.dpm.priv = pi; in rv770_dpm_init()
2368 if (rdev->pm.dpm.voltage_response_time == 0) in rv770_dpm_init()
2369 rdev->pm.dpm.voltage_response_time = R600_VOLTAGERESPONSETIME_DFLT; in rv770_dpm_init()
2370 if (rdev->pm.dpm.backbias_response_time == 0) in rv770_dpm_init()
2371 rdev->pm.dpm.backbias_response_time = R600_BACKBIASRESPONSETIME_DFLT; in rv770_dpm_init()
2468 struct radeon_ps *rps = rdev->pm.dpm.current_ps; in rv770_dpm_debugfs_print_current_performance_level()
2497 struct radeon_ps *rps = rdev->pm.dpm.current_ps; in rv770_dpm_get_current_sclk()
2519 struct radeon_ps *rps = rdev->pm.dpm.current_ps; in rv770_dpm_get_current_mclk()
2543 for (i = 0; i < rdev->pm.dpm.num_ps; i++) { in rv770_dpm_fini()
2544 kfree(rdev->pm.dpm.ps[i].ps_priv); in rv770_dpm_fini()
2546 kfree(rdev->pm.dpm.ps); in rv770_dpm_fini()
2547 kfree(rdev->pm.dpm.priv); in rv770_dpm_fini()
2552 struct rv7xx_ps *requested_state = rv770_get_ps(rdev->pm.dpm.requested_ps); in rv770_dpm_get_sclk()
2562 struct rv7xx_ps *requested_state = rv770_get_ps(rdev->pm.dpm.requested_ps); in rv770_dpm_get_mclk()