2290 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_power_containment_values()  local
2349 		ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_power_containment_values()
2358 		ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_power_containment_values()
3722 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_program_ds_registers()  local
3725 	if (eg_pi->sclk_deep_sleep) {  in si_program_ds_registers()
4011 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_construct_voltage_tables()  local
4017 						    VOLTAGE_OBJ_GPIO_LUT, &eg_pi->vddc_voltage_table);  in si_construct_voltage_tables()
4021 		if (eg_pi->vddc_voltage_table.count > SISLANDS_MAX_NO_VREG_STEPS)  in si_construct_voltage_tables()
4024 								 &eg_pi->vddc_voltage_table);  in si_construct_voltage_tables()
4028 						&eg_pi->vddc_voltage_table);  in si_construct_voltage_tables()
4035 	if (eg_pi->vddci_control) {  in si_construct_voltage_tables()
4037 						    VOLTAGE_OBJ_GPIO_LUT, &eg_pi->vddci_voltage_table);  in si_construct_voltage_tables()
4041 		if (eg_pi->vddci_voltage_table.count > SISLANDS_MAX_NO_VREG_STEPS)  in si_construct_voltage_tables()
4044 								 &eg_pi->vddci_voltage_table);  in si_construct_voltage_tables()
4049 						&eg_pi->vddci_voltage_table);  in si_construct_voltage_tables()
4102 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_smc_voltage_tables()  local
4114 		if (eg_pi->vddc_voltage_table.count) {  in si_populate_smc_voltage_tables()
4115 			si_populate_smc_voltage_table(rdev, &eg_pi->vddc_voltage_table, table);  in si_populate_smc_voltage_tables()
4117 				cpu_to_be32(eg_pi->vddc_voltage_table.mask_low);  in si_populate_smc_voltage_tables()
4119 			for (i = 0; i < eg_pi->vddc_voltage_table.count; i++) {  in si_populate_smc_voltage_tables()
4120 				if (pi->max_vddc_in_table <= eg_pi->vddc_voltage_table.entries[i].value) {  in si_populate_smc_voltage_tables()
4127 		if (eg_pi->vddci_voltage_table.count) {  in si_populate_smc_voltage_tables()
4128 			si_populate_smc_voltage_table(rdev, &eg_pi->vddci_voltage_table, table);  in si_populate_smc_voltage_tables()
4131 				cpu_to_be32(eg_pi->vddci_voltage_table.mask_low);  in si_populate_smc_voltage_tables()
4422 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_smc_initial_state()  local
4470 	ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_smc_initial_state()
4486 	if (eg_pi->vddci_control)  in si_populate_smc_initial_state()
4488 					  &eg_pi->vddci_voltage_table,  in si_populate_smc_initial_state()
4543 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_smc_acpi_state()  local
4564 		ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_smc_acpi_state()
4587 		ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_smc_acpi_state()
4615 		if (eg_pi->acpi_vddci)  in si_populate_smc_acpi_state()
4616 			si_populate_voltage_value(rdev, &eg_pi->vddci_voltage_table,  in si_populate_smc_acpi_state()
4617 						  eg_pi->acpi_vddci,  in si_populate_smc_acpi_state()
4662 	if (eg_pi->dynamic_ac_timing)  in si_populate_smc_acpi_state()
4683 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_ulv_state()  local
4692 		if (eg_pi->sclk_deep_sleep) {  in si_populate_ulv_state()
5032 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_convert_power_level_to_smc()  local
5039 	if (eg_pi->pcie_performance_request &&  in si_convert_power_level_to_smc()
5053 	    !eg_pi->uvd_enabled &&  in si_convert_power_level_to_smc()
5066 		if (pl->mclk > eg_pi->mclk_edc_wr_enable_threshold)  in si_convert_power_level_to_smc()
5096 					&eg_pi->vddc_voltage_table,  in si_convert_power_level_to_smc()
5111 	if (eg_pi->vddci_control) {  in si_convert_power_level_to_smc()
5112 		ret = si_populate_voltage_value(rdev, &eg_pi->vddci_voltage_table,  in si_convert_power_level_to_smc()
5243 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_convert_power_state_to_smc()  local
5257 		eg_pi->uvd_enabled = true;  in si_convert_power_state_to_smc()
5258 		if (eg_pi->smu_uvd_hs)  in si_convert_power_state_to_smc()
5261 		eg_pi->uvd_enabled = false;  in si_convert_power_state_to_smc()
5269 		if (eg_pi->sclk_deep_sleep) {  in si_convert_power_state_to_smc()
5294 		if (eg_pi->dynamic_ac_timing)  in si_convert_power_state_to_smc()
5862 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
5864 	if (eg_pi->sclk_deep_sleep) {
6400 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_enable()  local
6418 	if (eg_pi->dynamic_ac_timing) {  in si_dpm_enable()
6421 			eg_pi->dynamic_ac_timing = false;  in si_dpm_enable()
6464 	if (eg_pi->dynamic_ac_timing) {  in si_dpm_enable()
6570 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_pre_set_power_state()  local
6576 	si_apply_state_adjust_rules(rdev, &eg_pi->requested_rps);  in si_dpm_pre_set_power_state()
6609 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_set_power_state()  local
6610 	struct radeon_ps *new_ps = &eg_pi->requested_rps;  in si_dpm_set_power_state()
6611 	struct radeon_ps *old_ps = &eg_pi->current_rps;  in si_dpm_set_power_state()
6624 	if (eg_pi->pcie_performance_request)  in si_dpm_set_power_state()
6657 	if (eg_pi->dynamic_ac_timing) {  in si_dpm_set_power_state()
6683 	if (eg_pi->pcie_performance_request)  in si_dpm_set_power_state()
6712 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_post_set_power_state()  local
6713 	struct radeon_ps *new_ps = &eg_pi->requested_rps;  in si_dpm_post_set_power_state()
6785 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_parse_pplib_clock_info()  local
6815 		eg_pi->acpi_vddci = pl->vddci;  in si_parse_pplib_clock_info()
6950 	struct evergreen_power_info *eg_pi;  in si_dpm_init()  local
6962 	eg_pi = &ni_pi->eg;  in si_dpm_init()
6963 	pi = &eg_pi->rv7xx;  in si_dpm_init()
6980 	eg_pi->acpi_vddci = 0;  in si_dpm_init()
7024 	eg_pi->smu_uvd_hs = false;  in si_dpm_init()
7032 	eg_pi->mclk_edc_wr_enable_threshold = 40000;  in si_dpm_init()
7034 	ni_pi->mclk_rtt_mode_threshold = eg_pi->mclk_edc_wr_enable_threshold;  in si_dpm_init()
7052 	eg_pi->vddci_control =  in si_dpm_init()
7055 	if (!eg_pi->vddci_control)  in si_dpm_init()
7072 	eg_pi->sclk_deep_sleep = true;  in si_dpm_init()
7080 	eg_pi->dynamic_ac_timing = true;  in si_dpm_init()
7082 	eg_pi->light_sleep = true;  in si_dpm_init()
7084 	eg_pi->pcie_performance_request =  in si_dpm_init()
7087 	eg_pi->pcie_performance_request = false;  in si_dpm_init()
7129 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_debugfs_print_current_performance_level()  local
7130 	struct radeon_ps *rps = &eg_pi->current_rps;  in si_dpm_debugfs_print_current_performance_level()
7149 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_get_current_sclk()  local
7150 	struct radeon_ps *rps = &eg_pi->current_rps;  in si_dpm_get_current_sclk()
7167 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_get_current_mclk()  local
7168 	struct radeon_ps *rps = &eg_pi->current_rps;  in si_dpm_get_current_mclk()