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Lines Matching refs:sclk

583 				      u32 index, u32 sclk)  in trinity_set_divider_value()  argument
591 sclk, false, &dividers); in trinity_set_divider_value()
601 sclk/2, false, &dividers); in trinity_set_divider_value()
721 trinity_set_divider_value(rdev, index, pl->sclk); in trinity_program_power_level()
968 if (new_ps->levels[new_ps->num_levels - 1].sclk >= in trinity_set_uvd_clock_before_set_eng_clock()
969 current_ps->levels[current_ps->num_levels - 1].sclk) in trinity_set_uvd_clock_before_set_eng_clock()
982 if (new_ps->levels[new_ps->num_levels - 1].sclk < in trinity_set_uvd_clock_after_set_eng_clock()
983 current_ps->levels[current_ps->num_levels - 1].sclk) in trinity_set_uvd_clock_after_set_eng_clock()
1333 static u8 trinity_calculate_vce_wm(struct radeon_device *rdev, u32 sclk) in trinity_calculate_vce_wm() argument
1335 if (sclk < 20000) in trinity_calculate_vce_wm()
1344 pi->boot_pl.sclk = pi->sys_info.bootup_sclk; in trinity_construct_boot_state()
1357 u32 sclk, u32 min_sclk_in_sr) in trinity_get_sleep_divider_id_from_clock() argument
1365 if (sclk < min) in trinity_get_sleep_divider_id_from_clock()
1372 temp = sclk / sumo_get_sleep_divider_from_id(i); in trinity_get_sleep_divider_id_from_clock()
1409 current_sclk = current_ps->levels[current_index].sclk; in trinity_patch_thermal_state()
1412 current_sclk = pi->boot_pl.sclk; in trinity_patch_thermal_state()
1417 if (ps->levels[0].sclk > current_sclk) in trinity_patch_thermal_state()
1418 ps->levels[0].sclk = current_sclk; in trinity_patch_thermal_state()
1421 trinity_get_sleep_divider_id_from_clock(rdev, ps->levels[0].sclk, sclk_in_sr); in trinity_patch_thermal_state()
1427 trinity_calculate_vce_wm(rdev, ps->levels[0].sclk); in trinity_patch_thermal_state()
1443 else if (ps->levels[index].sclk < 30000) in trinity_calculate_display_wm()
1565 if (ps->levels[i].sclk < min_sclk) in trinity_apply_state_adjust_rules()
1566 ps->levels[i].sclk = in trinity_apply_state_adjust_rules()
1572 if (ps->levels[i].sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) in trinity_apply_state_adjust_rules()
1573 ps->levels[i].sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; in trinity_apply_state_adjust_rules()
1581 sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[i].sclk, sclk_in_sr); in trinity_apply_state_adjust_rules()
1590 trinity_calculate_vce_wm(rdev, ps->levels[0].sclk); in trinity_apply_state_adjust_rules()
1713 u32 sclk; in trinity_parse_pplib_clock_info() local
1715 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in trinity_parse_pplib_clock_info()
1716 sclk |= clock_info->sumo.ucEngineClockHigh << 16; in trinity_parse_pplib_clock_info()
1717 pl->sclk = sclk; in trinity_parse_pplib_clock_info()
1804 u32 sclk; in trinity_parse_power_table() local
1808 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in trinity_parse_power_table()
1809 sclk |= clock_info->sumo.ucEngineClockHigh << 16; in trinity_parse_power_table()
1810 rdev->pm.dpm.vce_states[i].sclk = sclk; in trinity_parse_power_table()
2021 i, pl->sclk, in trinity_dpm_print_power_state()
2044 current_index, pl->sclk, in trinity_dpm_debugfs_print_current_performance_level()
2063 return pl->sclk; in trinity_dpm_get_current_sclk()
2094 return requested_state->levels[0].sclk; in trinity_dpm_get_sclk()
2096 return requested_state->levels[requested_state->num_levels - 1].sclk; in trinity_dpm_get_sclk()